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<a href="https://gitlab.rtems.org/zhengxiaojun">xiaojun zheng</a> created a merge request: <a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/229">!229</a>
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Project:Branches: zhengxiaojun/rtems:update_Per_CPU_Get_index to rtems/rtos/rtems:main
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Author: xiaojun zheng
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<a href="#summary" aria-hidden="true" class="anchor" id="user-content-summary" style="margin-top: 0; float: left; margin-left: -20px; text-decoration: none; outline: none;"></a>Summary</h2>
<p dir="auto" style="color: #28272d; margin: 0 0 16px;" align="initial">bsp/aarch64:Fix _CPU_SMP_Get_current_processor()</p>
<p dir="auto" style="color: #28272d; margin: 0 0 16px;" align="initial">Fix _CPU_SMP_Get_current_processor(), since read from register MPIDR_EL1
(the least significant byte) is not always right,for example the least
significant byte of MPIDR_EL1 is always zero for cortex-a55.
aarch64 has a thread ID register TPIDR_EL1 available for for OS management
purposes. RTEMS stores per-CPU control in TPIDR_EL1 when the core startup,
so we can use _Per_CPU_Get_index() to get current processor index.</p>
<p dir="auto" style="color: #28272d; margin: 0;" align="initial">update <a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5064" data-reference-type="issue" data-original="#5064" data-link="false" data-link-reference="false" data-issue="28464" data-project="26" data-iid="5064" data-namespace-path="rtems/rtos/rtems" data-project-path="rtems/rtos/rtems" data-issue-type="issue" data-container="body" data-placement="top" title="bsp/aarch64:SMP improvement on aarch64" class="gfm gfm-issue" style="margin-top: 0;">#5064</a></p>
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