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<h3 style="margin-top: 20px; margin-bottom: 10px;">
Sebastian Huber pushed new commits to merge request <a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/255">!255</a>
</h3>
<ul>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/07217e3f">07217e3f</a>
- bsps/aarch64: Customize EL2/EL3 start support
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/8d6e8f15">8d6e8f15</a>
- aarch64: Split exception support
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/2b364923">2b364923</a>
- aarch64: Move exception frame support
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/a8d3efe4">a8d3efe4</a>
- dev/irq: Simplify GICv2 set/get affinity
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/8db6a450">8db6a450</a>
- bsps: Assembly implementation for PSCI bsp_reset()
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/f630be89">f630be89</a>
- aarch64/xilinx-zynqmp: Simplify startup
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/1524b5f9">1524b5f9</a>
- aarch64/xilinx-zynqmp: Move get I2C clocks
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/5ff5bd3c">5ff5bd3c</a>
- aarch64: More robust SMP system start
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/5a962e3b">5a962e3b</a>
- arm/aarch64: Optimize _CPU_SMP_Send_interrupt()
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/42c6f727">42c6f727</a>
- dev/irq: Remove arm_gic_irq_generate_software_irq()
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/c538079e">c538079e</a>
- aarch64: Remove trapped FP exceptions support
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/f43042cd">f43042cd</a>
- bsps: Move <bsp/linker-symbols.h> to shared
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/3fd06315">3fd06315</a>
- dev/irq: Simplify SMP GIC initialization
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/cfd88585">cfd88585</a>
- bsps/aarch64: Use fatal error for data cache disable
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/77094f11">77094f11</a>
- bsps/aarch64: Simplify I-cache invalidate
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/098f8cb0">098f8cb0</a>
- bsps/aarch64: Fix AArch64_get_ccsidr_for_level()
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/064a672f">064a672f</a>
- bsps/aarch64: Simplify AArch64_clidr_get_cache_type()
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/aac76058">aac76058</a>
- bsps/aarch64: Fix entire data cache flush/invalidate
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/41ed4b5d">41ed4b5d</a>
- bsps/aarch64: Assume that all levels have a data cache
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/8c4cc767">8c4cc767</a>
- aarch64/xilinx-zynqmp: Move MMU config table
</li>
<li>
And 5 more
</li>
</ul>
</div>
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