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<a href="https://gitlab.rtems.org/zhengxiaojun">xiaojun zheng</a>
commented on a
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/894#note_138100">discussion</a>:
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<p dir="auto" style="color: #3a383f; margin: 0;" align="initial">I’m working on an RK3568 board. The RK3568 organizes multiple cores into multiple clusters, and I’ve done a quick check on the RK3399 — it’s even more complicated than the RK3568. The current RTEMS version lacks multi-cluster support, so the SMP mode may be a bit more complicated as a result. Therefore, the GICv3 implementation should be improved. I have raised issue <a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5064" data-reference-type="issue" data-original="#5064" data-link="false" data-link-reference="false" data-issue="28464" data-project="26" data-iid="5064" data-namespace-path="rtems/rtos/rtems" data-project-path="rtems/rtos/rtems" data-issue-type="issue" data-container="body" data-placement="top" title="bsp/aarch64:SMP improvement on aarch64" class="gfm gfm-issue" style="margin-top: 0;">#5064</a> to track this enhancement. Now I’m stuck on how to enhance GICv3 and preserve the MPIDR register without impacting existing BSPs. Maybe we can discuss these points when you are working on SMP support,as it would help me resolve the current blocking issue.</p>
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