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<h3 style="margin-top: 20px; margin-bottom: 10px;">
Kinsey Moore pushed new commits to merge request <a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1086">!1086</a>
</h3>
<ul>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/compare/5e9f94de...e4a02bc2">5e9f94de...e4a02bc2
</a> - 3 commits from branch `main`
</li>
</ul>
<ul>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/e84cf21c">e84cf21c</a>
- spec/build: add RISCV_USE_S_MODE option
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/d65d6c56">d65d6c56</a>
- riscv: support s-mode during boot
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/75572d5d">75572d5d</a>
- bsps/riscv: support SMP secondary processors
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/f93e5462">f93e5462</a>
- bsps/riscv: support s-mode timer in clock driver
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/ee3f58e4">ee3f58e4</a>
- bsps/riscv: support s-mode irq handling
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/ecdabbc1">ecdabbc1</a>
- riscv: enable s-mode in CPU port
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/d10381fa">d10381fa</a>
- cpukit/riscv: remove s/m prefix on frame context regs
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/14f47842">14f47842</a>
- riscv/riscv: refactor clock driver
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/b6fece1e">b6fece1e</a>
- riscv/riscv: add clock driver using stimecmp
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/59f56b27">59f56b27</a>
- riscv: support CPU counter in s-mode
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/b2d7c024">b2d7c024</a>
- riscv: use software irq in tm27 with s-mode
</li>
<li>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/commit/3647acc5">3647acc5</a>
- riscv/riscv: support s-mode IRQ handling
</li>
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