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<a href="https://gitlab.rtems.org/quocviet1207">Le Quoc Viet Pham</a>
<a href="https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5527#note_147754">commented</a>:
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<p dir="auto" style="color: #3a383f; margin: 0 0 1rem;" align="initial">Hi, I was looking through the file <code style="font-size: 90%; color: #18171d; word-wrap: break-word; background-color: #ececef; border-radius: .25rem; margin-top: 0; font-weight: inherit; overflow-wrap: break-word; white-space: break-spaces; font-family: "GitLab Mono", "JetBrains Mono", "Menlo", "DejaVu Sans Mono", "Liberation Mono", "Consolas", "Ubuntu Mono", "Courier New", "andale mono", "lucida console", monospace; font-variant-ligatures: none; word-break: keep-all; padding: 0.125rem 0.25rem;">bsps/riscv/esp32/include/c3/chip_definitions.h</code> and compare it to the ESP32C3 datasheet (<a href="https://documentation.espressif.com/esp32-c3_technical_reference_manual_en.pdf#usbserialjtag" rel="nofollow noreferrer noopener" target="_blank">https://documentation.espressif.com/esp32-c3_technical_reference_manual_en.pdf#usbserialjtag</a>). I might need some clarification:</p>
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<p style="color: #3a383f; margin: 0 0 1rem;">In chapter 8, page 202, it says "The ESP32-C3 has 62 peripheral interrupt sources". Why in the file, the <strong style="font-weight: 600; margin-top: 0;">RISCV_MAXIMUM_EXTERNAL_INTERRUPTS</strong> is defined as <strong style="font-weight: 600;">63</strong> instead of <strong style="font-weight: 600;">62</strong>?</p>
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<p style="color: #3a383f; margin: 0 0 1rem;">I saw a comment:</p>
<p style="color: #3a383f; margin: 0 0 1rem;">`/*</p>
<ul style="list-style-type: circle; margin: 0 0 1rem; padding: 0;">
<li style="margin-top: 0; line-height: 1.6em; margin-left: 25px; padding-left: 3px;">These interrupts aren't used on ESP32-C-series chips as they are</li>
<li style="line-height: 1.6em; margin-left: 25px; padding-left: 3px;">single-core, but they're useful for generating software interrupts.
*/`</li>
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<p style="color: #3a383f; margin: 0 0 1rem;">So I'm assuming that from bit 50 to bit 59, these interrupts aren't be used because C3 is a single core. But in the datasheet, i couldn't find anything telling me that these bits are using for dual-core or anything related.</p>
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<p style="color: #3a383f; margin: 0 0 1rem;"><code style="font-size: 90%; color: #18171d; word-wrap: break-word; background-color: #ececef; border-radius: .25rem; margin-top: 0; font-weight: inherit; overflow-wrap: break-word; white-space: break-spaces; font-family: "GitLab Mono", "JetBrains Mono", "Menlo", "DejaVu Sans Mono", "Liberation Mono", "Consolas", "Ubuntu Mono", "Courier New", "andale mono", "lucida console", monospace; font-variant-ligatures: none; word-break: keep-all; padding: 0.125rem 0.25rem;">/* ESP32-C3 ROM function addresses */ #define UART_TX_ONE_CHAR_ADDR ((void *)(uintptr_t)0x40000068) #define UART_RX_ONE_CHAR_ADDR ((void *)(uintptr_t)0x40000070) #define UART_TX_FLUSH_ADDR ((void *)(uintptr_t)0x40000080) #define GPIO_OUTPUT_SET_ADDR ((void *)(uintptr_t)0x400005b0)</code></p>
<p style="color: #3a383f; margin: 0 0 1rem;">In page 92, Figure 3.2-1. based 0x4000000 is pointing to the ROM0 using instruction bus. But I cannot find anything related to bit 68,70,80, ...</p>
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<p style="color: #3a383f; margin: 0 0 1rem;">In the future, I just need to adjust these numbers (bits and address) based on the datasheet of C5 and C6 right? I would not need to add anything else maybe?</p>
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<p dir="auto" style="color: #3a383f; margin: 0;" align="initial">Thank you!!!</p>
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