[PATCH 3/3] score: Add SMP support to the cache manager

Sebastian Huber sebastian.huber at embedded-brains.de
Mon Jul 7 06:53:39 UTC 2014


I think instruction cache operations scoped by processors make no sense on SMP. 
  Every processor should have the same view to the instruction memory.

-- 
Sebastian Huber, embedded brains GmbH

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