[PATCH] arm/start.S: Do not use a scratch register to hold the stack pointer

[chrisj at rtems.org]

From: Chris Johns <chrisj at rtems.org>

- The RPi calls C code which trashes scratch registers.

Closes #3773
---
 bsps/arm/shared/start/start.S | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/bsps/arm/shared/start/start.S b/bsps/arm/shared/start/start.S
index 80b7d44dbe..b47dcbcf21 100644
--- a/bsps/arm/shared/start/start.S
+++ b/bsps/arm/shared/start/start.S
@@ -169,11 +169,11 @@ _start:
 	/* Calculate interrupt stack area end for current processor */
 	ldr	r1, =_ISR_Stack_size
 #ifdef RTEMS_SMP
-	add	r3, r7, #1
-	mul	r1, r1, r3
+	add	r8, r7, #1
+	mul	r1, r1, r8
 #endif
 	ldr	r2, =_ISR_Stack_area_begin
-	add	r3, r1, r2
+	add	r8, r1, r2
 
 	/* Save original CPSR value */
 	mrs	r4, cpsr
@@ -188,8 +188,8 @@ _start:
 
 	/* Boot loader starts kernel in HYP mode, switch to SVC necessary */
 	ldr	r1, =bsp_stack_hyp_size
-	mov	sp, r3
-	sub	r3, r3, r1
+	mov	sp, r8
+	sub	r8, r8, r1
 	bl	bsp_start_arm_drop_hyp_mode
 
 .L_skip_hyp_svc_switch:
@@ -200,8 +200,8 @@ _start:
 	mov	r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F)
 	msr	cpsr, r0
 	ldr	r1, =bsp_stack_fiq_size
-	mov	sp, r3
-	sub	r3, r3, r1
+	mov	sp, r8
+	sub	r8, r8, r1
 
 #ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION
 	bl bsp_start_init_registers_banked_fiq
@@ -211,20 +211,20 @@ _start:
 	mov	r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F)
 	msr	cpsr, r0
 	ldr	r1, =bsp_stack_abt_size
-	mov	sp, r3
-	sub	r3, r3, r1
+	mov	sp, r8
+	sub	r8, r8, r1
 
 	/* Enter UND mode and set up the UND stack pointer */
 	mov	r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F)
 	msr	cpsr, r0
 	ldr	r1, =bsp_stack_und_size
-	mov	sp, r3
-	sub	r3, r3, r1
+	mov	sp, r8
+	sub	r8, r8, r1
 
 	/* Enter IRQ mode and set up the IRQ stack pointer */
 	mov	r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F)
 	msr	cpsr, r0
-	mov	sp, r3
+	mov	sp, r8
 
 	/*
 	 * Enter SVC mode and set up the SVC stack pointer, reuse IRQ stack
@@ -232,7 +232,7 @@ _start:
 	 */
 	mov	r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F)
 	msr	cpsr, r0
-	mov	sp, r3
+	mov	sp, r8
 
 	/* Stay in SVC mode */
 
-- 
2.19.1