[PATCH v3 17/38] bsp/leon3: Move system control register support

Sebastian Huber sebastian.huber at embedded-brains.de
Wed Jul 12 13:49:56 UTC 2023


Move, document, and reformat support functions from <leon.h> to
<bsp/leon3.h>.
---
 bsps/sparc/leon3/include/bsp/leon3.h | 173 +++++++++++++++++++++++++++
 bsps/sparc/leon3/include/leon.h      | 100 +---------------
 bsps/sparc/leon3/start/bspsmp.c      |   1 -
 bsps/sparc/leon3/start/bspstart.c    |   2 +-
 bsps/sparc/leon3/start/cache.c       |   2 +-
 5 files changed, 176 insertions(+), 102 deletions(-)

diff --git a/bsps/sparc/leon3/include/bsp/leon3.h b/bsps/sparc/leon3/include/bsp/leon3.h
index a5559bc7b9..75abc34fb7 100644
--- a/bsps/sparc/leon3/include/bsp/leon3.h
+++ b/bsps/sparc/leon3/include/bsp/leon3.h
@@ -38,6 +38,10 @@
 
 #include <grlib/apbuart-regs.h>
 
+#include <bsp/irqimpl.h>
+
+#include <grlib/ambapp.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -48,6 +52,175 @@ extern "C" {
  * @{
  */
 
+/**
+ * @brief This constant represents the flush instruction cache flag of the LEON
+ *   cache control register.
+ */
+#define LEON3_REG_CACHE_CTRL_FI 0x00200000U
+
+/**
+ * @brief This constant represents the data cache snooping enable flag of the
+ *   LEON cache control register.
+ */
+#define LEON3_REG_CACHE_CTRL_DS 0x00800000U
+
+/**
+ * @brief Sets the ASI 0x2 system register value.
+ *
+ * @param addr is the address of the ASI 0x2 system register.
+ *
+ * @param val is the value to set.
+ */
+static inline void leon3_set_system_register( uint32_t addr, uint32_t val )
+{
+  __asm__ volatile(
+    "sta %1, [%0] 2"
+    :
+    : "r" ( addr ), "r" ( val )
+  );
+}
+
+/**
+ * @brief Gets the ASI 0x2 system register value.
+ *
+ * @param addr is the address of the ASI 0x2 system register.
+ *
+ * @return Returns the register value.
+ */
+static inline uint32_t leon3_get_system_register( uint32_t addr )
+{
+  uint32_t val;
+
+  __asm__ volatile(
+    "lda [%1] 2, %0"
+    : "=r" ( val )
+    : "r" ( addr )
+  );
+
+  return val;
+}
+
+/**
+ * @brief Sets the LEON cache control register value.
+ *
+ * @param val is the value to set.
+ */
+static inline void leon3_set_cache_control_register( uint32_t val )
+{
+  leon3_set_system_register( 0x0, val );
+}
+
+/**
+ * @brief Gets the LEON cache control register value.
+ *
+ * @return Returns the register value.
+ */
+static inline uint32_t leon3_get_cache_control_register( void )
+{
+  return leon3_get_system_register( 0x0 );
+}
+
+/**
+ * @brief Checks if the data cache snooping is enabled.
+ *
+ * @return Returns true, if the data cache snooping is enabled, otherwise
+ *   false.
+ */
+static inline bool leon3_data_cache_snooping_enabled( void )
+{
+  return ( leon3_get_cache_control_register() & LEON3_REG_CACHE_CTRL_DS ) != 0;
+}
+
+/**
+ * @brief Gets the LEON instruction cache configuration register value.
+ *
+ * @return Returns the register value.
+ */
+static inline uint32_t leon3_get_inst_cache_config_register( void )
+{
+  return leon3_get_system_register( 0x8 );
+}
+
+/**
+ * @brief Gets the LEON data cache configuration register value.
+ *
+ * @return Returns the register value.
+ */
+static inline uint32_t leon3_get_data_cache_config_register( void )
+{
+  return leon3_get_system_register( 0xc );
+}
+
+/**
+ * @brief Gets the LEON up-counter low register (%ASR23) value.
+ *
+ * @return Returns the register value.
+ */
+static inline uint32_t leon3_up_counter_low( void )
+{
+  uint32_t asr23;
+
+  __asm__ volatile (
+    "mov %%asr23, %0"
+    : "=&r" (asr23)
+  );
+
+  return asr23;
+}
+
+/**
+ * @brief Gets the LEON up-counter high register (%ASR22) value.
+ *
+ * @return Returns the register value.
+ */
+static inline uint32_t leon3_up_counter_high(void)
+{
+  uint32_t asr22;
+
+  __asm__ volatile (
+    "mov %%asr22, %0"
+    : "=&r" (asr22)
+  );
+
+  return asr22;
+}
+
+/**
+ * @brief Enables the LEON up-counter.
+ */
+static inline void leon3_up_counter_enable( void )
+{
+  __asm__ volatile (
+    "mov %g0, %asr22"
+  );
+}
+
+/**
+ * @brief Checks if the LEON up-counter is available.
+ *
+ * The LEON up-counter must have been enabled.
+ *
+ * @return Returns true, if the LEON up-counter is available, otherwise false.
+ */
+static inline bool leon3_up_counter_is_available( void )
+{
+  return leon3_up_counter_low() != leon3_up_counter_low();
+}
+
+/**
+ * @brief Gets the LEON up-counter frequency in Hz.
+ *
+ * @return Returns the frequency.
+ */
+static inline uint32_t leon3_up_counter_frequency( void )
+{
+  /*
+   * For simplicity, assume that the interrupt controller uses the processor
+   * clock.  This is at least true on the GR740.
+   */
+  return ambapp_freq_get( ambapp_plb(), LEON3_IrqCtrl_Adev );
+}
+
 /**
  * @brief This pointer provides the debug APBUART register block address.
  */
diff --git a/bsps/sparc/leon3/include/leon.h b/bsps/sparc/leon3/include/leon.h
index 618d71af9b..3d7ce03f2a 100644
--- a/bsps/sparc/leon3/include/leon.h
+++ b/bsps/sparc/leon3/include/leon.h
@@ -45,7 +45,7 @@
 #include <rtems.h>
 #include <amba.h>
 #include <grlib/io.h>
-#include <bsp/irqimpl.h>
+#include <bsp/leon3.h>
 
 #ifdef __cplusplus
 extern "C" {
@@ -142,12 +142,6 @@ extern "C" {
 #define LEON_REG_UART_CTRL_FA     0x80000000 /* FIFO Available */
 #define LEON_REG_UART_CTRL_FA_BIT 31
 
-/*
- *  The following defines the bits in the LEON Cache Control Register.
- */
-#define LEON3_REG_CACHE_CTRL_FI      0x00200000 /* Flush instruction cache */
-#define LEON3_REG_CACHE_CTRL_DS      0x00800000 /* Data cache snooping */
-
 /* LEON3 GP Timer */
 extern volatile struct gptimer_regs *LEON3_Timer_Regs;
 extern struct ambapp_dev *LEON3_Timer_Adev;
@@ -391,98 +385,6 @@ extern unsigned int leon3_timer_prescaler;
 
 RTEMS_NO_RETURN void leon3_power_down_loop(void);
 
-static inline void leon3_set_system_register(uint32_t addr, uint32_t val)
-{
-  __asm__ volatile(
-    "sta %1, [%0] 2"
-    :
-    : "r" (addr), "r" (val)
-  );
-}
-
-static inline uint32_t leon3_get_system_register(uint32_t addr)
-{
-  uint32_t val;
-
-  __asm__ volatile(
-    "lda [%1] 2, %0"
-    : "=r" (val)
-    : "r" (addr)
-  );
-
-  return val;
-}
-
-static inline void leon3_set_cache_control_register(uint32_t val)
-{
-  leon3_set_system_register(0x0, val);
-}
-
-static inline uint32_t leon3_get_cache_control_register(void)
-{
-  return leon3_get_system_register(0x0);
-}
-
-static inline bool leon3_data_cache_snooping_enabled(void)
-{
-  return leon3_get_cache_control_register() & LEON3_REG_CACHE_CTRL_DS;
-}
-
-static inline uint32_t leon3_get_inst_cache_config_register(void)
-{
-  return leon3_get_system_register(0x8);
-}
-
-static inline uint32_t leon3_get_data_cache_config_register(void)
-{
-  return leon3_get_system_register(0xc);
-}
-
-static inline uint32_t leon3_up_counter_low(void)
-{
-  uint32_t asr23;
-
-  __asm__ volatile (
-    "mov %%asr23, %0"
-    : "=&r" (asr23)
-  );
-
-  return asr23;
-}
-
-static inline uint32_t leon3_up_counter_high(void)
-{
-  uint32_t asr22;
-
-  __asm__ volatile (
-    "mov %%asr22, %0"
-    : "=&r" (asr22)
-  );
-
-  return asr22;
-}
-
-static inline void leon3_up_counter_enable(void)
-{
-  __asm__ volatile (
-    "mov %g0, %asr22"
-  );
-}
-
-static inline bool leon3_up_counter_is_available(void)
-{
-  return leon3_up_counter_low() != leon3_up_counter_low();
-}
-
-static inline uint32_t leon3_up_counter_frequency(void)
-{
-  /*
-   * For simplicity, assume that the interrupt controller uses the processor
-   * clock.  This is at least true on the GR740.
-   */
-  return ambapp_freq_get(ambapp_plb(), LEON3_IrqCtrl_Adev);
-}
-
 #endif /* !ASM */
 
 #ifdef __cplusplus
diff --git a/bsps/sparc/leon3/start/bspsmp.c b/bsps/sparc/leon3/start/bspsmp.c
index a8ad60b497..7f8496289a 100644
--- a/bsps/sparc/leon3/start/bspsmp.c
+++ b/bsps/sparc/leon3/start/bspsmp.c
@@ -18,7 +18,6 @@
 #include <bsp/fatal.h>
 #include <bsp/irq.h>
 #include <bsp/leon3.h>
-#include <leon.h>
 #include <rtems/bspIo.h>
 #include <rtems/sysinit.h>
 #include <rtems/score/assert.h>
diff --git a/bsps/sparc/leon3/start/bspstart.c b/bsps/sparc/leon3/start/bspstart.c
index 61f888247f..dec92320e1 100644
--- a/bsps/sparc/leon3/start/bspstart.c
+++ b/bsps/sparc/leon3/start/bspstart.c
@@ -40,7 +40,7 @@
 
 #include <bsp.h>
 #include <bsp/irq-generic.h>
-#include <leon.h>
+#include <bsp/leon3.h>
 #include <bsp/bootcard.h>
 #include <rtems/sysinit.h>
 
diff --git a/bsps/sparc/leon3/start/cache.c b/bsps/sparc/leon3/start/cache.c
index 0273ad1d45..676f591857 100644
--- a/bsps/sparc/leon3/start/cache.c
+++ b/bsps/sparc/leon3/start/cache.c
@@ -7,7 +7,7 @@
  */
 
 #include <amba.h>
-#include <leon.h>
+#include <bsp/leon3.h>
 
 #define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS
 
-- 
2.35.3



More information about the devel mailing list