[PATCH v2 2/2] bsps/stm32h7: Move SDRAM1 to correct memory range

Cedric Berger cedric at precidata.com
Wed Jul 12 17:22:54 UTC 2023


Hello Kinsley,

Yes, basically:

if you look at page 135 of the reference manual:

https://www.st.com/resource/en/reference_manual/rm0399-stm32h745755-and-stm32h747757-advanced-armbased-32bit-mcus-stmicroelectronics.pdf

SDRAM BANK 1 is at 0xc0000000 (behaving like device memory, not 
executable) or remapped at 0x60000000 (behaving like real memory, 
executable and cached)

SDRAM BANK 2 is at 0xd0000000 (behaving like device memory, not 
executable) or remapped at 0x70000000 (behaving like real memory, 
executable and cached)

Because you want SDRAM to behave like real memory, the remap should be 
enabled all the time for all boards and the 0x60000000 or 0x70000000 
adresses used.

So basically, to be logical and consistant with the documentation and usage:

SDRAM_1     : ORIGIN = 0x60000000, LENGTH = 
${STM32H7_MEMORY_SDRAM_1_SIZE:#010x}

SDRAM_2     : ORIGIN = 0x70000000, LENGTH = 
${STM32H7_MEMORY_SDRAM_2_SIZE:#010x}

And the demo boards should all be using SDRAM_2 (0x70000000) with REMAP 
enabled.

But there is some work todo to clean that up.

Cedric

On 12.07.23 18:12, Karel Gardas wrote:
>
> Hello Kinsley,
>
> you are indeed right. I've not fixed this bit since it also requires 
> fixes in linker scripts and additional sdram region for sdram2 remap.
>
> E.g. Original Sebastian's code is using SDRAM_1 as a remap of SDRAM_2. 
> Linker script(s) then are using SDRAM_1 as an executable region (remap 
> of SDRAM_2). If you fix SDRAM_1 to be real SDRAM_1, then we will need 
> SDRAM_2_REMAP defined and fix also all SDRAM_1 occurances in linker 
> scripts and replace those with SDRAM_2_REMAP.
>
> Or that at least how I understand it...
>
> Thanks,
> Karel
>
> On 7/12/23 18:00, Kinsey Moore wrote:
>> According to the documentation in STM reference manuals RM0399 and
>> RM0433, the standard memory space for SDRAM bank 1 is 0xc0000000 to
>> 0xcfffffff.
>> ---
>>   spec/build/bsps/arm/stm32h7/linkcmdsmemory.yml | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/spec/build/bsps/arm/stm32h7/linkcmdsmemory.yml 
>> b/spec/build/bsps/arm/stm32h7/linkcmdsmemory.yml
>> index 88dd4e8c91..2b3aacce5d 100644
>> --- a/spec/build/bsps/arm/stm32h7/linkcmdsmemory.yml
>> +++ b/spec/build/bsps/arm/stm32h7/linkcmdsmemory.yml
>> @@ -14,9 +14,9 @@ content: |
>>       SRAM_BACKUP : ORIGIN = 0x38800000, LENGTH = 
>> ${STM32H7_MEMORY_SRAM_BACKUP_SIZE:#010x}
>>       PERIPHERAL  : ORIGIN = 0x40000000, LENGTH = 
>> ${STM32H7_MEMORY_PERIPHERAL_SIZE:#010x}
>>       NOR         : ORIGIN = 0x60000000, LENGTH = 
>> ${STM32H7_MEMORY_NOR_SIZE:#010x}
>> -    SDRAM_1     : ORIGIN = 0x70000000, LENGTH = 
>> ${STM32H7_MEMORY_SDRAM_1_SIZE:#010x}
>>       NAND        : ORIGIN = 0x80000000, LENGTH = 
>> ${STM32H7_MEMORY_NAND_SIZE:#010x}
>>       QUADSPI     : ORIGIN = 0x90000000, LENGTH = 
>> ${STM32H7_MEMORY_QUADSPI_SIZE:#010x}
>> +    SDRAM_1     : ORIGIN = 0xc0000000, LENGTH = 
>> ${STM32H7_MEMORY_SDRAM_1_SIZE:#010x}
>>       SDRAM_2     : ORIGIN = 0xd0000000, LENGTH = 
>> ${STM32H7_MEMORY_SDRAM_2_SIZE:#010x}
>>     }
>
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