<div dir="ltr">Hi Dhananjay,<div><br><div class="gmail_extra"><br><br><div class="gmail_quote">2013/4/17 Dhananjay Balan <span dir="ltr"><<a href="mailto:mb.dhananjay@gmail.com" target="_blank">mb.dhananjay@gmail.com</a>></span><br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><br><div class="gmail_extra">Hi Peng,</div><div class="gmail_extra"><br></div><div class="gmail_extra"><div class="gmail_quote">
<div class="im">On 17 April 2013 11:35, Peng Fan <span dir="ltr"><<a href="mailto:van.freenix@gmail.com" target="_blank">van.freenix@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">If any questions, you may post on the mailing list not just me.<div>My Tiny6410 board is developed by Firendly ARM. </div>

</div></blockquote><div><br></div></div><div>What I have here is a Witech OK6410 [1] I see both hardware uses the same core modules, so Will it be possible for me to use this patch to run RTEMS over this SBC? </div></div>
</div></div></blockquote><div><br></div><div style>Yes, it is possible to run on your OK6410. I do not know the uboot difference</div><div style>between OK6410 and Tiny6410, so some paraments for configurating the timer</div>
<div style>may be adjusted.</div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div class="gmail_extra"><div class="gmail_quote"><div class="im">
<div>
 <br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div>It's web is here: <a href="http://www.friendlyarm.net/products/tiny6410" target="_blank">http://www.friendlyarm.net/products/tiny6410</a></div>


<div>The patch now is simple, only support timer and serial, with most of</div><div>the hardware configuration done in uboot.Now, I am also trying to</div><div>add nand support. It does run on my board. You may try.</div>

</div></blockquote><div><br></div></div><div>Can you document the steps to load the image into the board and also the u-boot tweaks you did somewhere in wiki? </div></div></div></div></blockquote><div><br></div><div style>
I use the original uboot that released by Friendly ARM for this board and I think you may not modify the uboot. Anyway I'll do some work to migrate the hardware configuation from uboot to rtems. The patch that I have mailed u include a README</div>
<div style>file. It shows how to configure, download to board and run. </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">
<div><div class="h5"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div dir="ltr">
<div> Any problem, post it to the mailing list. Thanks.</div><div><br></div><div>Regards,</div><div>Peng.</div><div><br></div></div><div><div><div class="gmail_extra"><br><br><div class="gmail_quote">
2013/4/17 Dhananjay Balan <span dir="ltr"><<a href="mailto:mb.dhananjay@gmail.com" target="_blank">mb.dhananjay@gmail.com</a>></span><br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><p>Hi,<br>
I have with me an Chineese ARM SBC built around Samsung 6410. It is manufactured by witech Inc. Does this mean I can run RTEMS on it?</p>
<div class="gmail_quote"><div><div>On Apr 17, 2013 11:01 AM, "Peng Fan" <<a href="mailto:van.freenix@gmail.com" target="_blank">van.freenix@gmail.com</a>> wrote:<br type="attribution"></div></div>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div><div>
---<br>
 c/src/lib/libbsp/arm/Makefile.am                   |    1 +<br>
 c/src/lib/libbsp/arm/acinclude.m4                  |    2 +<br>
 c/src/lib/libbsp/arm/<a href="http://preinstall.am" target="_blank">preinstall.am</a>                 |    4 +<br>
 c/src/lib/libbsp/arm/shared/startup/linkcmds.armv6 |   26 +++<br>
 c/src/lib/libbsp/arm/tiny6410/Makefile.am          |   62 ++++++<br>
 c/src/lib/libbsp/arm/tiny6410/README               |   23 ++<br>
 c/src/lib/libbsp/arm/tiny6410/bsp_specs            |   13 ++<br>
 c/src/lib/libbsp/arm/tiny6410/<a href="http://configure.ac" target="_blank">configure.ac</a>         |   23 ++<br>
 c/src/lib/libbsp/arm/tiny6410/console/uart.c       |  229 ++++++++++++++++++++<br>
 c/src/lib/libbsp/arm/tiny6410/debug/debug.c        |   60 +++++<br>
 c/src/lib/libbsp/arm/tiny6410/include/bsp.h        |   60 +++++<br>
 .../libbsp/arm/tiny6410/make/custom/tiny6410.cfg   |   21 ++<br>
 c/src/lib/libbsp/arm/tiny6410/<a href="http://preinstall.am" target="_blank">preinstall.am</a>        |   83 +++++++<br>
 c/src/lib/libbsp/arm/tiny6410/sh-hello             |   13 ++<br>
 c/src/lib/libbsp/arm/tiny6410/startup/bspidle.c    |   25 +++<br>
 c/src/lib/libbsp/arm/tiny6410/startup/bspreset.c   |   37 ++++<br>
 c/src/lib/libbsp/arm/tiny6410/startup/bspstart.c   |   83 +++++++<br>
 .../libbsp/arm/tiny6410/startup/bspstarthooks.c    |  146 +++++++++++++<br>
 c/src/lib/libbsp/arm/tiny6410/startup/linkcmds     |   25 +++<br>
 c/src/lib/libbsp/arm/tiny6410/startup/memmap.c     |   29 +++<br>
 c/src/lib/libcpu/arm/Makefile.am                   |   25 +++<br>
 c/src/lib/libcpu/arm/<a href="http://configure.ac" target="_blank">configure.ac</a>                  |    2 +<br>
 c/src/lib/libcpu/arm/<a href="http://preinstall.am" target="_blank">preinstall.am</a>                 |   13 ++<br>
 c/src/lib/libcpu/arm/s3c64xx/clock/clockdrv.c      |  141 ++++++++++++<br>
 c/src/lib/libcpu/arm/s3c64xx/clock/support.c       |   51 +++++<br>
 c/src/lib/libcpu/arm/s3c64xx/include/s3c6410.h     |  211 ++++++++++++++++++<br>
 c/src/lib/libcpu/arm/s3c64xx/include/s3c64xx.h     |   15 ++<br>
 c/src/lib/libcpu/arm/s3c64xx/irq/irq.c             |   79 +++++++<br>
 c/src/lib/libcpu/arm/s3c64xx/irq/irq.h             |  100 +++++++++<br>
 c/src/lib/libcpu/arm/shared/include/arm-cp15.h     |   17 ++<br>
 30 files changed, 1619 insertions(+)<br>
 create mode 100644 c/src/lib/libbsp/arm/shared/startup/linkcmds.armv6<br>
 create mode 100644 c/src/lib/libbsp/arm/tiny6410/Makefile.am<br>
 create mode 100644 c/src/lib/libbsp/arm/tiny6410/README<br>
 create mode 100644 c/src/lib/libbsp/arm/tiny6410/bsp_specs<br>
 create mode 100644 c/src/lib/libbsp/arm/tiny6410/<a href="http://configure.ac" target="_blank">configure.ac</a><br>
 create mode 100644 c/src/lib/libbsp/arm/tiny6410/console/uart.c<br>
 create mode 100644 c/src/lib/libbsp/arm/tiny6410/debug/debug.c<br>
 create mode 100644 c/src/lib/libbsp/arm/tiny6410/include/bsp.h<br>
 create mode 100644 c/src/lib/libbsp/arm/tiny6410/make/custom/tiny6410.cfg<br>
 create mode 100644 c/src/lib/libbsp/arm/tiny6410/<a href="http://preinstall.am" target="_blank">preinstall.am</a><br>
 create mode 100755 c/src/lib/libbsp/arm/tiny6410/sh-hello<br>
 create mode 100644 c/src/lib/libbsp/arm/tiny6410/startup/bspidle.c<br>
 create mode 100644 c/src/lib/libbsp/arm/tiny6410/startup/bspreset.c<br>
 create mode 100644 c/src/lib/libbsp/arm/tiny6410/startup/bspstart.c<br>
 create mode 100644 c/src/lib/libbsp/arm/tiny6410/startup/bspstarthooks.c<br>
 create mode 100644 c/src/lib/libbsp/arm/tiny6410/startup/linkcmds<br>
 create mode 100644 c/src/lib/libbsp/arm/tiny6410/startup/memmap.c<br>
 create mode 100644 c/src/lib/libcpu/arm/s3c64xx/clock/clockdrv.c<br>
 create mode 100644 c/src/lib/libcpu/arm/s3c64xx/clock/support.c<br>
 create mode 100644 c/src/lib/libcpu/arm/s3c64xx/include/s3c6410.h<br>
 create mode 100644 c/src/lib/libcpu/arm/s3c64xx/include/s3c64xx.h<br>
 create mode 100644 c/src/lib/libcpu/arm/s3c64xx/irq/irq.c<br>
 create mode 100644 c/src/lib/libcpu/arm/s3c64xx/irq/irq.h<br>
<br>
diff --git a/c/src/lib/libbsp/arm/Makefile.am b/c/src/lib/libbsp/arm/Makefile.am<br>
index 9783354..bd2ee0c 100644<br>
--- a/c/src/lib/libbsp/arm/Makefile.am<br>
+++ b/c/src/lib/libbsp/arm/Makefile.am<br>
@@ -10,6 +10,7 @@ include_bsp_HEADERS = shared/include/linker-symbols.h<br>
<br>
 dist_project_lib_DATA = shared/startup/linkcmds.base<br>
 dist_project_lib_DATA += shared/startup/linkcmds.armv4<br>
+dist_project_lib_DATA += shared/startup/linkcmds.armv6<br>
 dist_project_lib_DATA += shared/startup/linkcmds.armv7m<br>
<br>
 EXTRA_DIST =<br>
diff --git a/c/src/lib/libbsp/arm/acinclude.m4 b/c/src/lib/libbsp/arm/acinclude.m4<br>
index 9512b26..277c144 100644<br>
--- a/c/src/lib/libbsp/arm/acinclude.m4<br>
+++ b/c/src/lib/libbsp/arm/acinclude.m4<br>
@@ -30,6 +30,8 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR],<br>
     AC_CONFIG_SUBDIRS([smdk2410]);;<br>
   stm32f4 )<br>
     AC_CONFIG_SUBDIRS([stm32f4]);;<br>
+  tiny6410 )<br>
+    AC_CONFIG_SUBDIRS([tiny6410]);;<br>
   *)<br>
     AC_MSG_ERROR([Invalid BSP]);;<br>
   esac<br>
diff --git a/c/src/lib/libbsp/arm/<a href="http://preinstall.am" target="_blank">preinstall.am</a> b/c/src/lib/libbsp/arm/<a href="http://preinstall.am" target="_blank">preinstall.am</a><br>
index 3e66ebe..75e8dfa 100644<br>
--- a/c/src/lib/libbsp/arm/<a href="http://preinstall.am" target="_blank">preinstall.am</a><br>
+++ b/c/src/lib/libbsp/arm/<a href="http://preinstall.am" target="_blank">preinstall.am</a><br>
@@ -35,6 +35,10 @@ $(PROJECT_LIB)/linkcmds.armv4: shared/startup/linkcmds.armv4 $(PROJECT_LIB)/$(di<br>
        $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.armv4<br>
 PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.armv4<br>
<br>
+$(PROJECT_LIB)/linkcmds.armv6: shared/startup/linkcmds.armv6 $(PROJECT_LIB)/$(dirstamp)<br>
+       $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.armv6<br>
+PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.armv6<br>
+<br>
 $(PROJECT_LIB)/linkcmds.armv7m: shared/startup/linkcmds.armv7m $(PROJECT_LIB)/$(dirstamp)<br>
        $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.armv7m<br>
 PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.armv7m<br>
diff --git a/c/src/lib/libbsp/arm/shared/startup/linkcmds.armv6 b/c/src/lib/libbsp/arm/shared/startup/linkcmds.armv6<br>
new file mode 100644<br>
index 0000000..16fa3ef<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/shared/startup/linkcmds.armv6<br>
@@ -0,0 +1,26 @@<br>
+/**<br>
+ * @file<br>
+ *<br>
+ * @ingroup bsp_linker<br>
+ *<br>
+ * @brief Linker command file for ARMv6 architecture.<br>
+ */<br>
+<br>
+/*<br>
+ * Copyright (c) 2010 embedded brains GmbH.  All rights reserved.<br>
+ *<br>
+ *  embedded brains GmbH<br>
+ *  Obere Lagerstr. 30<br>
+ *  82178 Puchheim<br>
+ *  Germany<br>
+ *  <<a href="mailto:rtems@embedded-brains.de" target="_blank">rtems@embedded-brains.de</a>><br>
+ *<br>
+ * The license and distribution terms for this file may be<br>
+ * found in the file LICENSE in this distribution or at<br>
+ * <a href="http://www.rtems.com/license/LICENSE" target="_blank">http://www.rtems.com/license/LICENSE</a>.<br>
+ */<br>
+<br>
+bsp_stack_svc_size = DEFINED (bsp_stack_svc_size) ? bsp_stack_svc_size : 4096;<br>
+bsp_stack_svc_size = ALIGN (bsp_stack_svc_size, bsp_stack_align);<br>
+<br>
+INCLUDE linkcmds.base<br>
diff --git a/c/src/lib/libbsp/arm/tiny6410/Makefile.am b/c/src/lib/libbsp/arm/tiny6410/Makefile.am<br>
new file mode 100644<br>
index 0000000..e49dc3a<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/tiny6410/Makefile.am<br>
@@ -0,0 +1,62 @@<br>
+ACLOCAL_AMFLAGS = -I ../../../../aclocal<br>
+<br>
+include $(top_srcdir)/../../../../automake/<a href="http://compile.am" target="_blank">compile.am</a><br>
+<br>
+include_bspdir = $(includedir)/bsp<br>
+<br>
+dist_project_lib_DATA = bsp_specs<br>
+<br>
+include_HEADERS = include/bsp.h<br>
+include_HEADERS += ../../shared/include/tm27.h<br>
+<br>
+include_bsp_HEADERS = ../shared/include/start.h<br>
+include_bsp_HEADERS += ../shared/include/linker-symbols.h<br>
+<br>
+nodist_include_HEADERS = include/bspopts.h<br>
+nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h<br>
+DISTCLEANFILES = include/bspopts.h<br>
+<br>
+nodist_include_HEADERS += ../../shared/include/coverhd.h<br>
+<br>
+noinst_LIBRARIES = libbspstart.a<br>
+libbspstart_a_SOURCES = ../shared/start/start.S<br>
+#libbspstart_a_SOURCES = start/start.S<br>
+project_lib_DATA = start.$(OBJEXT)<br>
+<br>
+dist_project_lib_DATA += startup/linkcmds<br>
+<br>
+noinst_LIBRARIES += libbsp.a<br>
+libbsp_a_SOURCES =<br>
+<br>
+# startup<br>
+libbsp_a_SOURCES += ../shared/startup/bsp-start-memcpy.S<br>
+libbsp_a_SOURCES += ../../shared/bsplibc.c ../../shared/bsppost.c \<br>
+    ../../shared/bsppredriverhook.c ../../shared/bspgetworkarea.c \<br>
+    ../../shared/bsppretaskinghook.c startup/bspstart.c startup/bspidle.c \<br>
+    ../../shared/bspclean.c startup/bspreset.c \<br>
+    startup/memmap.c ../../shared/bootcard.c ../../shared/sbrk.c \<br>
+    ../../shared/gnatinstallhandler.c startup/bspstarthooks.c<br>
+# low-level debug<br>
+libbsp_a_SOURCES += debug/debug.c<br>
+# console<br>
+libbsp_a_SOURCES += console/uart.c ../../shared/console.c \<br>
+    ../../shared/console_select.c  ../../shared/console_control.c \<br>
+    ../../shared/console_read.c ../../shared/console_write.c<br>
+# IRQ<br>
+include_bsp_HEADERS += ../../shared/include/irq-generic.h \<br>
+       ../../shared/include/irq-info.h<br>
+libbsp_a_SOURCES += ../../shared/src/irq-default-handler.c<br>
+libbsp_a_SOURCES += ../../shared/src/irq-generic.c<br>
+libbsp_a_SOURCES += ../../shared/src/irq-info.c<br>
+libbsp_a_SOURCES += ../../shared/src/irq-legacy.c<br>
+libbsp_a_SOURCES += ../../shared/src/irq-server.c<br>
+libbsp_a_SOURCES += ../../shared/src/irq-shell.c<br>
+# abort<br>
+libbsp_a_SOURCES += ../shared/abort/abort.c<br>
+<br>
+libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/arm920.rel \<br>
+    ../../../libcpu/@RTEMS_CPU@/s3c64xx/clock.rel \<br>
+    ../../../libcpu/@RTEMS_CPU@/s3c64xx/irq.rel<br>
+<br>
+include $(srcdir)/<a href="http://preinstall.am" target="_blank">preinstall.am</a><br>
+include $(top_srcdir)/../../../../automake/<a href="http://local.am" target="_blank">local.am</a><br>
diff --git a/c/src/lib/libbsp/arm/tiny6410/README b/c/src/lib/libbsp/arm/tiny6410/README<br>
new file mode 100644<br>
index 0000000..ae936e5<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/tiny6410/README<br>
@@ -0,0 +1,23 @@<br>
+This is the BSP for FriendlyARM tiny6410 board, a single board<br>
+computer using the Samsung S3C6410 SoC CPU.<br>
+S3C6410 is an arm1176jzf-s processor. About the mmu related,<br>
+still use the arm920 mmu management.This may be seperated,<br>
+for there may some difference between 920 and 1176jzf-s.<br>
+<br>
+Most of the hardware configuration is done in uboot.This maybe<br>
+migrated to rtems from uboot in future.<br>
+<br>
+Now only serial and timer is supported, other IP modules' driver<br>
+will be added in future.<br>
+<br>
+hello.exe ticker.exe nsecs.exe runs. Others have not been tested.<br>
+<br>
+How to use this bsp<br>
+1. When downloaded the source, first "bootstrap -c; bootstrap -p;<br>
+bootstrap"<br>
+2. Look at the sh-hello script to know how to configure for this bsp<br>
+4. use dnw to download the bin file to 0xC0104000<br>
+        MINI6410 # dnw 0xc0104000<br>
+        When finished download, use go command to run the bin file<br>
+        MINI6410 # go 0xc0104000<br>
+<br>
diff --git a/c/src/lib/libbsp/arm/tiny6410/bsp_specs b/c/src/lib/libbsp/arm/tiny6410/bsp_specs<br>
new file mode 100644<br>
index 0000000..082653a<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/tiny6410/bsp_specs<br>
@@ -0,0 +1,13 @@<br>
+%rename endfile old_endfile<br>
+%rename startfile old_startfile<br>
+%rename link old_link<br>
+<br>
+*startfile:<br>
+%{!qrtems: %(old_startfile)} \<br>
+%{!nostdlib: %{qrtems: start.o%s crti.o%s crtbegin.o%s -e _start}}<br>
+<br>
+*link:<br>
+%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N}<br>
+<br>
+*endfile:<br>
+%{!qrtems: *(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s }<br>
diff --git a/c/src/lib/libbsp/arm/tiny6410/<a href="http://configure.ac" target="_blank">configure.ac</a> b/c/src/lib/libbsp/arm/tiny6410/<a href="http://configure.ac" target="_blank">configure.ac</a><br>
new file mode 100644<br>
index 0000000..11966e0<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/tiny6410/<a href="http://configure.ac" target="_blank">configure.ac</a><br>
@@ -0,0 +1,23 @@<br>
+## Process this file with autoconf to produce a configure script.<br>
+<br>
+AC_PREREQ([2.69])<br>
+AC_INIT([rtems-c-src-lib-libbsp-arm-tiny6410],[_RTEMS_VERSION],[<a href="http://www.rtems.org/bugzilla" target="_blank">http://www.rtems.org/bugzilla</a>])<br>
+AC_CONFIG_SRCDIR([bsp_specs])<br>
+RTEMS_TOP(../../../../../..)<br>
+<br>
+RTEMS_CANONICAL_TARGET_CPU<br>
+AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2])<br>
+RTEMS_BSP_CONFIGURE<br>
+<br>
+RTEMS_PROG_CC_FOR_TARGET<br>
+RTEMS_CANONICALIZE_TOOLS<br>
+RTEMS_PROG_CCAS<br>
+<br>
+RTEMS_CHECK_NETWORKING<br>
+AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")<br>
+<br>
+RTEMS_BSP_CLEANUP_OPTIONS(0, 1)<br>
+<br>
+# Explicitly list all Makefiles here<br>
+AC_CONFIG_FILES([Makefile])<br>
+AC_OUTPUT<br>
diff --git a/c/src/lib/libbsp/arm/tiny6410/console/uart.c b/c/src/lib/libbsp/arm/tiny6410/console/uart.c<br>
new file mode 100644<br>
index 0000000..46b5edb<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/tiny6410/console/uart.c<br>
@@ -0,0 +1,229 @@<br>
+/*<br>
+ *  console driver for S3C2400 UARTs<br>
+ *<br>
+ *  This driver uses the shared console driver in<br>
+ *  ...../libbsp/shared/console.c<br>
+ *<br>
+ *  If you want the driver to be interrupt driven, you<br>
+ *  need to write the ISR, and in the ISR insert the<br>
+ *  chars into termios's queue.<br>
+ *<br>
+ *  Copyright (c) 2004 Cogent Computer Systems<br>
+ *  Written by Jay Monkman <<a href="mailto:jtm@lopingdog.com" target="_blank">jtm@lopingdog.com</a>><br>
+ *<br>
+ *  The license and distribution terms for this file may be<br>
+ *  found in the file LICENSE in this distribution or at<br>
+ *  <a href="http://www.rtems.com/license/LICENSE" target="_blank">http://www.rtems.com/license/LICENSE</a>.<br>
+ *<br>
+ *<br>
+ * 1. Modified from S3C2400    Peng Fan <a href="mailto:van.freenix@gmail.com" target="_blank">van.freenix@gmail.com</a><br>
+*/<br>
+#include <bsp.h>                /* Must be before libio.h */<br>
+#include <rtems/libio.h><br>
+#include <termios.h><br>
+#include <rtems/bspIo.h><br>
+<br>
+/* Put the CPU (or UART) specific header file #include here */<br>
+#include <s3c64xx.h><br>
+#include <libchip/serial.h><br>
+#include <libchip/sersupp.h><br>
+<br>
+/* How many serial ports? */<br>
+#define NUM_DEVS       1<br>
+<br>
+int     uart_poll_read(int minor);<br>
+<br>
+int dbg_dly;<br>
+<br>
+/* static function prototypes */<br>
+static int     uart_first_open(int major, int minor, void *arg);<br>
+static int     uart_last_close(int major, int minor, void *arg);<br>
+static int     uart_read(int minor);<br>
+static ssize_t uart_write(int minor, const char *buf, size_t len);<br>
+static void    uart_init(int minor);<br>
+static void    uart_write_polled(int minor, char c);<br>
+static int     uart_set_attributes(int minor, const struct termios *t);<br>
+<br>
+/* These are used by code in console.c */<br>
+unsigned long Console_Configuration_Count = NUM_DEVS;<br>
+<br>
+/* Pointers to functions for handling the UART. */<br>
+const console_fns uart_fns =<br>
+{<br>
+    libchip_serial_default_probe,<br>
+    uart_first_open,<br>
+    uart_last_close,<br>
+    uart_read,<br>
+    uart_write,<br>
+    uart_init,<br>
+    uart_write_polled,   /* not used in this driver */<br>
+    uart_set_attributes,<br>
+    FALSE      /* TRUE if interrupt driven, FALSE if not. */<br>
+};<br>
+<br>
+/*<br>
+ * There's one item in array for each UART.<br>
+ *<br>
+ * Some of these fields are marked "NOT USED". They are not used<br>
+ * by console.c, but may be used by drivers in libchip<br>
+ *<br>
+ */<br>
+console_tbl Console_Configuration_Ports[] = {<br>
+    {<br>
+        "/dev/com0",                      /* sDeviceName */<br>
+        SERIAL_CUSTOM,                    /* deviceType */<br>
+        &uart_fns,                        /* pDeviceFns */<br>
+        NULL,                             /* deviceProbe */<br>
+        NULL,                             /* pDeviceFlow */<br>
+        0,                                /* ulMargin - NOT USED */<br>
+        0,                                /* ulHysteresis - NOT USED */<br>
+        NULL,                             /* pDeviceParams */<br>
+        0,                                /* ulCtrlPort1  - NOT USED */<br>
+        0,                                /* ulCtrlPort2  - NOT USED */<br>
+        0,                                /* ulDataPort  - NOT USED */<br>
+        NULL,                             /* getRegister - NOT USED */<br>
+        NULL,                             /* setRegister - NOT USED */<br>
+        NULL,                             /* getData - NOT USED */<br>
+        NULL,                             /* setData - NOT USED */<br>
+        0,                                /* ulClock - NOT USED */<br>
+        0                                 /* ulIntVector - NOT USED */<br>
+    }<br>
+};<br>
+<br>
+/*********************************************************************/<br>
+/* Functions called via termios callbacks (i.e. the ones in uart_fns */<br>
+/*********************************************************************/<br>
+<br>
+/*<br>
+ * This is called the first time each device is opened. If the driver<br>
+ * is interrupt driven, you should enable interrupts here. Otherwise,<br>
+ * it's probably safe to do nothing.<br>
+ *<br>
+ * Since micromonitor already set up the UART, we do nothing.<br>
+ */<br>
+static int uart_first_open(int major, int minor, void *arg)<br>
+{<br>
+    return 0;<br>
+}<br>
+<br>
+<br>
+/*<br>
+ * This is called the last time each device is closed. If the driver<br>
+ * is interrupt driven, you should disable interrupts here. Otherwise,<br>
+ * it's probably safe to do nothing.<br>
+ */<br>
+static int uart_last_close(int major, int minor, void *arg)<br>
+{<br>
+    return 0;<br>
+}<br>
+<br>
+<br>
+/*<br>
+ * Read one character from UART.<br>
+ *<br>
+ * Return -1 if there's no data, otherwise return<br>
+ * the character in lowest 8 bits of returned int.<br>
+ */<br>
+static int uart_read(int minor)<br>
+{<br>
+    char c;<br>
+<br>
+    if (minor == 0) {<br>
+        if (rUTRSTAT0 & 0x1) {<br>
+            c = rURXH0 & 0xff;<br>
+            return c;<br>
+        } else {<br>
+            return -1;<br>
+        }<br>
+    } else {<br>
+        printk("Unknown console minor number: %d\n", minor);<br>
+        return -1;<br>
+    }<br>
+<br>
+}<br>
+<br>
+<br>
+/*<br>
+ * Write buffer to UART<br>
+ *<br>
+ * return 1 on success, -1 on error<br>
+ */<br>
+static ssize_t uart_write(int minor, const char *buf, size_t len)<br>
+{<br>
+    int i;<br>
+<br>
+    if (minor == 0) {<br>
+        for (i = 0; i < len; i++) {<br>
+            /* Wait for fifo to have room */<br>
+            while(!(rUTRSTAT0 & 0x2)) {<br>
+                continue;<br>
+            }<br>
+<br>
+           rUTXH0 = (char) buf[i];<br>
+        }<br>
+    } else {<br>
+        printk("Unknown console minor number: %d\n", minor);<br>
+        return -1;<br>
+    }<br>
+<br>
+    return 1;<br>
+}<br>
+<br>
+<br>
+/* Set up the UART. */<br>
+static void uart_init(int minor)<br>
+{<br>
+       int i;<br>
+       unsigned int reg = 0;<br>
+       /* Migrate the configuration from uboot in future */<br>
+       Uart_SendString(__func__);<br>
+}<br>
+<br>
+/* I'm not sure this is needed for the shared console driver. */<br>
+static void    uart_write_polled(int minor, char c)<br>
+{<br>
+    uart_write(minor, &c, 1);<br>
+}<br>
+<br>
+/* This is for setting baud rate, bits, etc. */<br>
+static int     uart_set_attributes(int minor, const struct termios *t)<br>
+{<br>
+    return 0;<br>
+}<br>
+<br>
+/***********************************************************************/<br>
+/*<br>
+ * The following functions are not used by TERMIOS, but other RTEMS<br>
+ * functions use them instead.<br>
+ */<br>
+/***********************************************************************/<br>
+/*<br>
+ * Read from UART. This is used in the exit code, and can't<br>
+ * rely on interrupts.<br>
+*/<br>
+int uart_poll_read(int minor)<br>
+{<br>
+    return uart_read(minor);<br>
+}<br>
+<br>
+<br>
+/*<br>
+ * Write a character to the console. This is used by printk() and<br>
+ * maybe other low level functions. It should not use interrupts or any<br>
+ * RTEMS system calls. It needs to be very simple<br>
+ */<br>
+static void _BSP_put_char( char c ) {<br>
+    uart_write_polled(0, c);<br>
+    if (c == '\n') {<br>
+        uart_write_polled(0, '\r');<br>
+    }<br>
+}<br>
+<br>
+BSP_output_char_function_type BSP_output_char = _BSP_put_char;<br>
+<br>
+static int _BSP_get_char(void)<br>
+{<br>
+  return uart_poll_read(0);<br>
+}<br>
+<br>
+BSP_polling_getchar_function_type BSP_poll_char = _BSP_get_char;<br>
diff --git a/c/src/lib/libbsp/arm/tiny6410/debug/debug.c b/c/src/lib/libbsp/arm/tiny6410/debug/debug.c<br>
new file mode 100644<br>
index 0000000..139b21e<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/tiny6410/debug/debug.c<br>
@@ -0,0 +1,60 @@<br>
+/**<br>
+ * @file<br>
+ *<br>
+ * @ingroup s3c64xx<br>
+ *<br>
+ * @brief Low level Debug code.<br>
+ */<br>
+<br>
+/*<br>
+ *<br>
+ * The license and distribution terms for this file may be<br>
+ * found in the file LICENSE in this distribution or at<br>
+ * <a href="http://www.rtems.com/license/LICENSE" target="_blank">http://www.rtems.com/license/LICENSE</a>.<br>
+ *<br>
+ */<br>
+<br>
+#include <bsp.h><br>
+#include <s3c64xx.h><br>
+void debug_led(uint32_t val)<br>
+{<br>
+       uint32_t *addr = (uint32_t *)0x7f008800;<br>
+       *addr = val;<br>
+}<br>
+<br>
+<br>
+static void Delay(void)<br>
+{<br>
+    volatile int i;<br>
+<br>
+    for(i=0 ; i < 1000 ; i++)<br>
+    {<br>
+    }<br>
+}<br>
+void Uart_SendByte(int data)<br>
+{<br>
+    while(!(rUTRSTAT0 & 0x2));   //Wait until THR is empty.<br>
+    Delay();<br>
+    rUTXH0 = (unsigned char)data;<br>
+}<br>
+<br>
+void Uart_SendString(char *pt)<br>
+{<br>
+    while(*pt)<br>
+        Uart_SendByte(*pt++);<br>
+    Uart_SendByte('\r');<br>
+    Uart_SendByte('\n');<br>
+}<br>
+void printhex(unsigned int data)<br>
+{<br>
+       int i = 0,a = 0;<br>
+       for (i = 0; i < 8; i++) {<br>
+               a = (data>>(32-(i+1)*4))&0xf;<br>
+               if (((a<=9)&&(a>=0)))<br>
+                       Uart_SendByte(a + 0x30);<br>
+               else if ((a <= 0xf) && (a >= 0xa))<br>
+                       Uart_SendByte(a-0xa+0x61);<br>
+       }<br>
+       Uart_SendByte('\r');<br>
+       Uart_SendByte('\n');<br>
+}<br>
diff --git a/c/src/lib/libbsp/arm/tiny6410/include/bsp.h b/c/src/lib/libbsp/arm/tiny6410/include/bsp.h<br>
new file mode 100644<br>
index 0000000..699fdab<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/tiny6410/include/bsp.h<br>
@@ -0,0 +1,60 @@<br>
+/**<br>
+ *  @file<br>
+ *<br>
+ *  This include file contains definitions related to the GP32 BSP.<br>
+ */<br>
+<br>
+/*<br>
+ *  Copyright (c) 2013<br>
+ *  ASIC Engineering Center<br>
+ *  Nanjing, China<br>
+ *  <<a href="mailto:van.freenix@gmail.com" target="_blank">van.freenix@gmail.com</a>><br>
+ *<br>
+ *  The license and distribution terms for this file may be<br>
+ *  found in the file LICENSE in this distribution or at<br>
+ *  <a href="http://www.rtems.com/license/LICENSE" target="_blank">http://www.rtems.com/license/LICENSE</a>.<br>
+ */<br>
+<br>
+#ifndef _BSP_H<br>
+#define _BSP_H<br>
+<br>
+#ifdef __cplusplus<br>
+extern "C" {<br>
+#endif<br>
+<br>
+#include <bspopts.h><br>
+#include <bsp/default-initial-extension.h><br>
+<br>
+#include <rtems.h><br>
+#include <rtems/iosupp.h><br>
+#include <rtems/console.h><br>
+#include <rtems/clockdrv.h><br>
+#include <s3c64xx.h><br>
+<br>
+#define BSP_FEATURE_IRQ_EXTENSION<br>
+<br>
+<br>
+/*functions to get the differents s3c2400 clks*/<br>
+uint32_t get_FCLK(void);<br>
+uint32_t get_HCLK(void);<br>
+uint32_t get_PCLK(void);<br>
+uint32_t get_UCLK(void);<br>
+<br>
+<br>
+<br>
+<br>
+/*<br>
+ *  This BSP provides its own IDLE thread to override the RTEMS one.<br>
+ *  So we prototype it and define the constant confdefs.h expects<br>
+ *  to configure a BSP specific one.<br>
+ */<br>
+void *bsp_idle_thread(uintptr_t ignored);<br>
+<br>
+#define BSP_IDLE_TASK_BODY bsp_idle_thread<br>
+<br>
+#ifdef __cplusplus<br>
+}<br>
+#endif<br>
+<br>
+#endif /* _BSP_H */<br>
+<br>
diff --git a/c/src/lib/libbsp/arm/tiny6410/make/custom/tiny6410.cfg b/c/src/lib/libbsp/arm/tiny6410/make/custom/tiny6410.cfg<br>
new file mode 100644<br>
index 0000000..44b0ca6<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/tiny6410/make/custom/tiny6410.cfg<br>
@@ -0,0 +1,21 @@<br>
+#<br>
+#  Config file for ARM S3C6410<br>
+#<br>
+<br>
+include $(RTEMS_ROOT)/make/custom/default.cfg<br>
+<br>
+RTEMS_CPU=arm<br>
+RTEMS_CPU_MODEL=s3c6410<br>
+<br>
+#  This contains the compiler options necessary to select the CPU model<br>
+#  and (hopefully) optimize for it.<br>
+#<br>
+CPU_CFLAGS = -mstructure-size-boundary=32 -mcpu=arm1176jzf-s -mfpu=vfp -mfloat-abi=soft -DCPU_S3C6410<br>
+<br>
+# optimize flag: typically -O2<br>
+CFLAGS_OPTIMIZE_V = -O2 -g<br>
+<br>
+define bsp-post-link<br>
+       $(OBJCOPY) -O binary $(basename $@).exe $(basename $@)$(DOWNEXT)<br>
+       $(default-bsp-post-link)<br>
+endef<br>
diff --git a/c/src/lib/libbsp/arm/tiny6410/<a href="http://preinstall.am" target="_blank">preinstall.am</a> b/c/src/lib/libbsp/arm/tiny6410/<a href="http://preinstall.am" target="_blank">preinstall.am</a><br>
new file mode 100644<br>
index 0000000..ca20008<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/tiny6410/<a href="http://preinstall.am" target="_blank">preinstall.am</a><br>
@@ -0,0 +1,83 @@<br>
+## Automatically generated by ampolish3 - Do not edit<br>
+<br>
+if AMPOLISH3<br>
+$(srcdir)/<a href="http://preinstall.am" target="_blank">preinstall.am</a>: Makefile.am<br>
+       $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/<a href="http://preinstall.am" target="_blank">preinstall.am</a><br>
+endif<br>
+<br>
+PREINSTALL_DIRS =<br>
+DISTCLEANFILES += $(PREINSTALL_DIRS)<br>
+<br>
+all-local: $(TMPINSTALL_FILES)<br>
+<br>
+TMPINSTALL_FILES =<br>
+CLEANFILES = $(TMPINSTALL_FILES)<br>
+<br>
+all-am: $(PREINSTALL_FILES)<br>
+<br>
+PREINSTALL_FILES =<br>
+CLEANFILES += $(PREINSTALL_FILES)<br>
+<br>
+$(PROJECT_LIB)/$(dirstamp):<br>
+       @$(MKDIR_P) $(PROJECT_LIB)<br>
+       @: > $(PROJECT_LIB)/$(dirstamp)<br>
+PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)<br>
+<br>
+$(PROJECT_INCLUDE)/$(dirstamp):<br>
+       @$(MKDIR_P) $(PROJECT_INCLUDE)<br>
+       @: > $(PROJECT_INCLUDE)/$(dirstamp)<br>
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)<br>
+<br>
+$(PROJECT_INCLUDE)/bsp/$(dirstamp):<br>
+       @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp<br>
+       @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)<br>
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)<br>
+<br>
+$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)<br>
+       $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs<br>
+PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs<br>
+<br>
+$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)<br>
+       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h<br>
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h<br>
+<br>
+$(PROJECT_INCLUDE)/tm27.h: ../../shared/include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)<br>
+       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h<br>
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h<br>
+<br>
+$(PROJECT_INCLUDE)/bsp/start.h: ../shared/include/start.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)<br>
+       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/start.h<br>
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/start.h<br>
+<br>
+$(PROJECT_INCLUDE)/bsp/linker-symbols.h: ../shared/include/linker-symbols.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)<br>
+       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/linker-symbols.h<br>
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/linker-symbols.h<br>
+<br>
+$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)<br>
+       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h<br>
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h<br>
+<br>
+$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)<br>
+       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h<br>
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h<br>
+<br>
+$(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)<br>
+       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h<br>
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h<br>
+<br>
+$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)<br>
+       $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)<br>
+TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)<br>
+<br>
+$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)<br>
+       $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds<br>
+PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds<br>
+<br>
+$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)<br>
+       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h<br>
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h<br>
+<br>
+$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)<br>
+       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h<br>
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h<br>
+<br>
diff --git a/c/src/lib/libbsp/arm/tiny6410/sh-hello b/c/src/lib/libbsp/arm/tiny6410/sh-hello<br>
new file mode 100755<br>
index 0000000..2ca81d6<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/tiny6410/sh-hello<br>
@@ -0,0 +1,13 @@<br>
+#!/bin/sh<br>
+mkdir build<br>
+cd build<br>
+../rtems/configure --target=arm-rtemseabi4.11 --enable-rtemsbsp="tiny6410" --enable-test=samples --disable-posix<br>
+rm `find . -name hello.exe`<br>
+gmake all<br>
+rm hello.*<br>
+rm init.*<br>
+cp  -f `find . -name hello.exe` .<br>
+cp arm-rtemseabi4.11/c/tiny6410/testsuites/samples/hello/init.o .<br>
+arm-rtemseabi4.11-objcopy -O binary -S hello.exe hello.bin<br>
+arm-rtemseabi4.11-objdump -D hello.exe > hello.s<br>
+arm-rtemseabi4.11-objdump -D init.o > init.s<br>
diff --git a/c/src/lib/libbsp/arm/tiny6410/startup/bspidle.c b/c/src/lib/libbsp/arm/tiny6410/startup/bspidle.c<br>
new file mode 100644<br>
index 0000000..6bc8088<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/tiny6410/startup/bspidle.c<br>
@@ -0,0 +1,25 @@<br>
+/*<br>
+ *  BSP specific Idle thread<br>
+ */<br>
+<br>
+/*<br>
+ *  Copyright (c) 2000 Canon Research Centre France SA.<br>
+ *  Emmanuel Raguet, mailto:<a href="mailto:raguet@crf.canon.fr" target="_blank">raguet@crf.canon.fr</a><br>
+ *<br>
+ *  The license and distribution terms for this file may be<br>
+ *  found in the file LICENSE in this distribution or at<br>
+ *  <a href="http://www.rtems.com/license/LICENSE" target="_blank">http://www.rtems.com/license/LICENSE</a>.<br>
+ *<br>
+ *  1.Copied from gp32<br>
+ */<br>
+<br>
+#include <bsp.h><br>
+<br>
+void *bsp_idle_thread(uintptr_t ignored)<br>
+{<br>
+  while(1) {<br>
+    __asm__ volatile ("MCR p15,0,r0,c7,c0,4     \n");<br>
+  }<br>
+  return NULL;<br>
+}<br>
+<br>
diff --git a/c/src/lib/libbsp/arm/tiny6410/startup/bspreset.c b/c/src/lib/libbsp/arm/tiny6410/startup/bspreset.c<br>
new file mode 100644<br>
index 0000000..0d52df7<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/tiny6410/startup/bspreset.c<br>
@@ -0,0 +1,37 @@<br>
+/*<br>
+ *  The license and distribution terms for this file may be<br>
+ *  found in the file LICENSE in this distribution or at<br>
+ *  <a href="http://www.rtems.com/license/LICENSE" target="_blank">http://www.rtems.com/license/LICENSE</a>.<br>
+ *  1. Copied from gp32<br>
+ */<br>
+<br>
+#include <bsp.h><br>
+<br>
+void bsp_reset(void)<br>
+{<br>
+  rtems_interrupt_level level;<br>
+  rtems_interrupt_disable(level);<br>
+  /* disable mmu, invalide i-cache and call swi #4 */<br>
+  __asm__ volatile(""<br>
+    "mrc    p15,0,r0,c1,c0,0  \n"<br>
+    "bic    r0,r0,#1          \n"<br>
+    "mcr    p15,0,r0,c1,c0,0  \n"<br>
+    "nop                      \n"<br>
+    "nop                      \n"<br>
+    "nop                      \n"<br>
+    "nop                      \n"<br>
+    "nop                      \n"<br>
+    "mov    r0,#0             \n"<br>
+    "MCR    p15,0,r0,c7,c5,0  \n"<br>
+    "nop                      \n"<br>
+    "nop                      \n"<br>
+    "nop                      \n"<br>
+    "nop                      \n"<br>
+    "nop                      \n"<br>
+    "swi    #4                "<br>
+    :<br>
+    :<br>
+    : "r0"<br>
+  );<br>
+  /* we should be back in bios now */<br>
+}<br>
diff --git a/c/src/lib/libbsp/arm/tiny6410/startup/bspstart.c b/c/src/lib/libbsp/arm/tiny6410/startup/bspstart.c<br>
new file mode 100644<br>
index 0000000..09eded1<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/tiny6410/startup/bspstart.c<br>
@@ -0,0 +1,83 @@<br>
+/*<br>
+ * This file contains the ARM BSP startup package. It includes application,<br>
+ * board, and monitor specific initialization and configuration. The generic CPU<br>
+ * dependent initialization has been performed before this routine is invoked.<br>
+ */<br>
+<br>
+/*<br>
+ *  Copyright (c) 2000 Canon Research Centre France SA.<br>
+ *  Emmanuel Raguet, mailto:<a href="mailto:raguet@crf.canon.fr" target="_blank">raguet@crf.canon.fr</a><br>
+ *<br>
+ *  The license and distribution terms for this file may be<br>
+ *  found in the file LICENSE in this distribution or at<br>
+ *  <a href="http://www.rtems.com/license/LICENSE" target="_blank">http://www.rtems.com/license/LICENSE</a>.<br>
+ *<br>
+ *  1. Modified from gp32      Peng Fan <a href="mailto:van.freenix@gmail.com" target="_blank">van.freenix@gmail.com</a><br>
+ */<br>
+<br>
+#include <bsp.h><br>
+#include <bsp/irq-generic.h><br>
+#include <rtems/bspIo.h><br>
+#include <s3c64xx.h><br>
+<br>
+/*<br>
+ * External Prototypes<br>
+ */<br>
+extern void rtems_exception_init_mngt(void);<br>
+<br>
+/*<br>
+ *  BSP Specific Initialization in C<br>
+ */<br>
+void bsp_start_default( void )<br>
+{<br>
+  uint32_t cr;<br>
+  uint32_t pend,last;<br>
+  uint32_t REFCNT;<br>
+  uint32_t i;<br>
+<br>
+  /* stop RTC */<br>
+  rTICCNT = 0x0;<br>
+<br>
+  /* stop watchdog,ADC and timers */<br>
+  rWTCON = 0x0;<br>
+  rTCON = 0x0;<br>
+  rADCCON = 0x0;<br>
+<br>
+  /* disable interrupts */<br>
+  rVIC0_INTENCLEAR = 0x0;<br>
+  rVIC1_INTENCLEAR = 0x0;<br>
+  /* interrupt select, irq or fiq?*/<br>
+  rVIC0_INTSELECT = 0x0;<br>
+  rVIC1_INTSELECT = 0x0;<br>
+<br>
+  /* clear external interrupt pending*/<br>
+  rEINT0PEND = ~0x0; /* write 1 to clear */<br>
+<br>
+  /* clear pending interrupt */<br>
+  rVIC0_ADDRESS = 0x0;<br>
+  rVIC1_ADDRESS = 0x0;<br>
+<br>
+<br>
+#if 0<br>
+  /* system clock may be migrated to here from uboot */<br>
+  /* setup clocks */<br>
+#endif<br>
+<br>
+  Uart_SendString(__func__);<br>
+  /*<br>
+   * Init rtems exceptions management<br>
+   */<br>
+  rtems_exception_init_mngt();<br>
+<br>
+  /*<br>
+   * Init rtems interrupt management<br>
+   */<br>
+  bsp_interrupt_initialize();<br>
+}<br>
+<br>
+/*<br>
+ *  By making this a weak alias for bsp_start_default, a brave soul<br>
+ *  can override the actual bsp_start routine used.<br>
+ */<br>
+<br>
+void bsp_start (void) __attribute__ ((weak, alias("bsp_start_default")));<br>
diff --git a/c/src/lib/libbsp/arm/tiny6410/startup/bspstarthooks.c b/c/src/lib/libbsp/arm/tiny6410/startup/bspstarthooks.c<br>
new file mode 100644<br>
index 0000000..31e359c<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/tiny6410/startup/bspstarthooks.c<br>
@@ -0,0 +1,146 @@<br>
+/**<br>
+ * @file<br>
+ *<br>
+ * @ingroup s3c64xx<br>
+ *<br>
+ * @brief Startup code.<br>
+ */<br>
+<br>
+/*<br>
+ * Copyright (c) 2009-2011 embedded brains GmbH.  All rights reserved.<br>
+ *<br>
+ *  embedded brains GmbH<br>
+ *  Obere Lagerstr. 30<br>
+ *  82178 Puchheim<br>
+ *  Germany<br>
+ *  <<a href="mailto:rtems@embedded-brains.de" target="_blank">rtems@embedded-brains.de</a>><br>
+ *<br>
+ * The license and distribution terms for this file may be<br>
+ * found in the file LICENSE in this distribution or at<br>
+ * <a href="http://www.rtems.com/license/LICENSE" target="_blank">http://www.rtems.com/license/LICENSE</a>.<br>
+ *<br>
+ * 1. Modified from lpc32xx    Peng Fan        <a href="mailto:van.freenix@gmail.com" target="_blank">van.freenix@gmail.com</a><br>
+ */<br>
+<br>
+#include <bsp.h><br>
+#include <bsp/start.h><br>
+#include <bsp/irq.h><br>
+#include <bsp/linker-symbols.h><br>
+#include <libcpu/arm-cp15.h><br>
+#include <libcpu/mmu.h><br>
+//#include <bsp/uart-output-char.h> //fanpeng<br>
+<br>
+#include <s3c64xx.h><br>
+<br>
+extern void bsp_reset(void);<br>
+<br>
+<br>
+void SWI_Handler(void)<br>
+{<br>
+       Uart_SendString("swi handler");<br>
+       while(1);<br>
+}<br>
+static BSP_START_TEXT_SECTION void clear_bss(void)<br>
+{<br>
+  const int *end = (const int *) bsp_section_bss_end;<br>
+  int *out = (int *) bsp_section_bss_begin;<br>
+<br>
+  /* Clear BSS */<br>
+  while (out != end) {<br>
+    *out = 0;<br>
+    ++out;<br>
+  }<br>
+}<br>
+<br>
+extern mmu_sect_map_t mem_map[];<br>
+static BSP_START_TEXT_SECTION void setup_mmu_and_cache(void)<br>
+{<br>
+  uint32_t ctrl = 0;<br>
+<br>
+  /* Disable MMU and cache, basic settings */<br>
+  ctrl = arm_cp15_get_control();<br>
+  ctrl &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_R | ARM_CP15_CTRL_C<br>
+    | ARM_CP15_CTRL_V | ARM_CP15_CTRL_M);<br>
+  ctrl |=  ARM_CP15_CTRL_A;<br>
+  arm_cp15_set_control(ctrl);<br>
+<br>
+  arm_cp15_data_cache_clean_and_invalidate();<br>
+  arm_cp15_cache_invalidate(); //cache clean and invalidate ??<br>
+  arm_cp15_tlb_invalidate();<br>
+<br>
+  #ifndef S3C64XX_DISABLE_MMU<br>
+    mmu_init(mem_map);<br>
+  #endif<br>
+}<br>
+<br>
+static BSP_START_TEXT_SECTION void setup_pll(void)<br>
+{<br>
+}<br>
+<br>
+BSP_START_TEXT_SECTION void bsp_start_hook_0(void)<br>
+{<br>
+  setup_pll();<br>
+  setup_mmu_and_cache();<br>
+}<br>
+<br>
+static BSP_START_TEXT_SECTION void stop_dma_activities(void)<br>
+{<br>
+}<br>
+<br>
+static BSP_START_TEXT_SECTION void setup_uarts(void)<br>
+{<br>
+}<br>
+<br>
+static BSP_START_TEXT_SECTION void setup_timer(void)<br>
+{<br>
+       /* May be removed */<br>
+}<br>
+<br>
+/* vector_begin will be copied to address 0 */<br>
+uint32_t vector_begin[] = {<br>
+       0xe59ff018, //ldr     pc, [pc, #24]<br>
+       0xe59ff018,<br>
+       0xe59ff018,<br>
+       0xe59ff018,<br>
+       0xe59ff018,<br>
+       0xe320f000, //nop<br>
+       0xe59ff018,<br>
+       0xe59ff018,<br>
+<br>
+       /***************/<br>
+       bsp_reset,<br>
+       0xe320f000, //nop<br>
+       0xe320f000, //nop<br>
+       0xe320f000, //nop<br>
+       0xe320f000, //nop<br>
+       0xe320f000, //nop<br>
+       0xe320f000, //nop<br>
+       0xe320f000, //nop<br>
+};<br>
+<br>
+BSP_START_TEXT_SECTION void bsp_start_hook_1(void)<br>
+{<br>
+  int i = 0;<br>
+  stop_dma_activities();<br>
+  setup_uarts();<br>
+  setup_timer();<br>
+<br>
+  arm_cp15_data_cache_clean_and_invalidate();<br>
+  arm_cp15_cache_invalidate(); //??<br>
+<br>
+  /* Copy vector table to address 0*/<br>
+  bsp_start_memcpy(<br>
+         (int *)0,<br>
+         (const int*)vector_begin,<br>
+         (size_t)64<br>
+  );<br>
+<br>
+  /* VIC is not enabled for this vector interrupt processor,<br>
+   * This may be done in the future to use vector interrupt.<br>
+   */<br>
+<br>
+  /* Clear .bss section */<br>
+  clear_bss();<br>
+<br>
+  /* At this point we can use objects outside the .start section */<br>
+}<br>
diff --git a/c/src/lib/libbsp/arm/tiny6410/startup/linkcmds b/c/src/lib/libbsp/arm/tiny6410/startup/linkcmds<br>
new file mode 100644<br>
index 0000000..dc48a57<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/tiny6410/startup/linkcmds<br>
@@ -0,0 +1,25 @@<br>
+MEMORY {<br>
+       SDRAM_INTERRUPT : ORIGIN = 0x50000000, LENGTH = 4k<br>
+       SDRAM_MMU : ORIGIN = 0x50100000, LENGTH = 16k<br>
+       SDRAM : ORIGIN = 0x50104000, LENGTH = 128M - 1M - 16k<br>
+}<br>
+<br>
+REGION_ALIAS ("REGION_START", SDRAM);<br>
+REGION_ALIAS ("REGION_VECTOR", SDRAM);<br>
+REGION_ALIAS ("REGION_TEXT", SDRAM);<br>
+REGION_ALIAS ("REGION_TEXT_LOAD", SDRAM);<br>
+REGION_ALIAS ("REGION_RODATA", SDRAM);<br>
+REGION_ALIAS ("REGION_RODATA_LOAD", SDRAM);<br>
+REGION_ALIAS ("REGION_DATA", SDRAM);<br>
+REGION_ALIAS ("REGION_DATA_LOAD", SDRAM);<br>
+REGION_ALIAS ("REGION_FAST_TEXT", SDRAM);<br>
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", SDRAM);<br>
+REGION_ALIAS ("REGION_FAST_DATA", SDRAM);<br>
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", SDRAM);<br>
+REGION_ALIAS ("REGION_BSS", SDRAM);<br>
+REGION_ALIAS ("REGION_WORK", SDRAM);<br>
+REGION_ALIAS ("REGION_STACK", SDRAM);<br>
+<br>
+_ttbl_base = ORIGIN (SDRAM_MMU);<br>
+<br>
+INCLUDE linkcmds.armv6<br>
diff --git a/c/src/lib/libbsp/arm/tiny6410/startup/memmap.c b/c/src/lib/libbsp/arm/tiny6410/startup/memmap.c<br>
new file mode 100644<br>
index 0000000..aa0b7f9<br>
--- /dev/null<br>
+++ b/c/src/lib/libbsp/arm/tiny6410/startup/memmap.c<br>
@@ -0,0 +1,29 @@<br>
+/*<br>
+ *  s3c6410 Memory Map<br>
+ *<br>
+ *  Copyright (c) 2004 by Cogent Computer Systems<br>
+ *  Written by Jay Monkman <<a href="mailto:jtm@lopingdog.com" target="_blank">jtm@lopingdog.com</a>><br>
+ *<br>
+ *  The license and distribution terms for this file may be<br>
+ *  found in the file LICENSE in this distribution or at<br>
+ *  <a href="http://www.rtems.com/license/LICENSE" target="_blank">http://www.rtems.com/license/LICENSE</a>.<br>
+ *<br>
+ *  1. Modified from gp32      Peng Fan <a href="mailto:van.freenix@gmail.com" target="_blank">van.freenix@gmail.com</a><br>
+ */<br>
+#include <rtems.h><br>
+#include <libcpu/mmu.h><br>
+<br>
+/*ARM1176jzf-s consider TLB related*/<br>
+/*Here not implement 2-level page table considering tlb miss<br>
+  Maybe a tlb management structure should be implemented.<br>
+       To real time task, TLB entry is locked and should not incur<br>
+       TLB miss. But to non real time task, TLB miss is not cared<br>
+       Not sure about this. May have a try to do this in future<br>
+*/<br>
+mmu_sect_map_t mem_map[] = {<br>
+/*  <phys addr>  <virt addr> <size> <flags> */<br>
+    {0x00000000, 0x00000000, 4096, MMU_CACHE_NONE},<br>
+    {0x50000000, 0x00000000, 1, MMU_CACHE_NONE},<br>
+    {0x50000000, 0x50000000, 128, MMU_CACHE_NONE},<br>
+    {0x00000000, 0x00000000,   0,    0}                   /* The end */<br>
+};<br>
diff --git a/c/src/lib/libcpu/arm/Makefile.am b/c/src/lib/libcpu/arm/Makefile.am<br>
index e488c45..e978910 100644<br>
--- a/c/src/lib/libcpu/arm/Makefile.am<br>
+++ b/c/src/lib/libcpu/arm/Makefile.am<br>
@@ -157,6 +157,31 @@ s3c24xx_irq_rel_CPPFLAGS = $(AM_CPPFLAGS)<br>
 s3c24xx_irq_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)<br>
 endif<br>
<br>
+if s3c64xx<br>
+include_HEADERS = s3c64xx/include/s3c64xx.h s3c64xx/include/s3c6410.h<br>
+<br>
+## s3c64xx/clock<br>
+noinst_PROGRAMS += s3c64xx/clock.rel<br>
+s3c64xx_clock_rel_SOURCES = s3c64xx/clock/clockdrv.c s3c64xx/clock/support.c<br>
+s3c64xx_clock_rel_CPPFLAGS = $(AM_CPPFLAGS)<br>
+s3c64xx_clock_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)<br>
+<br>
+## s3c64xx/timer<br>
+#noinst_PROGRAMS += s3c64xx/timer.rel<br>
+#s3c64xx_timer_rel_SOURCES = s3c64xx/timer/timer.c<br>
+#s3c64xx_timer_rel_CPPFLAGS = $(AM_CPPFLAGS)<br>
+#s3c64xx_timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)<br>
+<br>
+## s3c64xx/interrupt<br>
+include_bsp_HEADERS += s3c64xx/irq/irq.h<br>
+<br>
+noinst_PROGRAMS += s3c64xx/irq.rel<br>
+s3c64xx_irq_rel_SOURCES = s3c64xx/irq/irq.c \<br>
+    s3c64xx/irq/irq.h<br>
+s3c64xx_irq_rel_CPPFLAGS = $(AM_CPPFLAGS)<br>
+s3c64xx_irq_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)<br>
+endif<br>
+<br>
 if lpc22xx<br>
 include_HEADERS = lpc22xx/include/lpc22xx.h<br>
<br>
diff --git a/c/src/lib/libcpu/arm/<a href="http://configure.ac" target="_blank">configure.ac</a> b/c/src/lib/libcpu/arm/<a href="http://configure.ac" target="_blank">configure.ac</a><br>
index ae0967b..4f3ebea 100644<br>
--- a/c/src/lib/libcpu/arm/<a href="http://configure.ac" target="_blank">configure.ac</a><br>
+++ b/c/src/lib/libcpu/arm/<a href="http://configure.ac" target="_blank">configure.ac</a><br>
@@ -23,6 +23,7 @@ AM_CONDITIONAL(shared, test "$RTEMS_CPU_MODEL" = "at91rm9200" || \<br>
                       test "$RTEMS_CPU_MODEL" = "mc9328mxl" || \<br>
                       test "$RTEMS_CPU_MODEL" = "s3c2410" || \<br>
                       test "$RTEMS_CPU_MODEL" = "s3c2400" || \<br>
+                      test "$RTEMS_CPU_MODEL" = "s3c6410" || \<br>
                       test "$RTEMS_CPU_MODEL" = "pxa255")<br>
<br>
 AM_CONDITIONAL(at91rm9200, test "$RTEMS_CPU_MODEL" = "at91rm9200")<br>
@@ -31,6 +32,7 @@ AM_CONDITIONAL(lpc22xx, test "$RTEMS_CPU_MODEL" = "lpc22xx")<br>
 AM_CONDITIONAL(pxa255, test "$RTEMS_CPU_MODEL" = "pxa255")<br>
 AM_CONDITIONAL(s3c24xx, test "$RTEMS_CPU_MODEL" = "s3c2400" ||\<br>
                         test "$RTEMS_CPU_MODEL" = "s3c2410")<br>
+AM_CONDITIONAL(s3c64xx, test "$RTEMS_CPU_MODEL" = "s3c6410")<br>
<br>
 RTEMS_AMPOLISH3<br>
<br>
diff --git a/c/src/lib/libcpu/arm/<a href="http://preinstall.am" target="_blank">preinstall.am</a> b/c/src/lib/libcpu/arm/<a href="http://preinstall.am" target="_blank">preinstall.am</a><br>
index 751a085..0a8109c 100644<br>
--- a/c/src/lib/libcpu/arm/<a href="http://preinstall.am" target="_blank">preinstall.am</a><br>
+++ b/c/src/lib/libcpu/arm/<a href="http://preinstall.am" target="_blank">preinstall.am</a><br>
@@ -113,6 +113,19 @@ $(PROJECT_INCLUDE)/bsp/irq.h: s3c24xx/irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstam<br>
        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h<br>
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h<br>
 endif<br>
+if s3c64xx<br>
+$(PROJECT_INCLUDE)/s3c64xx.h: s3c64xx/include/s3c64xx.h $(PROJECT_INCLUDE)/$(dirstamp)<br>
+       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/s3c64xx.h<br>
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/s3c64xx.h<br>
+<br>
+$(PROJECT_INCLUDE)/s3c6410.h: s3c64xx/include/s3c6410.h $(PROJECT_INCLUDE)/$(dirstamp)<br>
+       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/s3c6410.h<br>
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/s3c6410.h<br>
+<br>
+$(PROJECT_INCLUDE)/bsp/irq.h: s3c64xx/irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)<br>
+       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h<br>
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h<br>
+endif<br>
 if lpc22xx<br>
 $(PROJECT_INCLUDE)/lpc22xx.h: lpc22xx/include/lpc22xx.h $(PROJECT_INCLUDE)/$(dirstamp)<br>
        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/lpc22xx.h<br>
diff --git a/c/src/lib/libcpu/arm/s3c64xx/clock/clockdrv.c b/c/src/lib/libcpu/arm/s3c64xx/clock/clockdrv.c<br>
new file mode 100644<br>
index 0000000..5893014<br>
--- /dev/null<br>
+++ b/c/src/lib/libcpu/arm/s3c64xx/clock/clockdrv.c<br>
@@ -0,0 +1,141 @@<br>
+/*<br>
+ *  S3C6410 clock specific using the System Timer<br>
+ *<br>
+ *  This is hardware specific part of the clock driver. At the end of this<br>
+ *  file, the generic part of the driver is #included.<br>
+ *<br>
+ *  The license and distribution terms for this file may be<br>
+ *  found in the file LICENSE in this distribution or at<br>
+ *  <a href="http://www.rtems.com/license/LICENSE" target="_blank">http://www.rtems.com/license/LICENSE</a>.<br>
+ *<br>
+ *  1. modified from S3C2440   Peng Fan <a href="mailto:van.freenix@gmail.com" target="_blank">van.freenix@gmail.com</a><br>
+ */<br>
+<br>
+#include <rtems.h><br>
+#include <bsp/irq.h><br>
+#include <bsp.h><br>
+#include <s3c64xx.h><br>
+<br>
+void Clock_isr(rtems_irq_hdl_param arg);<br>
+static void clock_isr_on(const rtems_irq_connect_data *unused);<br>
+static void clock_isr_off(const rtems_irq_connect_data *unused);<br>
+static int clock_isr_is_on(const rtems_irq_connect_data *irq);<br>
+<br>
+rtems_irq_connect_data clock_isr_data = {<br>
+  .name   = BSP_TIMER4,<br>
+  .hdl    = Clock_isr,<br>
+  .handle = NULL,<br>
+  .on     = clock_isr_on,<br>
+  .off    = clock_isr_off,<br>
+  .isOn   = clock_isr_is_on,<br>
+};<br>
+<br>
+/**<br>
+ *  Return the nanoseconds since last tick<br>
+ */<br>
+uint32_t clock_driver_get_nanoseconds_since_last_tick(void)<br>
+{<br>
+  return 0;<br>
+}<br>
+<br>
+#define Clock_driver_nanoseconds_since_last_tick \<br>
+  clock_driver_get_nanoseconds_since_last_tick<br>
+<br>
+/**<br>
+ * When we get the clock interrupt<br>
+ *    - clear the interrupt bit?<br>
+ *    - restart the timer?<br>
+        Clear BIT_TIMER4 interrupt;                   \<br>
+ */<br>
+#define Clock_driver_support_at_tick()                \<br>
+  do {                                                \<br>
+         rTINT_CSTAT |= 1 << 9;\<br>
+  } while(0)<br>
+<br>
+/**<br>
+ * Installs the clock ISR. You shouldn't need to change this.<br>
+ */<br>
+extern uint32_t *VIC0_VECTADDR;<br>
+extern uint32_t *VIC1_VECTADDR;<br>
+#define Clock_driver_support_install_isr( _new, _old ) \<br>
+  do {                                                 \<br>
+    _old = NULL;                                       \<br>
+    VIC0_VECTADDR[BSP_TIMER4] = _new;                  \<br>
+    rtems_interrupt_handler_install(<a href="http://clock_isr_data.name" target="_blank">clock_isr_data.name</a>,\<br>
+                   "TICK TIMER",\<br>
+                   RTEMS_INTERRUPT_UNIQUE,\<br>
+                   clock_isr_data.hdl,\<br>
+                   clock_isr_data.handle);\<br>
+  } while(0)<br>
+<br>
+<br>
+/**<br>
+ * Initialize the hardware for the clock<br>
+ *   - Set the frequency<br>
+ *   - enable it<br>
+ *   - clear any pending interrupts<br>
+ *<br>
+ * Since you may want the clock always running, you can<br>
+ * enable interrupts here. If you do so, the clock_isr_on(),<br>
+ * clock_isr_off(), and clock_isr_is_on() functions can be<br>
+ * NOPs.<br>
+ */<br>
+/**<br>
+ * The bit and constant number should be redifined using macros<br>
+ */<br>
+#define Clock_driver_support_initialize_hardware() \<br>
+  do { \<br>
+         rTCON = 0x0;\<br>
+         rTINT_CSTAT |= 1 << 4;\<br>
+         bsp_interrupt_vector_enable(BSP_TIMER4);\<br>
+         rTCFG0 = 0x0101;\<br>
+         rTCFG1 = (rTCFG1 & 0xf0000) | 0x40000;\<br>
+         rTCNTB4 = 0x512d;\<br>
+         rTCON = (rTCON & ~0x00700000) | (1<<22) | (1<<21);\<br>
+         rTCON = (rTCON & ~0x00700000) | (1<<22) | (1<<20);\<br>
+         /* auto load, start Timer 4 */\<br>
+    } while (0)<br>
+<br>
+/**<br>
+ * Do whatever you need to shut the clock down and remove the<br>
+ * interrupt handler. Since this normally only gets called on<br>
+ * RTEMS shutdown, you may not need to do anything other than<br>
+ * remove the ISR.<br>
+ */<br>
+#define Clock_driver_support_shutdown_hardware()                        \<br>
+  do {                                                                  \<br>
+        /* Disable timer */ \<br>
+        BSP_remove_rtems_irq_handler(&clock_isr_data);                  \<br>
+     } while (0)<br>
+<br>
+/**<br>
+ * Enables clock interrupt.<br>
+ *<br>
+ * If the interrupt is always on, this can be a NOP.<br>
+ */<br>
+static void clock_isr_on(const rtems_irq_connect_data *unused)<br>
+{<br>
+}<br>
+<br>
+/**<br>
+ * Disables clock interrupts<br>
+ *<br>
+ * If the interrupt is always on, this can be a NOP.<br>
+ */<br>
+static void clock_isr_off(const rtems_irq_connect_data *unused)<br>
+{<br>
+    return;<br>
+}<br>
+<br>
+/**<br>
+ * Tests to see if clock interrupt is enabled, and returns 1 if so.<br>
+ * If interrupt is not enabled, returns 0.<br>
+ *<br>
+ * If the interrupt is always on, this always returns 1.<br>
+ */<br>
+static int clock_isr_is_on(const rtems_irq_connect_data *irq)<br>
+{<br>
+}<br>
+<br>
+/* Make sure to include this, and only at the end of the file */<br>
+#include "../../../../libbsp/shared/clockdrv_shell.h"<br>
diff --git a/c/src/lib/libcpu/arm/s3c64xx/clock/support.c b/c/src/lib/libcpu/arm/s3c64xx/clock/support.c<br>
new file mode 100644<br>
index 0000000..f4a853c<br>
--- /dev/null<br>
+++ b/c/src/lib/libcpu/arm/s3c64xx/clock/support.c<br>
@@ -0,0 +1,51 @@<br>
+/*<br>
+ * 1. Modified from S3C2440    Peng Fan <a href="mailto:van.freenix@gmail.com" target="_blank">van.freenix@gmail.com</a><br>
+ *<br>
+ * Note: Now the clock related setting is done in uboot.<br>
+ *      This will be fixed in future<br>
+ */<br>
+#include <rtems.h><br>
+#include <bsp.h><br>
+#include <s3c64xx.h><br>
+<br>
+/* ------------------------------------------------------------------------- */<br>
+/* NOTE: This describes the proper use of this file.<br>
+ *<br>
+ * BSP_OSC_FREQ should be defined as the input frequency of the PLL.<br>
+ *<br>
+ * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of<br>
+ * the specified bus in HZ.<br>
+ */<br>
+/* ------------------------------------------------------------------------- */<br>
+<br>
+uint32_t *VIC0_VECTADDR = (uint32_t *)VIC0_VECTADDR_BASE;<br>
+uint32_t *VIC1_VECTADDR = (uint32_t *)VIC1_VECTADDR_BASE;<br>
+/* return FCLK frequency */<br>
+uint32_t get_FCLK(void)<br>
+{<br>
+       /* not implemented */<br>
+       return 0;<br>
+}<br>
+<br>
+/* return UCLK frequency */<br>
+uint32_t get_UCLK(void)<br>
+{<br>
+       /* not implemented */<br>
+       return 0;<br>
+}<br>
+<br>
+/* return HCLK frequency */<br>
+uint32_t get_HCLK(void)<br>
+{<br>
+       /* not implemented */<br>
+       return 0;<br>
+}<br>
+<br>
+/* return PCLK frequency */<br>
+uint32_t get_PCLK(void)<br>
+{<br>
+       /* Just return uboot configured freq.<br>
+        * Fix this in future<br>
+        */<br>
+       return 66000000;<br>
+}<br>
diff --git a/c/src/lib/libcpu/arm/s3c64xx/include/s3c6410.h b/c/src/lib/libcpu/arm/s3c64xx/include/s3c6410.h<br>
new file mode 100644<br>
index 0000000..56b1dcd<br>
--- /dev/null<br>
+++ b/c/src/lib/libcpu/arm/s3c64xx/include/s3c6410.h<br>
@@ -0,0 +1,211 @@<br>
+/************************************************<br>
+ * NAME     : s3c6410.h<br>
+ * Version  : 4.07.2013<br>
+ *<br>
+ * for the Samsung Development Board<br>
+ ************************************************/<br>
+<br>
+#ifndef __S3C6410_H__<br>
+#define __S3C6410_H__<br>
+<br>
+#define __reg(addr)    (*(volatile unsigned *)(addr))<br>
+/* UART */<br>
+#define UART_BASE      (0x7F005000)<br>
+#define UART0_BASE     (UART_BASE + 0x0)<br>
+#define UART1_BASE     (UART_BASE + 0x400)<br>
+#define UART2_BASE     (UART_BASE + 0x800)<br>
+#define UART2_BASE     (UART_BASE + 0xC00)<br>
+<br>
+#define rULCON0                __reg(UART0_BASE + 0x00)<br>
+#define rUCON0         __reg(UART0_BASE + 0x04)<br>
+#define rUFCON0                __reg(UART0_BASE + 0x08)<br>
+#define rUMCON0                __reg(UART0_BASE + 0x0C)<br>
+#define rUTRSTAT0      __reg(UART0_BASE + 0x10)<br>
+#define rUERSTAT0      __reg(UART0_BASE + 0x14)<br>
+#define rUFSTAT0       __reg(UART0_BASE + 0x18)<br>
+#define rUMSTAT0       __reg(UART0_BASE + 0x1C)<br>
+#define rUTXH0         __reg(UART0_BASE + 0x20)<br>
+#define rURXH0         __reg(UART0_BASE + 0x24)<br>
+#define rUBRDIV0       __reg(UART0_BASE + 0x28)<br>
+#define rUDIVSLOT0     __reg(UART0_BASE + 0x2C)<br>
+#define rUINTP0                __reg(UART0_BASE + 0x30)<br>
+#define rUINTSP0       __reg(UART0_BASE + 0x34)<br>
+#define rUINTM0                __reg(UART0_BASE + 0x38)<br>
+<br>
+#define rULCON1                __reg(UART1_BASE + 0x00)<br>
+#define rUCON1         __reg(UART1_BASE + 0x04)<br>
+#define rUFCON1                __reg(UART1_BASE + 0x08)<br>
+#define rUMCON1                __reg(UART1_BASE + 0x0C)<br>
+#define rUTRSTAT1      __reg(UART1_BASE + 0x10)<br>
+#define rUERSTAT1      __reg(UART1_BASE + 0x14)<br>
+#define rUFSTAT1       __reg(UART1_BASE + 0x18)<br>
+#define rUMSTAT1       __reg(UART1_BASE + 0x1C)<br>
+#define rUTXH1         __reg(UART1_BASE + 0x20)<br>
+#define rURXH1         __reg(UART1_BASE + 0x24)<br>
+#define rUBRDIV1       __reg(UART1_BASE + 0x28)<br>
+#define rUDIVSLOT1     __reg(UART1_BASE + 0x2C)<br>
+#define rUINTP1                __reg(UART1_BASE + 0x30)<br>
+#define rUINTSP1       __reg(UART1_BASE + 0x34)<br>
+#define rUINTM1                __reg(UART1_BASE + 0x38)<br>
+<br>
+/* GPIO */<br>
+#define GPIO_BASE      (0x7F008000)<br>
+#define GPIOA_BASE     GPIO_BASE<br>
+<br>
+#define rGPKCON0       __reg(0x7F008800)<br>
+#define rGPKCON1       __reg(0x7F008804)<br>
+#define rGPKDAT                __reg(0x7F008808)<br>
+#define rGPKPUD                __reg(0x7F00880C)<br>
+<br>
+#define rEINT0PEND     __reg(0x7F008924)<br>
+<br>
+<br>
+/* TIMER */<br>
+#define TIMER_BASE     (0x7F006000)<br>
+#define rTCFG0         __reg(TIMER_BASE + 0x0)<br>
+#define rTCFG1         __reg(TIMER_BASE + 0x4)<br>
+#define rTCON                  __reg(TIMER_BASE + 0x8)<br>
+#define rTCNTB0                __reg(TIMER_BASE + 0xC)<br>
+#define rTCMPB0                __reg(TIMER_BASE + 0x10)<br>
+#define rTCNTO0                __reg(TIMER_BASE + 0x14)<br>
+<br>
+#define rTCNTB1                __reg(TIMER_BASE + 0x18)<br>
+#define rTCMPB1                __reg(TIMER_BASE + 0x1C)<br>
+#define rTCNTO1                __reg(TIMER_BASE + 0x20)<br>
+<br>
+#define rTCNTB2                __reg(TIMER_BASE + 0x24)<br>
+#define rTCNTO2                __reg(TIMER_BASE + 0x2C)<br>
+#define rTCNTB3                __reg(TIMER_BASE + 0x30)<br>
+#define rTCNTO3                __reg(TIMER_BASE + 0x38)<br>
+#define rTCNTB4                __reg(TIMER_BASE + 0x3C)<br>
+#define rTCNTO4                __reg(TIMER_BASE + 0x40)<br>
+<br>
+#define rTINT_CSTAT    __reg(TIMER_BASE + 0x44)<br>
+<br>
+<br>
+/*<br>
+ * Interrupt<br>
+ */<br>
+/* VIC */<br>
+#define VIC0_BASE_ADDR         (0x71200000)<br>
+#define VIC1_BASE_ADDR         (0x71300000)<br>
+#define rVIC0_IRQSTATUS                        __reg(VIC0_BASE_ADDR + 0x0)<br>
+#define rVIC0_FIQSTATUS                        __reg(VIC0_BASE_ADDR + 0x4)<br>
+#define rVIC0_RAWINTR                          __reg(VIC0_BASE_ADDR + 0x8)<br>
+#define rVIC0_INTSELECT                        __reg(VIC0_BASE_ADDR + 0xC)<br>
+#define rVIC0_INTENABLE                        __reg(VIC0_BASE_ADDR + 0x10)<br>
+#define rVIC0_INTENCLEAR               __reg(VIC0_BASE_ADDR + 0x14)<br>
+#define rVIC0_SOFTINT                          __reg(VIC0_BASE_ADDR + 0x18)<br>
+#define rVIC0_SOFTINTCLEAR     __reg(VIC0_BASE_ADDR + 0x1C)<br>
+#define rVIC0_PROTECTION               __reg(VIC0_BASE_ADDR + 0x20)<br>
+#define rVIC0_SWPPIORITYMASK   __reg(VIC0_BASE_ADDR + 0x24)<br>
+#define rVIC0_PRIORITYDAISY    __reg(VIC0_BASE_ADDR + 0x28)<br>
+#define VIC0_VECTADDR_BASE     (VIC0_BASE_ADDR + 0x100)<br>
+<br>
+#define rVIC0_ADDRESS                          __reg(VIC0_BASE_ADDR + 0xF00)<br>
+<br>
+<br>
+<br>
+#define rVIC1_IRQSTATUS                        __reg(VIC1_BASE_ADDR + 0x0)<br>
+#define rVIC1_FIQSTATUS                        __reg(VIC1_BASE_ADDR + 0x4)<br>
+#define rVIC1_RAWINTR                          __reg(VIC1_BASE_ADDR + 0x8)<br>
+#define rVIC1_INTSELECT                        __reg(VIC1_BASE_ADDR + 0xC)<br>
+#define rVIC1_INTENABLE                        __reg(VIC1_BASE_ADDR + 0x10)<br>
+#define rVIC1_INTENCLEAR               __reg(VIC1_BASE_ADDR + 0x14)<br>
+#define rVIC1_SOFTINT                          __reg(VIC1_BASE_ADDR + 0x18)<br>
+#define rVIC1_SOFTINTCLEAR     __reg(VIC1_BASE_ADDR + 0x1C)<br>
+#define rVIC1_PROTECTION               __reg(VIC1_BASE_ADDR + 0x20)<br>
+#define rVIC1_SWPPIORITYMASK   __reg(VIC1_BASE_ADDR + 0x24)<br>
+#define rVIC1_PRIORITYDAISY    __reg(VIC1_BASE_ADDR + 0x28)<br>
+#define VIC1_VECTADDR_BASE     (VIC1_BASE_ADDR + 0x100)<br>
+<br>
+#define rVIC1_ADDRESS                          __reg(VIC1_BASE_ADDR + 0xF00)<br>
+<br>
+<br>
+/* ADC */<br>
+#define rADCCON                                                        __reg(0x7E00B000)<br>
+#define rADCTSC                                                        __reg(0x7E00B004)<br>
+#define rADCDLY                                                        __reg(0x7E00B008)<br>
+#define rADCDAT0                                               __reg(0x7E00B00C)<br>
+#define rADCDAT1                                               __reg(0x7E00B010)<br>
+#define rADCUPDN                                               __reg(0x7E00B014)<br>
+#define rADCCLRINT                                     __reg(0x7E00B018)<br>
+#define rADCCLRINTPNDNUP               __reg(0x7E00B020)<br>
+<br>
+/* WATCH DOG */<br>
+#define rWTCON                                                 __reg(0x7E004000)<br>
+#define rWTDAT                                                 __reg(0x7E004004)<br>
+#define rWTCNT                                                 __reg(0x7E004008)<br>
+#define rWTCLRINT                                              __reg(0x7E00400C)<br>
+<br>
+/* RTC */<br>
+#define rINTP                                                          __reg(0x7E005030)<br>
+<br>
+#define rTICCNT                                                        __reg(0x7E005044)<br>
+<br>
+<br>
+/* NAND */<br>
+#define  NAND_BASE             0x70200000<br>
+<br>
+#define rNFCONF                                                __reg(NAND_BASE + 0x0)<br>
+#define rNFCONT                                                __reg(NAND_BASE + 0x4)<br>
+#define rNFCNND                                                __reg(NAND_BASE + 0x8)<br>
+#define rNFADDR                                                __reg(NAND_BASE + 0xC)<br>
+#define rNFDATA                                                __reg(NAND_BASE + 0x10)<br>
+#define rNFMECCD0                                      __reg(NAND_BASE + 0x14)<br>
+#define rNFMECCD1                                      __reg(NAND_BASE + 0x18)<br>
+#define rNFSECCD                                       __reg(NAND_BASE + 0x1C)<br>
+#define rNFSBLK                                                __reg(NAND_BASE + 0x20)<br>
+#define rNFEBLK                                                __reg(NAND_BASE + 0x24)<br>
+#define rNFSTAT                                                __reg(NAND_BASE + 0x28)<br>
+#define rNFECCERR0                             __reg(NAND_BASE + 0x2C)<br>
+#define rNFECCERR1                             __reg(NAND_BASE + 0x30)<br>
+#define rNFMECC0                                       __reg(NAND_BASE + 0x34)<br>
+#define rNFMECC1                                       __reg(NAND_BASE + 0x38)<br>
+#define rNFSECC                                                __reg(NAND_BASE + 0x3C)<br>
+#define rNFMLCBITPT                            __reg(NAND_BASE + 0x40)<br>
+#define rNF8ECCERR0                            __reg(NAND_BASE + 0x44)<br>
+#define rNF8ECCERR1                            __reg(NAND_BASE + 0x48)<br>
+#define rNF8ECCERR2                            __reg(NAND_BASE + 0x4C)<br>
+#define rNFM8ECC0                                      __reg(NAND_BASE + 0x50)<br>
+#define rNFM8ECC1                                      __reg(NAND_BASE + 0x54)<br>
+#define rNFM8ECC2                                      __reg(NAND_BASE + 0x58)<br>
+#define rNFM8ECC3                                      __reg(NAND_BASE + 0x5C)<br>
+#define rNFMLC8BITPT0                  __reg(NAND_BASE + 0x60)<br>
+#define rNFMLC8BITPT1                  __reg(NAND_BASE + 0x64)<br>
+<br>
+#define BIT0                   0x00000001<br>
+#define BIT1                   0x00000002<br>
+#define BIT2                   0x00000004<br>
+#define BIT3                   0x00000008<br>
+#define BIT4                   0x00000010<br>
+#define BIT5                   0x00000020<br>
+#define BIT6                   0x00000040<br>
+#define BIT7                   0x00000080<br>
+#define BIT8                   0x00000100<br>
+#define BIT9                   0x00000200<br>
+#define BIT10                  0x00000400<br>
+#define BIT11                  0x00000800<br>
+#define BIT12                  0x00001000<br>
+#define BIT13                  0x00002000<br>
+#define BIT14                  0x00004000<br>
+#define BIT15                  0x00008000<br>
+#define BIT16                  0x00010000<br>
+#define BIT17                  0x00020000<br>
+#define BIT18                  0x00040000<br>
+#define BIT19                  0x00080000<br>
+#define BIT20                  0x00100000<br>
+#define BIT21                  0x00200000<br>
+#define BIT22                  0x00400000<br>
+#define BIT23                  0x00800000<br>
+#define BIT24                  0x01000000<br>
+#define BIT25                  0x02000000<br>
+#define BIT26                  0x04000000<br>
+#define BIT27                  0x08000000<br>
+#define BIT28                  0x10000000<br>
+#define BIT29                  0x20000000<br>
+#define BIT30                  0x40000000<br>
+#define BIT31                  0x80000000<br>
+<br>
+<br>
+#endif /*__S3C6410_H__*/<br>
diff --git a/c/src/lib/libcpu/arm/s3c64xx/include/s3c64xx.h b/c/src/lib/libcpu/arm/s3c64xx/include/s3c64xx.h<br>
new file mode 100644<br>
index 0000000..6396629<br>
--- /dev/null<br>
+++ b/c/src/lib/libcpu/arm/s3c64xx/include/s3c64xx.h<br>
@@ -0,0 +1,15 @@<br>
+/************************************************<br>
+ * NAME     : s3c64xx.h<br>
+ * Version  : 4.07.2013<br>
+ *<br>
+ * share code for different Samsung CPU<br>
+ ************************************************/<br>
+<br>
+#ifndef S3C64XX_H_<br>
+#define S3C64XX_H_<br>
+<br>
+#ifdef CPU_S3C6410<br>
+#include <s3c6410.h><br>
+#endif<br>
+<br>
+#endif /*S3C64XX_H_*/<br>
diff --git a/c/src/lib/libcpu/arm/s3c64xx/irq/irq.c b/c/src/lib/libcpu/arm/s3c64xx/irq/irq.c<br>
new file mode 100644<br>
index 0000000..e0cb6d2<br>
--- /dev/null<br>
+++ b/c/src/lib/libcpu/arm/s3c64xx/irq/irq.c<br>
@@ -0,0 +1,79 @@<br>
+/* irq.c<br>
+ *<br>
+ *  This file contains the implementation of the function described in irq.h<br>
+ *<br>
+ *  Copyright (c) 2010 embedded brains GmbH.<br>
+ *<br>
+ *  CopyRight (C) 2000 Canon Research France SA.<br>
+ *  Emmanuel Raguet,  mailto:<a href="mailto:raguet@crf.canon.fr" target="_blank">raguet@crf.canon.fr</a><br>
+ *<br>
+ *  The license and distribution terms for this file may be<br>
+ *  found in the file LICENSE in this distribution or at<br>
+ *  <a href="http://www.rtems.com/license/LICENSE" target="_blank">http://www.rtems.com/license/LICENSE</a>.<br>
+ *<br>
+ *  1. Modified from S3C2440   Peng Fan <a href="mailto:van.freenix@gmail.com" target="_blank">van.freenix@gmail.com</a><br>
+ */<br>
+<br>
+#include <rtems/score/armv4.h><br>
+<br>
+#include <bsp.h><br>
+#include <bsp/irq.h><br>
+#include <bsp/irq-generic.h><br>
+<br>
+#include <s3c64xx.h><br>
+<br>
+typedef void (*vicfunc)(void);<br>
+void bsp_interrupt_dispatch(void)<br>
+{<br>
+       uint32_t vector_addr0 = rVIC0_ADDRESS;<br>
+       uint32_t vector_addr1 = rVIC1_ADDRESS;<br>
+       if (vector_addr0 != 0){<br>
+               void (*vicfunc)(void) = (void(*)(void))rVIC0_ADDRESS;<br>
+               vicfunc();<br>
+       }<br>
+       rVIC0_ADDRESS = 0x0;<br>
+       if (vector_addr1 != 0){<br>
+               void (*vicfunc)(void) = (void(*)(void))rVIC1_ADDRESS;<br>
+               vicfunc();<br>
+       }<br>
+       rVIC1_ADDRESS = 0x0;<br>
+}<br>
+<br>
+rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)<br>
+{<br>
+  if (vector < 32)<br>
+  {<br>
+       rVIC0_INTENABLE |= 1 << vector;<br>
+  }<br>
+  else if (vector < 64)<br>
+  {<br>
+       rVIC1_INTENABLE |= 1 << (vector - 32);<br>
+  }<br>
+  else<br>
+         printk("%s failed\n", __func__);<br>
+<br>
+  return RTEMS_SUCCESSFUL;<br>
+}<br>
+<br>
+rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)<br>
+{<br>
+  if (vector < 32)<br>
+  {<br>
+       rVIC0_INTENCLEAR |= 1 << vector;<br>
+  }<br>
+  else if (vector < 64)<br>
+  {<br>
+       rVIC1_INTENCLEAR |= 1 << (vector - 32);<br>
+  }<br>
+  else<br>
+         printk("%s failed\n", __func__);<br>
+<br>
+  return RTEMS_SUCCESSFUL;<br>
+}<br>
+<br>
+rtems_status_code bsp_interrupt_facility_initialize(void)<br>
+{<br>
+  _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _ARMV4_Exception_interrupt, NULL);<br>
+<br>
+  return RTEMS_SUCCESSFUL;<br>
+}<br>
diff --git a/c/src/lib/libcpu/arm/s3c64xx/irq/irq.h b/c/src/lib/libcpu/arm/s3c64xx/irq/irq.h<br>
new file mode 100644<br>
index 0000000..2f3ca6a<br>
--- /dev/null<br>
+++ b/c/src/lib/libcpu/arm/s3c64xx/irq/irq.h<br>
@@ -0,0 +1,100 @@<br>
+/* irq.h<br>
+ *<br>
+ *  Copyright (c) 2010 embedded brains GmbH.<br>
+ *<br>
+ *  CopyRight (C) 2000 Canon Research France SA.<br>
+ *  Emmanuel Raguet,  mailto:<a href="mailto:raguet@crf.canon.fr" target="_blank">raguet@crf.canon.fr</a><br>
+ *<br>
+ *  Common file, merged from s3c2400/irq/irq.h and s3c2410/irq/irq.h<br>
+ *<br>
+ *  1. Modified from s3c2400   Peng Fan <a href="mailto:van.freenix@gmail.com" target="_blank">van.freenix@gmail.com</a><br>
+ */<br>
+<br>
+#ifndef _IRQ_H_<br>
+#define _IRQ_H_<br>
+<br>
+#ifndef ASM<br>
+#include <rtems.h><br>
+#include <rtems/irq.h><br>
+#include <rtems/irq-extension.h><br>
+<br>
+#include <s3c64xx.h><br>
+<br>
+#ifdef CPU_S3C6410<br>
+  /* possible interrupt sources */<br>
+#define BSP_EINT0                      0<br>
+#define BSP_EINT1                      1<br>
+#define BSP_RTC_TIC            2<br>
+#define BSP_CAMIF_C            3<br>
+#define BSP_CAMIF_P            4<br>
+#define        BSP_I2C1                        5<br>
+#define BSP_I2S0_1_V40 6<br>
+/* 7 is reserved */<br>
+#define BSP_3D                         8<br>
+#define BSP_POST0                      9<br>
+#define BSP_RPTATOR            10<br>
+#define BSP_2D                         11<br>
+#define BSP_TVENC                      12<br>
+#define BSP_SCALER             13<br>
+#define BSP_BATF                       14<br>
+#define BSP_JPEG                       15<br>
+#define BSP_MFC                                16<br>
+#define BSP_SDMA0                      17<br>
+#define BSP_SDMA1                      18<br>
+#define BSP_ARM_DMAERR 19<br>
+#define BSP_ARM_DMA            20<br>
+#define BSP_ARM_DMAS   21<br>
+#define BSP_KEYPAD             22<br>
+#define        BSP_TIMER0              23<br>
+#define BSP_TIMER1             24<br>
+#define BSP_TIMER2             25<br>
+#define BSP_WDT                                26<br>
+#define BSP_TIMER3             27<br>
+#define BSP_TIMER4             28<br>
+#define BSP_LCD0                       29<br>
+#define BSP_LCD1                       30<br>
+#define BSP_LCD2                       31<br>
+#define BSP_EINT2                      32<br>
+#define BSP_EINT3                      33<br>
+#define BSP_PCM0                       34<br>
+#define BSP_PCM1                       35<br>
+#define BSP_AC97                       36<br>
+#define BSP_UART0                      37<br>
+#define BSP_UART1                      38<br>
+#define BSP_UART2                      39<br>
+#define BSP_UART3                      40<br>
+#define BSP_DMA0                       41<br>
+#define BSP_DMA1                       42<br>
+#define BSP_ONENAND0   43<br>
+#define BSP_ONENAND1   44<br>
+#define BSP_NFC                                45<br>
+#define BSP_CFC                                46<br>
+#define BSP_UHOST                      47<br>
+#define BSP_SPI0                       48<br>
+#define BSP_SPI1                       49<br>
+#define BSP_HSMMC2             49<br>
+#define BSP_I2C0                       50<br>
+#define BSP_HSItx                      51<br>
+#define BSP_HSIrx                      52<br>
+#define BSP_EINT4                      53<br>
+#define BSP_MSM                                54<br>
+#define BSP_HOSTIF             55<br>
+#define BSP_HSMMC0             56<br>
+#define BSP_HSMMC1             57<br>
+#define BSP_OTG                                58<br>
+#define BSP_IrDA                       59<br>
+#define BSP_RTC_ALARM  60<br>
+#define BSP_SEC                                61<br>
+#define BSP_PENDNUP            62<br>
+#define BSP_ADC                                63<br>
+<br>
+#define BSP_MAX_INT            64<br>
+#endif<br>
+<br>
+#define BSP_INTERRUPT_VECTOR_MIN 0<br>
+<br>
+#define BSP_INTERRUPT_VECTOR_MAX (BSP_MAX_INT - 1)<br>
+<br>
+#endif /* ASM */<br>
+#endif /* _IRQ_H_ */<br>
+/* end of include file */<br>
diff --git a/c/src/lib/libcpu/arm/shared/include/arm-cp15.h b/c/src/lib/libcpu/arm/shared/include/arm-cp15.h<br>
index 3edc83f..45af5dd 100644<br>
--- a/c/src/lib/libcpu/arm/shared/include/arm-cp15.h<br>
+++ b/c/src/lib/libcpu/arm/shared/include/arm-cp15.h<br>
@@ -609,6 +609,23 @@ static inline void arm_cp15_data_cache_test_and_clean(void)<br>
   );<br>
 }<br>
<br>
+static inline void arm_cp15_data_cache_clean_and_invalidate(void)<br>
+{<br>
+  ARM_SWITCH_REGISTERS;<br>
+<br>
+  uint32_t sbz = 0;<br>
+<br>
+  __asm__ volatile (<br>
+    ARM_SWITCH_TO_ARM<br>
+    "mcr p15, 0, %[sbz], c7, c14, 0\n"<br>
+    ARM_SWITCH_BACK<br>
+    : ARM_SWITCH_OUTPUT<br>
+    : [sbz] "r" (sbz)<br>
+    : "memory"<br>
+  );<br>
+<br>
+}<br>
+<br>
 static inline void arm_cp15_data_cache_clean_and_invalidate_line(const void *mva)<br>
 {<br>
   ARM_SWITCH_REGISTERS;<br>
--<br>
1.7.10.4<br>
<br></div></div>
_______________________________________________<br>
rtems-devel mailing list<br>
<a href="mailto:rtems-devel@rtems.org" target="_blank">rtems-devel@rtems.org</a><br>
<a href="http://www.rtems.org/mailman/listinfo/rtems-devel" target="_blank">http://www.rtems.org/mailman/listinfo/rtems-devel</a><br>
</blockquote></div>
</blockquote></div><br></div>
</div></div></blockquote></div></div></div><br><br clear="all"><div class="im"><div><br></div>-- <br>Regards,<br>Dhananjay M Balan,<br><div>Department Of Computer Science, </div><div>College Of Engineering, Trivandrum.</div>
<div><a href="http://cet.ac.in" target="_blank">http://cet.ac.in</a></div>

</div></div></div>
</blockquote></div><br></div></div></div>