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<body><p dir="ltr">Thanks for adding this. Fun my phone so it may be ready to find. Is there a single place in GCC to see what the ABI requires register wise? Or a machine description pattern? </p><p dir="ltr">It seems research is needed for each architecture and what to hunt for is important.</p><div class="quote">On Apr 17, 2014 1:09 AM, Sebastian Huber <sebh@rtems.org> wrote:<br type="attribution"></div></body>
<font size="2"><div class="PlainText">Module: rtems<br>
Branch: master<br>
Commit: 320faf8e68796bcea316accdfa75c1f64a73f6b7<br>
Changeset: <a href="http://git.rtems.org/rtems/commit/?id=320faf8e68796bcea316accdfa75c1f64a73f6b7">http://git.rtems.org/rtems/commit/?id=320faf8e68796bcea316accdfa75c1f64a73f6b7</a><br>
<br>
Author: Sebastian Huber <sebastian.huber@embedded-brains.de><br>
Date: Thu Apr 17 07:57:09 2014 +0200<br>
<br>
score: Clarify TLS support<br>
<br>
---<br>
<br>
c/src/lib/libcpu/powerpc/new-exceptions/cpu.c | 2 +-<br>
cpukit/score/cpu/m68k/cpu.c | 2 +-<br>
cpukit/score/cpu/sparc/cpu.c | 2 +-<br>
cpukit/score/cpu/sparc64/cpu.c | 2 +-<br>
cpukit/score/include/rtems/score/tls.h | 4 ++--<br>
doc/cpu_supplement/general.t | 21 ++++++++++++++++++++-<br>
6 files changed, 26 insertions(+), 7 deletions(-)<br>
<br>
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c b/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c<br>
index 3b17662..73a1d3e 100644<br>
--- a/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c<br>
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c<br>
@@ -135,7 +135,7 @@ void _CPU_Context_Initialize(<br>
#endif<br>
<br>
if ( tls_area != NULL ) {<br>
- void *tls_block = _TLS_TCB_before_tls_block_initialize( tls_area );<br>
+ void *tls_block = _TLS_TCB_before_TLS_block_initialize( tls_area );<br>
<br>
the_ppc_context->gpr2 = (uint32_t) tls_block + 0x7000;<br>
} else {<br>
diff --git a/cpukit/score/cpu/m68k/cpu.c b/cpukit/score/cpu/m68k/cpu.c<br>
index f6342d6..4efaaa4 100644<br>
--- a/cpukit/score/cpu/m68k/cpu.c<br>
+++ b/cpukit/score/cpu/m68k/cpu.c<br>
@@ -205,6 +205,6 @@ void _CPU_Context_Initialize(<br>
#endif<br>
<br>
if ( tls_area != NULL ) {<br>
- _TLS_TCB_before_tls_block_initialize( tls_area );<br>
+ _TLS_TCB_before_TLS_block_initialize( tls_area );<br>
}<br>
}<br>
diff --git a/cpukit/score/cpu/sparc/cpu.c b/cpukit/score/cpu/sparc/cpu.c<br>
index 2878c3e..73ed4fd 100644<br>
--- a/cpukit/score/cpu/sparc/cpu.c<br>
+++ b/cpukit/score/cpu/sparc/cpu.c<br>
@@ -327,7 +327,7 @@ void _CPU_Context_Initialize(<br>
the_context->isr_dispatch_disable = 0;<br>
<br>
if ( tls_area != NULL ) {<br>
- void *tcb = _TLS_TCB_after_tls_block_initialize( tls_area );<br>
+ void *tcb = _TLS_TCB_after_TLS_block_initialize( tls_area );<br>
<br>
the_context->g7 = (uintptr_t) tcb;<br>
}<br>
diff --git a/cpukit/score/cpu/sparc64/cpu.c b/cpukit/score/cpu/sparc64/cpu.c<br>
index c5420c3..6d79a5a 100644<br>
--- a/cpukit/score/cpu/sparc64/cpu.c<br>
+++ b/cpukit/score/cpu/sparc64/cpu.c<br>
@@ -103,7 +103,7 @@ void _CPU_Context_Initialize(<br>
the_context->isr_dispatch_disable = 0;<br>
<br>
if ( tls_area != NULL ) {<br>
- void *tcb = _TLS_TCB_after_tls_block_initialize( tls_area );<br>
+ void *tcb = _TLS_TCB_after_TLS_block_initialize( tls_area );<br>
<br>
the_context->g7 = (uintptr_t) tcb;<br>
}<br>
diff --git a/cpukit/score/include/rtems/score/tls.h b/cpukit/score/include/rtems/score/tls.h<br>
index 75213d8..f9abc27 100644<br>
--- a/cpukit/score/include/rtems/score/tls.h<br>
+++ b/cpukit/score/include/rtems/score/tls.h<br>
@@ -146,7 +146,7 @@ static inline void *_TLS_TCB_at_area_begin_initialize( void *tls_area )<br>
}<br>
<br>
/* Use Variant I, TLS offsets emitted by linker neglects the TCB */<br>
-static inline void *_TLS_TCB_before_tls_block_initialize( void *tls_area )<br>
+static inline void *_TLS_TCB_before_TLS_block_initialize( void *tls_area )<br>
{<br>
void *tls_block = (char *) tls_area<br>
+ _TLS_Get_thread_control_block_area_size( (uintptr_t) _TLS_Alignment );<br>
@@ -160,7 +160,7 @@ static inline void *_TLS_TCB_before_tls_block_initialize( void *tls_area )<br>
}<br>
<br>
/* Use Variant II */<br>
-static inline void *_TLS_TCB_after_tls_block_initialize( void *tls_area )<br>
+static inline void *_TLS_TCB_after_TLS_block_initialize( void *tls_area )<br>
{<br>
uintptr_t size = (uintptr_t) _TLS_Size;<br>
uintptr_t tls_align = (uintptr_t) _TLS_Alignment;<br>
diff --git a/doc/cpu_supplement/general.t b/doc/cpu_supplement/general.t<br>
index 9c952a7..173f84f 100644<br>
--- a/doc/cpu_supplement/general.t<br>
+++ b/doc/cpu_supplement/general.t<br>
@@ -319,7 +319,26 @@ operations of the default CPU specific fatal error handler.<br>
In order to support thread-local storage (TLS) the CPU port must implement the<br>
facilities mandated by the application binary interface (ABI) of the CPU<br>
architecture. The CPU port must initialize the TLS area in the<br>
-@code{_CPU_Context_Initialize} function.<br>
+@code{_CPU_Context_Initialize()} function. There are support functions available<br>
+via @code{#include <rtems/score/tls.h>} which implement Variants I and II<br>
+according to Ulrich Drepper, @cite{ELF Handling For Thread-Local Storage}.<br>
+<br>
+@table @code<br>
+<br>
+@item _TLS_TCB_at_area_begin_initialize()<br>
+Uses Variant I, TLS offsets emitted by linker takes the TCB into account. For<br>
+a reference implementation see @file{cpukit/score/cpu/arm/cpu.c}.<br>
+<br>
+@item _TLS_TCB_before_TLS_block_initialize()<br>
+Uses Variant I, TLS offsets emitted by linker neglects the TCB. For a<br>
+reference implementation see<br>
+@file{c/src/lib/libcpu/powerpc/new-exceptions/cpu.c}.<br>
+<br>
+@item _TLS_TCB_after_TLS_block_initialize()<br>
+Uses Variant II. For a reference implementation see<br>
+@file{cpukit/score/cpu/sparc/cpu.c}.<br>
+<br>
+@end table<br>
<br>
The board support package (BSP) must provide the following sections and symbols<br>
in its linker command file:<br>
<br>
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