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<body><p dir="ltr">Are you sure the code which reads the cause register and vectors is not used? I am off today but my recollection is that without that code, no isr is going to get vectored. </p><p dir="ltr">The MIPS already required BSP/CPU model specific deciding of isr source. The cause decoding has to come from somewhere and I am positive we preserved it in the transition from simple to PIC.</p><div class="quote">On Apr 29, 2014 2:50 AM, Sebastian Huber <sebastian.huber@embedded-brains.de> wrote:<br type="attribution"></div></body>
<font size="2"><div class="PlainText">The MIPS port defines CPU_SIMPLE_VECTORED_INTERRUPTS to FALSE.<br>
---<br>
c/src/lib/libbsp/mips/csb350/Makefile.am | 1 -<br>
c/src/lib/libbsp/mips/genmongoosev/Makefile.am | 1 -<br>
c/src/lib/libbsp/mips/hurricane/Makefile.am | 1 -<br>
c/src/lib/libbsp/mips/jmr3904/Makefile.am | 1 -<br>
c/src/lib/libbsp/mips/malta/Makefile.am | 1 -<br>
c/src/lib/libbsp/mips/malta/irq/maxvectors.c | 24 --<br>
c/src/lib/libbsp/mips/rbtx4925/Makefile.am | 1 -<br>
c/src/lib/libbsp/mips/rbtx4938/Makefile.am | 1 -<br>
c/src/lib/libbsp/mips/shared/irq/maxvectors.c | 20 --<br>
.../lib/libcpu/mips/au1x00/vectorisrs/vectorisrs.c | 170 -------------<br>
.../libcpu/mips/mongoosev/vectorisrs/vectorisrs.c | 262 --------------------<br>
.../lib/libcpu/mips/r46xx/vectorisrs/vectorisrs.c | 49 ----<br>
.../lib/libcpu/mips/rm52xx/vectorisrs/vectorisrs.c | 54 ----<br>
c/src/lib/libcpu/mips/tx39/vectorisrs/vectorisrs.c | 58 -----<br>
c/src/lib/libcpu/mips/tx49/vectorisrs/vectorisrs.c | 61 -----<br>
15 files changed, 0 insertions(+), 705 deletions(-)<br>
delete mode 100644 c/src/lib/libbsp/mips/malta/irq/maxvectors.c<br>
delete mode 100644 c/src/lib/libbsp/mips/shared/irq/maxvectors.c<br>
delete mode 100644 c/src/lib/libcpu/mips/au1x00/vectorisrs/vectorisrs.c<br>
delete mode 100644 c/src/lib/libcpu/mips/mongoosev/vectorisrs/vectorisrs.c<br>
delete mode 100644 c/src/lib/libcpu/mips/r46xx/vectorisrs/vectorisrs.c<br>
delete mode 100644 c/src/lib/libcpu/mips/rm52xx/vectorisrs/vectorisrs.c<br>
delete mode 100644 c/src/lib/libcpu/mips/tx39/vectorisrs/vectorisrs.c<br>
delete mode 100644 c/src/lib/libcpu/mips/tx49/vectorisrs/vectorisrs.c<br>
<br>
diff --git a/c/src/lib/libbsp/mips/csb350/Makefile.am b/c/src/lib/libbsp/mips/csb350/Makefile.am<br>
index a658307..ac31d16 100644<br>
--- a/c/src/lib/libbsp/mips/csb350/Makefile.am<br>
+++ b/c/src/lib/libbsp/mips/csb350/Makefile.am<br>
@@ -57,7 +57,6 @@ libbsp_a_SOURCES += ../../shared/src/irq-shell.c<br>
libbsp_a_SOURCES += ../../shared/src/irq-server.c<br>
libbsp_a_SOURCES += ../shared/irq/vectorexceptions.c<br>
libbsp_a_SOURCES += ../shared/irq/irq.c<br>
-libbsp_a_SOURCES += ../shared/irq/maxvectors.c<br>
libbsp_a_SOURCES += irq/vectorisrs.c<br>
libbsp_a_SOURCES += ../shared/irq/interruptmask.c<br>
<br>
diff --git a/c/src/lib/libbsp/mips/genmongoosev/Makefile.am b/c/src/lib/libbsp/mips/genmongoosev/Makefile.am<br>
index 5bb48e3..fe21df4 100644<br>
--- a/c/src/lib/libbsp/mips/genmongoosev/Makefile.am<br>
+++ b/c/src/lib/libbsp/mips/genmongoosev/Makefile.am<br>
@@ -62,7 +62,6 @@ libbsp_a_SOURCES += ../../shared/src/irq-shell.c<br>
libbsp_a_SOURCES += ../../shared/src/irq-server.c<br>
libbsp_a_SOURCES += ../shared/irq/vectorexceptions.c<br>
libbsp_a_SOURCES += ../shared/irq/irq.c<br>
-libbsp_a_SOURCES += ../shared/irq/maxvectors.c<br>
libbsp_a_SOURCES += irq/vectorisrs.c<br>
libbsp_a_SOURCES += ../shared/irq/interruptmask.c<br>
<br>
diff --git a/c/src/lib/libbsp/mips/hurricane/Makefile.am b/c/src/lib/libbsp/mips/hurricane/Makefile.am<br>
index 0c021b3..a4896eb 100644<br>
--- a/c/src/lib/libbsp/mips/hurricane/Makefile.am<br>
+++ b/c/src/lib/libbsp/mips/hurricane/Makefile.am<br>
@@ -63,7 +63,6 @@ libbsp_a_SOURCES += ../../shared/src/irq-shell.c<br>
libbsp_a_SOURCES += ../../shared/src/irq-server.c<br>
libbsp_a_SOURCES += ../shared/irq/vectorexceptions.c<br>
libbsp_a_SOURCES += ../shared/irq/irq.c<br>
-libbsp_a_SOURCES += ../shared/irq/maxvectors.c<br>
libbsp_a_SOURCES += irq/vectorisrs.c<br>
libbsp_a_SOURCES += ../shared/irq/interruptmask.c<br>
<br>
diff --git a/c/src/lib/libbsp/mips/jmr3904/Makefile.am b/c/src/lib/libbsp/mips/jmr3904/Makefile.am<br>
index ea02b2d..dfb5db1 100644<br>
--- a/c/src/lib/libbsp/mips/jmr3904/Makefile.am<br>
+++ b/c/src/lib/libbsp/mips/jmr3904/Makefile.am<br>
@@ -55,7 +55,6 @@ libbsp_a_SOURCES += ../../shared/src/irq-shell.c<br>
libbsp_a_SOURCES += ../../shared/src/irq-server.c<br>
libbsp_a_SOURCES += ../shared/irq/vectorexceptions.c<br>
libbsp_a_SOURCES += ../shared/irq/irq.c<br>
-libbsp_a_SOURCES += ../shared/irq/maxvectors.c<br>
libbsp_a_SOURCES += irq/vectorisrs.c<br>
libbsp_a_SOURCES += ../shared/irq/interruptmask.c<br>
<br>
diff --git a/c/src/lib/libbsp/mips/malta/Makefile.am b/c/src/lib/libbsp/mips/malta/Makefile.am<br>
index 0c5da15..670f3a3 100644<br>
--- a/c/src/lib/libbsp/mips/malta/Makefile.am<br>
+++ b/c/src/lib/libbsp/mips/malta/Makefile.am<br>
@@ -82,7 +82,6 @@ libbsp_a_SOURCES += ../../shared/src/irq-shell.c<br>
libbsp_a_SOURCES += ../../shared/src/irq-server.c<br>
libbsp_a_SOURCES += ../shared/irq/vectorexceptions.c<br>
libbsp_a_SOURCES += ../shared/irq/irq.c<br>
-libbsp_a_SOURCES += irq/maxvectors.c<br>
libbsp_a_SOURCES += irq/vectorisrs.c<br>
libbsp_a_SOURCES += irq/interruptmask.c<br>
libbsp_a_SOURCES += ../shared/irq/i8259.c<br>
diff --git a/c/src/lib/libbsp/mips/malta/irq/maxvectors.c b/c/src/lib/libbsp/mips/malta/irq/maxvectors.c<br>
deleted file mode 100644<br>
index c17583e..0000000<br>
--- a/c/src/lib/libbsp/mips/malta/irq/maxvectors.c<br>
+++ /dev/null<br>
@@ -1,24 +0,0 @@<br>
-/**<br>
- * @file<br>
- *<br>
- * This file contains the maximum number of vectors. This can not<br>
- * be determined without knowing the RTEMS CPU model.<br>
- */<br>
-<br>
-/*<br>
- * COPYRIGHT (c) 1989-2012.<br>
- * On-Line Applications Research Corporation (OAR).<br>
- *<br>
- * The license and distribution terms for this file may be<br>
- * found in the file LICENSE in this distribution or at<br>
- * <a href="http://www.rtems.org/license/LICENSE">http://www.rtems.org/license/LICENSE</a>.<br>
- */<br>
-<br>
-/*<br>
- * Reserve first 32 for exceptions.<br>
- */<br>
-<br>
-#include <rtems.h><br>
-<br>
-unsigned int mips_interrupt_number_of_vectors = 13;<br>
-<br>
diff --git a/c/src/lib/libbsp/mips/rbtx4925/Makefile.am b/c/src/lib/libbsp/mips/rbtx4925/Makefile.am<br>
index 8d69288..ef06d8d 100644<br>
--- a/c/src/lib/libbsp/mips/rbtx4925/Makefile.am<br>
+++ b/c/src/lib/libbsp/mips/rbtx4925/Makefile.am<br>
@@ -62,7 +62,6 @@ libbsp_a_SOURCES += ../../shared/src/irq-shell.c<br>
libbsp_a_SOURCES += ../../shared/src/irq-server.c<br>
libbsp_a_SOURCES += ../shared/irq/vectorexceptions.c<br>
libbsp_a_SOURCES += ../shared/irq/irq.c<br>
-libbsp_a_SOURCES += ../shared/irq/maxvectors.c<br>
libbsp_a_SOURCES += irq/vectorisrs.c<br>
libbsp_a_SOURCES += ../shared/irq/interruptmask_TX49.c<br>
<br>
diff --git a/c/src/lib/libbsp/mips/rbtx4938/Makefile.am b/c/src/lib/libbsp/mips/rbtx4938/Makefile.am<br>
index 8d69288..ef06d8d 100644<br>
--- a/c/src/lib/libbsp/mips/rbtx4938/Makefile.am<br>
+++ b/c/src/lib/libbsp/mips/rbtx4938/Makefile.am<br>
@@ -62,7 +62,6 @@ libbsp_a_SOURCES += ../../shared/src/irq-shell.c<br>
libbsp_a_SOURCES += ../../shared/src/irq-server.c<br>
libbsp_a_SOURCES += ../shared/irq/vectorexceptions.c<br>
libbsp_a_SOURCES += ../shared/irq/irq.c<br>
-libbsp_a_SOURCES += ../shared/irq/maxvectors.c<br>
libbsp_a_SOURCES += irq/vectorisrs.c<br>
libbsp_a_SOURCES += ../shared/irq/interruptmask_TX49.c<br>
<br>
diff --git a/c/src/lib/libbsp/mips/shared/irq/maxvectors.c b/c/src/lib/libbsp/mips/shared/irq/maxvectors.c<br>
deleted file mode 100644<br>
index 273253b..0000000<br>
--- a/c/src/lib/libbsp/mips/shared/irq/maxvectors.c<br>
+++ /dev/null<br>
@@ -1,20 +0,0 @@<br>
-/**<br>
- * @file<br>
- * <br>
- * This file contains the maximum number of vectors. This can not<br>
- * be determined without knowing the RTEMS CPU model.<br>
- */<br>
-<br>
-/*<br>
- * COPYRIGHT (c) 1989-2012.<br>
- * On-Line Applications Research Corporation (OAR).<br>
- *<br>
- * The license and distribution terms for this file may be<br>
- * found in the file LICENSE in this distribution or at<br>
- * <a href="http://www.rtems.org/license/LICENSE">http://www.rtems.org/license/LICENSE</a>.<br>
- */<br>
-<br>
-#include <rtems.h><br>
-#include <bsp/irq.h><br>
-<br>
-unsigned int mips_interrupt_number_of_vectors = BSP_INTERRUPT_VECTOR_MAX;<br>
diff --git a/c/src/lib/libcpu/mips/au1x00/vectorisrs/vectorisrs.c b/c/src/lib/libcpu/mips/au1x00/vectorisrs/vectorisrs.c<br>
deleted file mode 100644<br>
index 5e378f4..0000000<br>
--- a/c/src/lib/libcpu/mips/au1x00/vectorisrs/vectorisrs.c<br>
+++ /dev/null<br>
@@ -1,170 +0,0 @@<br>
-/*<br>
- * Au1x00 Interrupt Vectoring<br>
- *<br>
- * Copyright (c) 2005 by Cogent Computer Systems<br>
- * Written by Jay Monkman <jtm@lopingdog.com><br>
- *<br>
- * The license and distribution terms for this file may be<br>
- * found in the file LICENSE in this distribution or at<br>
- * <a href="http://www.rtems.org/license/LICENSE">http://www.rtems.org/license/LICENSE</a>.<br>
- */<br>
-<br>
-#include <rtems.h><br>
-#include <stdlib.h><br>
-#include <libcpu/au1x00.h><br>
-<br>
-static void call_vectored_isr(CPU_Interrupt_frame *, uint32_t , void *);<br>
-<br>
-#define CALL_ISR(_vector,_frame) \<br>
- do { \<br>
- if ( _ISR_Vector_table[_vector] ) \<br>
- (_ISR_Vector_table[_vector])(_vector,_frame); \<br>
- else \<br>
- mips_default_isr(_vector); \<br>
- } while (0)<br>
-<br>
-#include <rtems/bspIo.h> /* for printk */<br>
-<br>
-void mips_vector_isr_handlers( CPU_Interrupt_frame *frame )<br>
-{<br>
- unsigned int sr;<br>
- unsigned int cause;<br>
-<br>
- mips_get_sr( sr );<br>
- mips_get_cause( cause );<br>
-<br>
- cause &= (sr & SR_IMASK);<br>
- cause >>= CAUSE_IPSHIFT;<br>
-<br>
- /* count/compare interrupt */<br>
- if ( cause & 0x80 ) {<br>
- unsigned long zero = 0;<br>
- /*<br>
- * I don't see a good way to disable the compare<br>
- * interrupt, so let's just ignore it.<br>
- */<br>
- __asm__ volatile ("mtc0 %0, $11\n" :: "r" (zero));<br>
-<br>
-/* CALL_ISR( AU1X00_IRQ_CNT, frame ); */<br>
- }<br>
-<br>
- /* Performance counter */<br>
- if ( cause & 0x40 ) {<br>
- CALL_ISR( AU1X00_IRQ_PERF, frame );<br>
- }<br>
-<br>
- /* Interrupt controller 0 */<br>
- if ( cause & 0x0c ) {<br>
- call_vectored_isr(frame, cause, (void *)AU1X00_IC0_ADDR);<br>
- }<br>
-<br>
- /* Interrupt controller 1 */<br>
- if ( cause & 0x30 ) {<br>
- call_vectored_isr(frame, cause, (void *)AU1X00_IC1_ADDR);<br>
- }<br>
-<br>
- /* SW[0] */<br>
- if ( cause & 0x01 )<br>
- CALL_ISR( AU1X00_IRQ_SW0, frame );<br>
-<br>
- /* SW[1] */<br>
- if ( cause & 0x02 )<br>
- CALL_ISR( AU1X00_IRQ_SW1, frame );<br>
-}<br>
-<br>
-void mips_default_isr( int vector )<br>
-{<br>
- unsigned int sr;<br>
- unsigned int cause;<br>
-<br>
- mips_get_sr( sr );<br>
- mips_get_cause( cause );<br>
-<br>
- printk( "Unhandled isr exception: vector 0x%02x, cause 0x%08X, sr 0x%08X\n",<br>
- vector, cause, sr );<br>
- rtems_fatal_error_occurred(1);<br>
-}<br>
-<br>
-static void call_vectored_isr(<br>
- CPU_Interrupt_frame *frame,<br>
- uint32_t cause,<br>
- void *ctrlr<br>
- )<br>
-{<br>
- uint32_t src;<br>
- uint32_t mask;<br>
- int index;<br>
-<br>
- /* get mask register */<br>
- mask = AU1X00_IC_MASKRD(ctrlr);<br>
-<br>
- /* check request 0 */<br>
- src = AU1X00_IC_REQ0INT(ctrlr);<br>
- src = src & mask;<br>
- index = 0;<br>
- while (src) {<br>
- /* check LSB */<br>
- if (src & 1) {<br>
- /* clear rising/falling edge detects */<br>
- AU1X00_IC_RISINGCLR(ctrlr) = (1 << index);<br>
- AU1X00_IC_FALLINGCLR(ctrlr) = (1 << index);<br>
- au_sync();<br>
- CALL_ISR(AU1X00_IRQ_IC0_BASE + index, frame);<br>
- }<br>
- index ++;<br>
-<br>
- /* shift, and make sure MSB is clear */<br>
- src = (src >> 1) & 0x7fffffff;<br>
- }<br>
-<br>
- /* check request 1 */<br>
- src = AU1X00_IC_REQ1INT(ctrlr);<br>
- src = src & mask;<br>
- index = 0;<br>
- while (src) {<br>
- /* check LSB */<br>
- if (src & 1) {<br>
- /* clear rising/falling edge detects */<br>
- AU1X00_IC_RISINGCLR(ctrlr) = (1 << index);<br>
- AU1X00_IC_FALLINGCLR(ctrlr) = (1 << index);<br>
- au_sync();<br>
- CALL_ISR(AU1X00_IRQ_IC0_BASE + index, frame);<br>
- }<br>
- index ++;<br>
-<br>
- /* shift, and make sure MSB is clear */<br>
- src = (src >> 1) & 0x7fffffff;<br>
- }<br>
-}<br>
-<br>
-/* Generate a software interrupt */<br>
-int assert_sw_irq(uint32_t irqnum)<br>
-{<br>
- uint32_t cause;<br>
-<br>
- if (irqnum <= 1) {<br>
- mips_get_cause(cause);<br>
- cause = cause | ((irqnum + 1) << CAUSE_IPSHIFT);<br>
- mips_set_cause(cause);<br>
-<br>
- return irqnum;<br>
- } else {<br>
- return -1;<br>
- }<br>
-}<br>
-<br>
-/* Clear a software interrupt */<br>
-int negate_sw_irq(uint32_t irqnum)<br>
-{<br>
- uint32_t cause;<br>
-<br>
- if (irqnum <= 1) {<br>
- mips_get_cause(cause);<br>
- cause = cause & ~((irqnum + 1) << CAUSE_IPSHIFT);<br>
- mips_set_cause(cause);<br>
-<br>
- return irqnum;<br>
- } else {<br>
- return -1;<br>
- }<br>
-}<br>
diff --git a/c/src/lib/libcpu/mips/mongoosev/vectorisrs/vectorisrs.c b/c/src/lib/libcpu/mips/mongoosev/vectorisrs/vectorisrs.c<br>
deleted file mode 100644<br>
index d0fc894..0000000<br>
--- a/c/src/lib/libcpu/mips/mongoosev/vectorisrs/vectorisrs.c<br>
+++ /dev/null<br>
@@ -1,262 +0,0 @@<br>
-/*<br>
- * ISR Vectoring support for the Synova Mongoose-V.<br>
- *<br>
- * COPYRIGHT (c) 1989-2001.<br>
- * On-Line Applications Research Corporation (OAR).<br>
- *<br>
- * The license and distribution terms for this file may be<br>
- * found in the file LICENSE in this distribution or at<br>
- * <a href="http://www.rtems.org/license/LICENSE">http://www.rtems.org/license/LICENSE</a>.<br>
- */<br>
-<br>
-#include <rtems.h><br>
-#include <stdlib.h><br>
-#include <libcpu/mongoose-v.h><br>
-<br>
-#include <rtems/mips/iregdef.h><br>
-#include <rtems/mips/idtcpu.h><br>
-<br>
-<br>
-#include <rtems/bspIo.h> /* for printk */<br>
-<br>
-<br>
-<br>
-int mips_default_isr( int vector )<br>
-{<br>
- unsigned int sr, sr2;<br>
- unsigned int cause;<br>
-<br>
- mips_get_sr( sr );<br>
- mips_get_cause( cause );<br>
-<br>
- sr2 = sr & ~0xffff;<br>
- mips_set_sr(sr2);<br>
-<br>
- printk( "Unhandled isr exception: vector 0x%02x, cause 0x%08X, sr 0x%08X\n", vector, cause, sr );<br>
- rtems_fatal_error_occurred(1);<br>
- return 0;<br>
-}<br>
-<br>
-/* userspace routine to assert either software interrupt */<br>
-<br>
-int assertSoftwareInterrupt( uint32_t n )<br>
-{<br>
- if( n<2 )<br>
- {<br>
- uint32_t c;<br>
-<br>
- mips_get_cause(c);<br>
- c = ((n+1) << CAUSE_IPSHIFT);<br>
- mips_set_cause(c);<br>
-<br>
- return n;<br>
- }<br>
- else return -1;<br>
-}<br>
-<br>
-<br>
-<br>
-<br>
-<br>
-<br>
-#define CALL_ISR(_vector,_frame) \<br>
- do { \<br>
- if( _ISR_Vector_table[_vector] ) \<br>
- (_ISR_Vector_table[_vector])(_vector,_frame); \<br>
- else \<br>
- mips_default_isr(_vector); \<br>
- } while (0)<br>
-<br>
-<br>
-/*<br>
- * Instrumentation tweaks for isr timing measurement, turning them off<br>
- * via this #if will remove the code entirely from the RTEMS kernel.<br>
- */<br>
-<br>
-#if 0<br>
-#define SET_ISR_FLAG( offset ) *((uint32_t*)(0x8001e000+offset)) = 1;<br>
-#define CLR_ISR_FLAG( offset ) *((uint32_t*)(0x8001e000+offset)) = 0;<br>
-#else<br>
-#define SET_ISR_FLAG( offset )<br>
-#define CLR_ISR_FLAG( offset )<br>
-#endif<br>
-<br>
-<br>
-<br>
-<br>
-<br>
-<br>
-static volatile uint32_t _ivcause, _ivsr;<br>
-<br>
-<br>
-static uint32_t READ_CAUSE(void)<br>
-{<br>
- mips_get_cause( _ivcause );<br>
- _ivcause &= SR_IMASK; /* mask off everything other than the interrupt bits */<br>
-<br>
- return ((_ivcause & (_ivsr & SR_IMASK)) >> CAUSE_IPSHIFT);<br>
-}<br>
-<br>
-<br>
-<br>
-/*<br>
- * This rather strangely coded routine enforces an interrupt priority<br>
- * scheme. As it runs thru finding whichever interrupt caused it to get<br>
- * here, it test for other interrupts arriving in the meantime (maybe it<br>
- * occured while the vector code is executing for instance). Each new<br>
- * interrupt will be served in order of its priority. In an effort to<br>
- * minimize overhead, the cause register is only fetched after an<br>
- * interrupt is serviced. Because of the intvect goto's, this routine<br>
- * will only exit when all interrupts have been serviced and no more<br>
- * have arrived, this improves interrupt latency at the cost of<br>
- * increasing scheduling jitter; though scheduling jitter should only<br>
- * become apparent in high interrupt load conditions.<br>
- */<br>
-void mips_vector_isr_handlers( CPU_Interrupt_frame *frame )<br>
-{<br>
- uint32_t cshifted;<br>
-<br>
- /* mips_get_sr( sr ); */<br>
- _ivsr = frame->c0_sr;<br>
-<br>
- cshifted = READ_CAUSE();<br>
-<br>
- intvect:<br>
-<br>
- if( cshifted & 0x3 )<br>
- {<br>
- /* making the software interrupt the highest priority is kind of<br>
- * stupid, but it makes the bit testing lots easier. On the other<br>
- * hand, these ints are infrequently used and the testing overhead<br>
- * is minimal. Who knows, high-priority software ints might be<br>
- * handy in some situation.<br>
- */<br>
-<br>
- /* unset both software int cause bits */<br>
- mips_set_cause( _ivcause & ~(3 << CAUSE_IPSHIFT) );<br>
-<br>
- if ( cshifted & 0x01 ) /* SW[0] */<br>
- {<br>
- CALL_ISR( MONGOOSEV_IRQ_SOFTWARE_1, frame );<br>
- }<br>
- if ( cshifted & 0x02 ) /* SW[1] */<br>
- {<br>
- CALL_ISR( MONGOOSEV_IRQ_SOFTWARE_2, frame );<br>
- }<br>
- cshifted = READ_CAUSE();<br>
- }<br>
-<br>
-<br>
- if ( cshifted & 0x04 ) /* IP[0] ==> INT0 == TIMER1 */<br>
- {<br>
- SET_ISR_FLAG( 0x4 );<br>
- CALL_ISR( MONGOOSEV_IRQ_TIMER1, frame );<br>
- CLR_ISR_FLAG( 0x4 );<br>
- if( (cshifted = READ_CAUSE()) & 0x3 ) goto intvect;<br>
- }<br>
-<br>
- if ( cshifted & 0x08 ) /* IP[1] ==> INT1 == TIMER2*/<br>
- {<br>
- SET_ISR_FLAG( 0x8 );<br>
- CALL_ISR( MONGOOSEV_IRQ_TIMER2, frame );<br>
- CLR_ISR_FLAG( 0x8 );<br>
- if( (cshifted = READ_CAUSE()) & 0x7 ) goto intvect;<br>
- }<br>
-<br>
- if ( cshifted & 0x10 ) /* IP[2] ==> INT2 */<br>
- {<br>
- SET_ISR_FLAG( 0x10 );<br>
- CALL_ISR( MONGOOSEV_IRQ_INT2, frame );<br>
- CLR_ISR_FLAG( 0x10 );<br>
- if( (cshifted = READ_CAUSE()) & 0xf ) goto intvect;<br>
- }<br>
-<br>
- if ( cshifted & 0x20 ) /* IP[3] ==> INT3 == FPU interrupt */<br>
- {<br>
- SET_ISR_FLAG( 0x20 );<br>
- CALL_ISR( MONGOOSEV_IRQ_INT3, frame );<br>
- CLR_ISR_FLAG( 0x20 );<br>
- if( (cshifted = READ_CAUSE()) & 0x1f ) goto intvect;<br>
- }<br>
-<br>
- if ( cshifted & 0x40 ) /* IP[4] ==> INT4, external interrupt */<br>
- {<br>
- SET_ISR_FLAG( 0x40 );<br>
- CALL_ISR( MONGOOSEV_IRQ_INT4, frame );<br>
- CLR_ISR_FLAG( 0x40 );<br>
- if( (cshifted = READ_CAUSE()) & 0x3f ) goto intvect;<br>
- }<br>
-<br>
- if ( cshifted & 0x80 ) /* IP[5] ==> INT5, peripheral interrupt */<br>
- {<br>
- uint32_t bit;<br>
- uint32_t pf_icr, pf_mask, pf_reset = 0;<br>
- uint32_t i, m;<br>
-<br>
- pf_icr = MONGOOSEV_READ( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_CAUSE_REGISTER );<br>
-<br>
-/*<br>
- for (bit=0, pf_mask = 1; bit < 32; bit++, pf_mask <<= 1 )<br>
- {<br>
- if ( pf_icr & pf_mask )<br>
- {<br>
- SET_ISR_FLAG( 0x80 + (bit*4) );<br>
- CALL_ISR( MONGOOSEV_IRQ_PERIPHERAL_BASE + bit, frame );<br>
- CLR_ISR_FLAG( 0x80 + (bit*4) );<br>
- pf_reset |= pf_mask;<br>
- if( (cshifted = READ_CAUSE()) & 0xff ) break;<br>
- }<br>
- }<br>
-*/<br>
-<br>
- /*<br>
- * iterate thru 32 bits in 4 chunks of 8 bits each. This lets us<br>
- * quickly get past unasserted interrupts instead of flogging our<br>
- * way thru a full 32 bits. pf_mask shifts left 8 bits at a time<br>
- * to serve as a interrupt cause test mask.<br>
- */<br>
- for( bit=0, pf_mask = 0xff; (bit < 32 && pf_icr); (bit+=8, pf_mask <<= 8) )<br>
- {<br>
- if ( pf_icr & pf_mask )<br>
- {<br>
- /* one or more of the 8 bits we're testing is high */<br>
-<br>
- m = (1 << bit);<br>
-<br>
- /* iterate thru the 8 bits, servicing any of the interrupts */<br>
- for(i=0; (i<8 && pf_icr); (i++, m <<= 1))<br>
- {<br>
- if( pf_icr & m )<br>
- {<br>
- SET_ISR_FLAG( 0x80 + ((bit + i) * 4) );<br>
- CALL_ISR( MONGOOSEV_IRQ_PERIPHERAL_BASE + bit + i, frame );<br>
- CLR_ISR_FLAG( 0x80 + ((bit + i) * 4) );<br>
-<br>
- /* or each serviced interrupt into our interrupt clear mask */<br>
- pf_reset |= m;<br>
-<br>
- /* xor off each int we service so we can immediately<br>
- * exit once we get the last one<br>
- */<br>
- pf_icr %= m;<br>
-<br>
- /* if another interrupt has arrived, jump out right<br>
- * away but be sure to reset all the interrupts we've<br>
- * already serviced<br>
- */<br>
- if( READ_CAUSE() & 0xff ) goto pfexit;<br>
- }<br>
- }<br>
- }<br>
- }<br>
- pfexit:<br>
- MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_STATUS_REGISTER, pf_reset );<br>
- }<br>
-<br>
- /*<br>
- * this is a last ditch interrupt check, if an interrupt arrives<br>
- * after this step, servicing it will incur the entire interrupt<br>
- * overhead cost.<br>
- */<br>
- if( (cshifted = READ_CAUSE()) & 0xff ) goto intvect;<br>
-}<br>
diff --git a/c/src/lib/libcpu/mips/r46xx/vectorisrs/vectorisrs.c b/c/src/lib/libcpu/mips/r46xx/vectorisrs/vectorisrs.c<br>
deleted file mode 100644<br>
index 681cd85..0000000<br>
--- a/c/src/lib/libcpu/mips/r46xx/vectorisrs/vectorisrs.c<br>
+++ /dev/null<br>
@@ -1,49 +0,0 @@<br>
-#include <rtems.h><br>
-#include <stdlib.h><br>
-<br>
-<br>
-void mips_default_isr( int vector );<br>
-<br>
-#define CALL_ISR(_vector,_frame) \<br>
- do { \<br>
- if ( _ISR_Vector_table[_vector] ) \<br>
- (_ISR_Vector_table[_vector])(_vector,_frame); \<br>
- else \<br>
- mips_default_isr(_vector); \<br>
- } while (0)<br>
-<br>
-#include <rtems/bspIo.h> /* for printk */<br>
-<br>
-void mips_vector_isr_handlers( CPU_Interrupt_frame *frame )<br>
-{<br>
- unsigned int sr;<br>
- unsigned int cause;<br>
- unsigned int i;<br>
- unsigned int mask;<br>
-<br>
- mips_get_sr( sr );<br>
- mips_get_cause( cause );<br>
-<br>
- cause &= (sr & SR_IMASK);<br>
- cause >>= CAUSE_IPSHIFT;<br>
-<br>
- /* XXX check this and think about it. */<br>
-<br>
- for ( i=1, mask=0x80 ; i<=8 ; i++, mask >>= 1 ) {<br>
- if ( cause & mask )<br>
- CALL_ISR( MIPS_EXCEPTION_BASE + 8 - i, frame );<br>
- }<br>
-}<br>
-<br>
-void mips_default_isr( int vector )<br>
-{<br>
- unsigned int sr;<br>
- unsigned int cause;<br>
-<br>
- mips_get_sr( sr );<br>
- mips_get_cause( cause );<br>
-<br>
- printk( "Unhandled isr exception: vector 0x%02x, cause 0x%08X, sr 0x%08X\n",<br>
- vector, cause, sr );<br>
- rtems_fatal_error_occurred(1);<br>
-}<br>
diff --git a/c/src/lib/libcpu/mips/rm52xx/vectorisrs/vectorisrs.c b/c/src/lib/libcpu/mips/rm52xx/vectorisrs/vectorisrs.c<br>
deleted file mode 100644<br>
index 511b8fe..0000000<br>
--- a/c/src/lib/libcpu/mips/rm52xx/vectorisrs/vectorisrs.c<br>
+++ /dev/null<br>
@@ -1,54 +0,0 @@<br>
-/*<br>
- * RM5231 Interrupt Vectoring<br>
- *<br>
- * vectorisrs.c,v 1.6 2004/06/23 18:16:36<br>
- */<br>
-<br>
-#include <rtems.h><br>
-#include <stdlib.h><br>
-#include <libcpu/rm5231.h><br>
-<br>
-void mips_default_isr( int vector );<br>
-<br>
-#define CALL_ISR(_vector,_frame) \<br>
- do { \<br>
- if ( _ISR_Vector_table[_vector] ) \<br>
- (_ISR_Vector_table[_vector])(_vector,_frame); \<br>
- else \<br>
- mips_default_isr(_vector); \<br>
- } while (0)<br>
-<br>
-#include <rtems/bspIo.h> /* for printk */<br>
-<br>
-void mips_vector_isr_handlers( CPU_Interrupt_frame *frame )<br>
-{<br>
- unsigned int sr;<br>
- unsigned int cause;<br>
- unsigned int i;<br>
- unsigned int mask;<br>
-<br>
- mips_get_sr( sr );<br>
- mips_get_cause( cause );<br>
-<br>
- cause &= (sr & SR_IMASK);<br>
- cause >>= CAUSE_IPSHIFT;<br>
-<br>
- for ( i=1, mask=0x80 ; i<=8 ; i++, mask >>= 1 ) {<br>
- if ( cause & mask )<br>
- CALL_ISR( MIPS_INTERRUPT_BASE + 8 - i, frame );<br>
- }<br>
-}<br>
-<br>
-void mips_default_isr( int vector )<br>
-{<br>
- unsigned int sr;<br>
- unsigned int cause;<br>
-<br>
- mips_get_sr( sr );<br>
- mips_get_cause( cause );<br>
-<br>
- printk( "Unhandled isr exception: vector 0x%02x, cause 0x%08X, sr 0x%08X\n",<br>
- vector, cause, sr );<br>
- rtems_fatal_error_occurred(1);<br>
-}<br>
-<br>
diff --git a/c/src/lib/libcpu/mips/tx39/vectorisrs/vectorisrs.c b/c/src/lib/libcpu/mips/tx39/vectorisrs/vectorisrs.c<br>
deleted file mode 100644<br>
index 2805533..0000000<br>
--- a/c/src/lib/libcpu/mips/tx39/vectorisrs/vectorisrs.c<br>
+++ /dev/null<br>
@@ -1,58 +0,0 @@<br>
-/*<br>
- * TX3904 Interrupt Vectoring<br>
- */<br>
-<br>
-#include <rtems.h><br>
-#include <stdlib.h><br>
-#include <libcpu/tx3904.h><br>
-<br>
-void mips_default_isr( int vector );<br>
-<br>
-#define CALL_ISR(_vector,_frame) \<br>
- do { \<br>
- if ( _ISR_Vector_table[_vector] ) \<br>
- (_ISR_Vector_table[_vector])(_vector,_frame); \<br>
- else \<br>
- mips_default_isr(_vector); \<br>
- } while (0)<br>
-<br>
-#include <rtems/bspIo.h> /* for printk */<br>
-<br>
-void mips_vector_isr_handlers( CPU_Interrupt_frame *frame )<br>
-{<br>
- unsigned int sr;<br>
- unsigned int cause;<br>
-<br>
- mips_get_sr( sr );<br>
- mips_get_cause( cause );<br>
-<br>
- cause &= (sr & SR_IMASK);<br>
- cause >>= CAUSE_IPSHIFT;<br>
-<br>
- if ( cause & 0x80 ) /* IP[5] ==> INT0 */<br>
- CALL_ISR( TX3904_IRQ_INT0, frame );<br>
-<br>
- if ( cause & 0x40 ) { /* (IP[4] == 1) ==> IP[0-3] are valid */<br>
- unsigned int v = (cause >> 2) & 0x0f;<br>
- CALL_ISR( MIPS_INTERRUPT_BASE + v, frame );<br>
- }<br>
-<br>
- if ( cause & 0x02 ) /* SW[0] */<br>
- CALL_ISR( TX3904_IRQ_SOFTWARE_1, frame );<br>
-<br>
- if ( cause & 0x01 ) /* IP[1] */<br>
- CALL_ISR( TX3904_IRQ_SOFTWARE_2, frame );<br>
-}<br>
-<br>
-void mips_default_isr( int vector )<br>
-{<br>
- unsigned int sr;<br>
- unsigned int cause;<br>
-<br>
- mips_get_sr( sr );<br>
- mips_get_cause( cause );<br>
-<br>
- printk( "Unhandled isr exception: vector 0x%02x, cause 0x%08X, sr 0x%08X\n",<br>
- vector, cause, sr );<br>
- rtems_fatal_error_occurred(1);<br>
-}<br>
diff --git a/c/src/lib/libcpu/mips/tx49/vectorisrs/vectorisrs.c b/c/src/lib/libcpu/mips/tx49/vectorisrs/vectorisrs.c<br>
deleted file mode 100644<br>
index 1f6b811..0000000<br>
--- a/c/src/lib/libcpu/mips/tx49/vectorisrs/vectorisrs.c<br>
+++ /dev/null<br>
@@ -1,61 +0,0 @@<br>
-/*<br>
- * TX4925 Interrupt Vectoring<br>
- *<br>
- * vectorisrs.c,v 1.6 2004/06/23 18:16:36<br>
- */<br>
-<br>
-#include <rtems.h><br>
-#include <stdlib.h><br>
-#include <libcpu/tx4925.h><br>
-<br>
-void mips_default_isr( int vector );<br>
-<br>
-#define CALL_ISR(_vector,_frame) \<br>
- do { \<br>
- if ( _ISR_Vector_table[_vector] ) \<br>
- (_ISR_Vector_table[_vector])(_vector,_frame); \<br>
- else \<br>
- mips_default_isr(_vector); \<br>
- } while (0)<br>
-<br>
-#include <rtems/bspIo.h> /* for printk */<br>
-<br>
-void mips_vector_isr_handlers( CPU_Interrupt_frame *frame )<br>
-{<br>
- unsigned int sr;<br>
- unsigned int cause;<br>
- unsigned int pending;<br>
-<br>
- mips_get_sr( sr );<br>
- mips_get_cause( cause );<br>
-<br>
- pending = (cause & sr & 0x700) >> CAUSE_IPSHIFT;<br>
-<br>
- if ( pending & 0x4 ) { /* (IP[2] == 1) ==> IP[3-7] are valid */<br>
- unsigned int v = (cause >> (CAUSE_IPSHIFT + 3)) & 0x1f;<br>
- CALL_ISR( MIPS_INTERRUPT_BASE + v, frame );<br>
- }<br>
-<br>
- if ( pending & 0x01 ) /* IP[0] */<br>
- CALL_ISR( TX4925_IRQ_SOFTWARE_1, frame );<br>
-<br>
- if ( pending & 0x02 ) /* IP[1] */<br>
- CALL_ISR( TX4925_IRQ_SOFTWARE_2, frame );<br>
-}<br>
-<br>
-void mips_default_isr( int vector )<br>
-{<br>
- unsigned int sr;<br>
- unsigned int cause;<br>
-<br>
- mips_get_sr( sr );<br>
- mips_get_cause( cause );<br>
-<br>
- printk( "Unhandled isr exception: vector 0x%02x, cause 0x%08X, sr 0x%08X\n",<br>
- vector, cause, sr );<br>
-<br>
- while(1); /* Lock it up */<br>
-<br>
- rtems_fatal_error_occurred(1);<br>
-}<br>
-<br>
-- <br>
1.7.7<br>
<br>
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