<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">Hi Chris</div><div class="gmail_quote"><br></div><div class="gmail_quote">2014-10-19 8:36 GMT+02:00 Chris Nott <span dir="ltr"><<a href="mailto:chrisn@vl.com.au" target="_blank">chrisn@vl.com.au</a>></span>:<br><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex">
<div bgcolor="#FFFFFF" text="#000000">
<div>Hi,<span class=""><br>
<br>
On 18/10/2014 3:45 AM, Tomasz Gregorek wrote:<br>
</span></div><span class="">
<blockquote type="cite">
<div dir="ltr">Hi Chris
<div><br>
</div>
<div><span>-
pll_q = ( (long) ( src_clk * pll_n + src_clk * pll_n / 2 ) )
/ pll_m / 48;
+ pll_q = ( (long) ( src_clk * pll_n ) ) / pll_m / 48;</span><br>
</div>
<div><span><br>
</span></div>
<div>Your fix for the PLL_Q calculation is correct.</div>
<div>It supposed to be rounding from <=X.5 to X and from
>X.5 to (X+1) but first I messed up the equation second
this clock should not exceed 48MHz so rounding up is not
necessarily the best idea.</div>
</div>
</blockquote></span>
A check for clock <= 48MHz would be good. Even better if we can
check if USB is used and warn if it is not exactly 48MHz..<span class=""><br>
<br>
<blockquote type="cite">
<div dir="ltr">
<div><br>
</div>
<div><br>
</div>
<div>
<div><span>-#define
FLASH_ACR_LATENCY( val ) BSP_FLD32( val, 0, 3 )
-#define FLASH_ACR_LATENCY_MSK BSP_MSK32( 0, 3 )</span><br>
</div>
<div><br>
</div>
<div><span>+#define
STM32F4_FLASH_ACR_LATENCY(val) BSP_FLD32(val, 0, 2) //
Flash access latency
+#define STM32F4_FLASH_ACR_LATENCY_GET(reg)
BSP_FLD32GET(reg, 0, 2)
+#define STM32F4_FLASH_ACR_LATENCY_SET(reg, val)
BSP_FLD32SET(reg, val, 0, 2)</span></div>
</div>
<div><span><br>
</span></div>
<div>I would argue about the STM32F4_FLASH_ACR_LATENCY where you
use 3LSB of ACR (up to 7 wait states) which is correct for
the STM32F405xx/07xx and STM32F415xx/17xx while for
the STM32F42xxx and STM32F43xxx there are 4LSBs in use (up to
15 wait states). </div>
<div>I am not sure how to deal with it. Do we need to
distinguish for which chip we are compiling?</div>
</div>
</blockquote></span>
I think it should be safe to use 3 bits as it was. It's a pretty low
risk that someone will accidentally set a flash latency > 7 and
it is pretty likely a write to that bit would be ignored in the
hardware anyway.<br>
<br>
Ideally yes when we support STM42xxx etc. as well we should add a
build option, but there may be more we need to add, like the
operating chip voltage. Honesty my priority so far is first adding
register maps and example projects to make RTEMS more useful out of
the box for standard boards like STM32F4Discovery. <br></div></blockquote><div><br></div><div><br></div><div>I vote to keep simplified pll_q calculation, maybe add more comment in the configuration header for it. If we add a check, than also a switch to turn on/off USB would be needed so the warning will not print out if USB is not used. Of course it will be very good to have these but I agree with your priority of making RTEMS more useful on Discovery like boards first and we can keep upgrading the bsp with time.</div><div><br></div><div>Yes, there are more registers specific to specific CPU versions, different number of UARTs and other peripherals. As above, lets keep it simple for the start.</div><div><br></div><div>Myself I have working UART driver with interrupt driven data receiver (currently it is polled UART). I should be able to push it in few days. I2C is half working but will take more time due to work overload.</div><div><br></div><div>Cheers</div><div>Tomasz</div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex"><div bgcolor="#FFFFFF" text="#000000"><span class="">
<br>
<blockquote type="cite">
<div dir="ltr">
<div><br>
</div>
<div><br>
</div>
<div>Thanks and regards</div>
<div>Tomasz</div>
<div><br>
</div>
</div>
<div class="gmail_extra"><br>
<div class="gmail_quote">2014-10-18 11:06 GMT+02:00 Chris Nott <span dir="ltr"><<a href="mailto:chrisn@vl.com.au" target="_blank">chrisn@vl.com.au</a>></span>:<br>
<blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex">Hi,<br>
<br>
I sent these header file changes previously, they didn't get
picked up.<br>
<br>
I re-merged with the head, cleaned up formatting and fixed a
bug with PLL_Q setting not generating the right auxiliary
clock frequency for USB peripheral - Tomasz this was your
change, could you please review my fix.<br>
<br>
Regards,<br>
Chris.<br>
<br>
_______________________________________________<br>
devel mailing list<br>
<a href="mailto:devel@rtems.org" target="_blank">devel@rtems.org</a><br>
<a href="http://lists.rtems.org/mailman/listinfo/devel" target="_blank">http://lists.rtems.org/mailman/listinfo/devel</a><br>
</blockquote>
</div>
<br>
</div>
</blockquote>
<br>
</span></div>
<br>_______________________________________________<br>
devel mailing list<br>
<a href="mailto:devel@rtems.org">devel@rtems.org</a><br>
<a href="http://lists.rtems.org/mailman/listinfo/devel" target="_blank">http://lists.rtems.org/mailman/listinfo/devel</a><br></blockquote></div><br></div></div>