<p dir="ltr">Please explain what the purpose of this change is. You may also want to read the RTEMS wiki instructions on submitting a patch. I think you just did a git diff and didn't use the format-patch feature</p>
<div class="gmail_quote">On Dec 22, 2015 6:17 PM, "Zaphod Beeblebrox" <<a href="mailto:liamgreenlee@gmail.com">liamgreenlee@gmail.com</a>> wrote:<br type="attribution"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">-#ifndef _BSPABORT_H<br>
-#define _BSPABORT_H<br>
-<br>
-#include <rtems/system.h><br>
-#include <rtems.h><br>
-#include <rtems/bspIo.h><br>
-<br>
-#define INSN_MASK 0xc5<br>
-<br>
-#define INSN_STM1 0x80<br>
-#define INSN_STM2 0x84<br>
-#define INSN_STR 0x40<br>
-#define INSN_STRB 0x44<br>
-<br>
-#define INSN_LDM1 0x81<br>
-#define INSN_LDM23 0x85<br>
-#define INSN_LDR 0x41<br>
-#define INSN_LDRB 0x45<br>
-<br>
-#define GET_RD(x) ((x & 0x0000f000) >> 12)<br>
-#define GET_RN(x) ((x & 0x000f0000) >> 16)<br>
-<br>
-#define GET_U(x) ((x & 0x00800000) >> 23)<br>
-#define GET_I(x) ((x & 0x02000000) >> 25)<br>
-<br>
-#define GET_REG(r, ctx) (((uint32_t *)ctx)[r])<br>
-#define SET_REG(r, ctx, v) (((uint32_t *)ctx)[r] = v)<br>
-#define GET_OFFSET(insn) (insn & 0xfff)<br>
-<br>
-/*<br>
- * Prototypes<br>
- */<br>
-void _print_full_context(uint32_t);<br>
-void do_data_abort(uint32_t, uint32_t, Context_Control *);<br>
-<br>
-#endif /* _BSPABORT_H */<br>
+- * ARM CPU Dependent Source<br>
+- *<br>
+- * If you want a small footprint RTEMS, pls use simple_abort.c<br>
+- */<br>
+-<br>
+-/*<br>
+- * COPYRIGHT (c) 2007 Ray Xu.<br>
+- * mailto: Rayx at gmail dot com<br>
+- *<br>
+- * COPYRIGHT (c) 2000 Canon Research Centre France SA.<br>
+- * Emmanuel Raguet, mailto:<a href="mailto:raguet@crf.canon.fr">raguet@crf.canon.fr</a><br>
+- *<br>
+- * Copyright (c) 2002 Advent Networks, Inc<br>
+- * Jay Monkman <<a href="mailto:jmonkman@adventnetworks.com">jmonkman@adventnetworks.com</a>><br>
+- *<br>
+- * The license and distribution terms for this file may be<br>
+- * found in the file LICENSE in this distribution or at<br>
+- * <a href="http://www.rtems.org/license/LICENSE" rel="noreferrer" target="_blank">http://www.rtems.org/license/LICENSE</a>.<br>
+- *<br>
+- */<br>
+-<br>
+-#include <rtems/system.h><br>
+-#include <rtems.h><br>
+-#include <rtems/bspIo.h><br>
+-#include "abort.h"<br>
+-<br>
+-uint32_t g_data_abort_cnt = 0;<br>
+-/*this is a big overhead for MCU only got 16K RAM*/<br>
+-uint32_t g_data_abort_insn_list[1024];<br>
+-<br>
+-<br>
+-char *_print_full_context_mode2txt[0x20]={<br>
+- [0x0]="user", /* User */<br>
+- [0x1]="fiq", /* FIQ - Fast Interrupt Request */<br>
+- [0x2]="irq", /* IRQ - Interrupt Request */<br>
+- [0x3]="super", /* Supervisor */<br>
+- [0x7]="abort", /* Abort */<br>
+- [0xb]="undef", /* Undefined */<br>
+- [0xf]="system" /* System */<br>
+-};<br>
+-<br>
+-void _print_full_context(uint32_t spsr)<br>
+-{<br>
+- char *mode;<br>
+- uint32_t prev_sp,prev_lr,cpsr,arm_switch_reg;<br>
+- int i;<br>
+-<br>
+- printk("active thread thread 0x%08x\n", rtems_task_self());<br>
+-<br>
+- mode=_print_full_context_mode2txt[spsr&0x1f];<br>
+- if(!mode) mode="unknown";<br>
+-<br>
+- __asm__ volatile (ARM_SWITCH_TO_ARM<br>
+- " MRS %[cpsr], cpsr \n"<br>
+- " ORR %[arm_switch_reg], %[spsr], #0xc0 \n"<br>
+- " MSR cpsr_c, %[arm_switch_reg] \n"<br>
+- " MOV %[prev_sp], sp \n"<br>
+- " MOV %[prev_lr], lr \n"<br>
+- " MSR cpsr_c, %[cpsr] \n"<br>
+- ARM_SWITCH_BACK<br>
+- : [arm_switch_reg] "=&r" (arm_switch_reg), [prev_sp] "=&r" (prev_sp), [prev_lr] "=&r" (prev_lr),<br>
+- [cpsr] "=&r" (cpsr)<br>
+- : [spsr] "r" (spsr)<br>
+- : "cc");<br>
+-<br>
+- printk("Previous sp=0x%08x lr=0x%08x and actual cpsr=%08x\n",<br>
+- prev_sp, prev_lr, cpsr);<br>
+-<br>
+- for(i=0;i<48;){<br>
+- printk(" 0x%08x",((uint32_t*)prev_sp)[i++]);<br>
+- if((i%6) == 0)<br>
+- printk("\n");<br>
+- }<br>
+-<br>
+-}<br>
+-<br>
+-<br>
+-/* This function is supposed to figure out what caused the<br>
+- * data abort, do that, then return.<br>
+- *<br>
+- * All unhandled instructions cause the system to hang.<br>
+- */<br>
+-<br>
+-void do_data_abort(<br>
+- uint32_t insn,<br>
+- uint32_t spsr,<br>
+- Context_Control *ctx<br>
+-)<br>
+-{<br>
+- /* Clarify, which type is correct, CPU_Exception_frame or Context_Control */<br>
+- uint8_t decode;<br>
+- uint8_t insn_type;<br>
+- rtems_interrupt_level level;<br>
+-<br>
+- g_data_abort_insn_list[g_data_abort_cnt & 0x3ff] = ctx->register_lr - 8;<br>
+- g_data_abort_cnt++;<br>
+-<br>
+- decode = ((insn >> 20) & 0xff);<br>
+-<br>
+- insn_type = decode & INSN_MASK;<br>
+- switch(insn_type) {<br>
+- case INSN_STM1:<br>
+- printk("\n\nINSN_STM1\n");<br>
+- break;<br>
+- case INSN_STM2:<br>
+- printk("\n\nINSN_STM2\n");<br>
+- break;<br>
+- case INSN_STR:<br>
+- printk("\n\nINSN_STR\n");<br>
+- break;<br>
+- case INSN_STRB:<br>
+- printk("\n\nINSN_STRB\n");<br>
+- break;<br>
+- case INSN_LDM1:<br>
+- printk("\n\nINSN_LDM1\n");<br>
+- break;<br>
+- case INSN_LDM23:<br>
+- printk("\n\nINSN_LDM23\n");<br>
+- break;<br>
+- case INSN_LDR:<br>
+- printk("\n\nINSN_LDR\n");<br>
+- break;<br>
+- case INSN_LDRB:<br>
+- printk("\n\nINSN_LDRB\n");<br>
+- break;<br>
+- default:<br>
+- printk("\n\nUnrecognized instruction\n");<br>
+- break;<br>
+- }<br>
+-<br>
+- printk("data_abort at address 0x%x, instruction: 0x%x, spsr = 0x%x\n",<br>
+- ctx->register_lr - 8, insn, spsr);<br>
+-<br>
+- _print_full_context(spsr);<br>
+-<br>
+- /* disable interrupts, wait forever */<br>
+- rtems_interrupt_disable(level);<br>
+- (void) level; /* avoid set but unused warning */<br>
+-<br>
+- while(1) {<br>
+- continue;<br>
+- }<br>
+-}<br>
+-<br>
+diff --git c/src/lib/libbsp/arm/shared/abort/abort.h c/src/lib/libbsp/arm/shared/abort/abort.h<br>
+index 6d8704f..e69de29 100644<br>
+--- c/src/lib/libbsp/arm/shared/abort/abort.h<br>
++++ c/src/lib/libbsp/arm/shared/abort/abort.h<br>
+@@ -1,52 +0,0 @@<br>
+-/*<br>
+- * COPYRIGHT (c) 2007 Ray Xu.<br>
+- * mailto: Rayx at gmail dot com<br>
+- *<br>
+- * COPYRIGHT (c) 2000 Canon Research Centre France SA.<br>
+- * Emmanuel Raguet, mailto:<a href="mailto:raguet@crf.canon.fr">raguet@crf.canon.fr</a><br>
+- *<br>
+- * Copyright (c) 2002 Advent Networks, Inc<br>
+- * Jay Monkman <<a href="mailto:jmonkman@adventnetworks.com">jmonkman@adventnetworks.com</a>><br>
+- *<br>
+- * The license and distribution terms for this file may be<br>
+- * found in the file LICENSE in this distribution or at<br>
+- * <a href="http://www.rtems.org/license/LICENSE" rel="noreferrer" target="_blank">http://www.rtems.org/license/LICENSE</a>.<br>
+- *<br>
+- */<br>
+-<br>
+-#ifndef _BSPABORT_H<br>
+-#define _BSPABORT_H<br>
+-<br>
+-#include <rtems/system.h><br>
+-#include <rtems.h><br>
+-#include <rtems/bspIo.h><br>
+-<br>
+-#define INSN_MASK 0xc5<br>
+-<br>
+-#define INSN_STM1 0x80<br>
+-#define INSN_STM2 0x84<br>
+-#define INSN_STR 0x40<br>
+-#define INSN_STRB 0x44<br>
+-<br>
+-#define INSN_LDM1 0x81<br>
+-#define INSN_LDM23 0x85<br>
+-#define INSN_LDR 0x41<br>
+-#define INSN_LDRB 0x45<br>
+-<br>
+-#define GET_RD(x) ((x & 0x0000f000) >> 12)<br>
+-#define GET_RN(x) ((x & 0x000f0000) >> 16)<br>
+-<br>
+-#define GET_U(x) ((x & 0x00800000) >> 23)<br>
+-#define GET_I(x) ((x & 0x02000000) >> 25)<br>
+-<br>
+-#define GET_REG(r, ctx) (((uint32_t *)ctx)[r])<br>
+-#define SET_REG(r, ctx, v) (((uint32_t *)ctx)[r] = v)<br>
+-#define GET_OFFSET(insn) (insn & 0xfff)<br>
+-<br>
+-/*<br>
+- * Prototypes<br>
+- */<br>
+-void _print_full_context(uint32_t);<br>
+-void do_data_abort(uint32_t, uint32_t, Context_Control *);<br>
+-<br>
+-#endif /* _BSPABORT_H */<br>
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/i2c/cadence-i2c.c b/c/src/lib/libbsp/arm/xilinx-zynq/i2c/cadence-i2c.c<br>
index 76211da..035333a 100644<br>
--- a/c/src/lib/libbsp/arm/xilinx-zynq/i2c/cadence-i2c.c<br>
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/i2c/cadence-i2c.c<br>
@@ -1,4 +1,7 @@<br>
-/*<br>
+/*@file<br>
+ *@ingroup xilinx-zynq_i2c<br>
+ *@brief<br>
+ *<br>
* Copyright (c) 2014 embedded brains GmbH. All rights reserved.<br>
*<br>
* embedded brains GmbH<br>
@@ -57,19 +60,31 @@ typedef struct {<br>
bool hold;<br>
rtems_id task_id;<br>
uint32_t input_clock;<br>
- rtems_vector_number irq;<br>
+ rtems_vector_number irq;xilinx-zynq_i2c<br>
} cadence_i2c_bus;<br>
<br>
+/*<br>
+@ingroup xilinx-zynq_i2c<br>
+@brief Disable cadence interrupts<br>
+*/<br>
static void cadence_i2c_disable_interrupts(volatile cadence_i2c *regs)<br>
{<br>
regs->irqdisable = 0xffff;<br>
}<br>
<br>
+/*<br>
+@ingroup xilinx-zynq_i2c<br>
+@brief Clear irq status<br>
+*/<br>
static void cadence_i2c_clear_irq_status(volatile cadence_i2c *regs)<br>
{<br>
regs->irqstatus = regs->irqstatus;<br>
}<br>
<br>
+/*<br>
+@ingroup xilinx-zynq_i2c<br>
+@brief Reset cadence<br>
+*/<br>
static void cadence_i2c_reset(cadence_i2c_bus *bus)<br>
{<br>
volatile cadence_i2c *regs = bus->regs;<br>
@@ -90,6 +105,10 @@ static void cadence_i2c_reset(cadence_i2c_bus *bus)<br>
cadence_i2c_clear_irq_status(regs);<br>
}<br>
<br>
+/*<br>
+@ingroup xilinx-zynq_i2c<br>
+@brief Set cadence i2c address size<br>
+*/<br>
static uint32_t cadence_i2c_set_address_size(<br>
const i2c_msg *msg,<br>
uint32_t control<br>
@@ -104,6 +123,10 @@ static uint32_t cadence_i2c_set_address_size(<br>
return control;<br>
}<br>
<br>
+/*<br>
+@ingroup xilinx-zynq_i2c<br>
+@brief Setup read transfer<br>
+*/<br>
static void cadence_i2c_setup_read_transfer(<br>
cadence_i2c_bus *bus,<br>
volatile cadence_i2c *regs,<br>
@@ -138,6 +161,10 @@ static void cadence_i2c_next_byte(cadence_i2c_bus *bus)<br>
}<br>
}<br>
<br>
+/*<br>
+@ingroup xilinx-zynq_i2c<br>
+@brief Cadence i2c write to fifo<br>
+*/<br>
static void cadence_i2c_write_to_fifo(<br>
cadence_i2c_bus *bus,<br>
volatile cadence_i2c *regs<br>
@@ -164,6 +191,10 @@ static void cadence_i2c_write_to_fifo(<br>
}<br>
}<br>
<br>
+/*<br>
+@ingroup xilinx-zynq_i2c<br>
+@brief Setup cadence i2c write transfer<br>
+*/<br>
static void cadence_i2c_setup_write_transfer(<br>
cadence_i2c_bus *bus,<br>
volatile cadence_i2c *regs,<br>
@@ -176,6 +207,10 @@ static void cadence_i2c_setup_write_transfer(<br>
cadence_i2c_write_to_fifo(bus, regs);<br>
}<br>
<br>
+/*<br>
+@ingroup xilinx-zynq_i2c<br>
+@brief Setup cadence i2c transfer<br>
+*/<br>
static void cadence_i2c_setup_transfer(<br>
cadence_i2c_bus *bus,<br>
volatile cadence_i2c *regs<br>
@@ -218,6 +253,10 @@ static void cadence_i2c_setup_transfer(<br>
regs->address = CADENCE_I2C_ADDRESS(msgs->addr);<br>
}<br>
<br>
+/*<br>
+@ingroup xilinx-zynq_i2c<br>
+@brief Continue cadence i2c read transfer<br>
+*/<br>
static void cadence_i2c_continue_read_transfer(<br>
cadence_i2c_bus *bus,<br>
volatile cadence_i2c *regs<br>
@@ -253,6 +292,10 @@ static void cadence_i2c_continue_read_transfer(<br>
}<br>
}<br>
<br>
+/*<br>
+@ingroup xilinx-zynq_i2c<br>
+@brief Interrup cadence i2c<br>
+*/<br>
static void cadence_i2c_interrupt(void *arg)<br>
{<br>
cadence_i2c_bus *bus = arg;<br>
@@ -321,6 +364,10 @@ static void cadence_i2c_interrupt(void *arg)<br>
}<br>
}<br>
<br>
+/*<br>
+@ingroup xilinx-zynq_i2c<br>
+@brief Cadence i2c transfer<br>
+*/<br>
static int cadence_i2c_transfer(<br>
i2c_bus *base,<br>
i2c_msg *msgs,<br>
@@ -362,6 +409,11 @@ static int cadence_i2c_transfer(<br>
return bus->irqstatus == 0 ? 0 : -EIO;<br>
}<br>
<br>
+<br>
+/*<br>
+@ingroup xilinx-zynq_i2c<br>
+@brief Set cadence i2c clock<br>
+*/<br>
static int cadence_i2c_set_clock(i2c_bus *base, unsigned long clock)<br>
{<br>
cadence_i2c_bus *bus = (cadence_i2c_bus *) base;<br>
@@ -407,6 +459,10 @@ static int cadence_i2c_set_clock(i2c_bus *base, unsigned long clock)<br>
return 0;<br>
}<br>
<br>
+/*<br>
+@ingroup xilinx-zynq_i2c<br>
+@brief Destroy cadence i2c<br>
+*/<br>
static void cadence_i2c_destroy(i2c_bus *base)<br>
{<br>
cadence_i2c_bus *bus = (cadence_i2c_bus *) base;<br>
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/include/cadence-i2c-regs.h b/c/src/lib/libbsp/arm/xilinx-zynq/include/cadence-i2c-regs.h<br>
index c06a47c..a5a4e02 100644<br>
--- a/c/src/lib/libbsp/arm/xilinx-zynq/include/cadence-i2c-regs.h<br>
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/include/cadence-i2c-regs.h<br>
@@ -1,4 +1,8 @@<br>
/*<br>
+ *@file<br>
+ *@defgroup xilinx-zynq_i2c Cadenc I2C Setup<br>
+ *<br>
+ *<br>
* Copyright (c) 2014 embedded brains GmbH. All rights reserved.<br>
*<br>
* embedded brains GmbH<br>
_______________________________________________<br>
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</blockquote></div>