<div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote">On Sun, Jan 3, 2016 at 8:03 PM, Gedare Bloom <span dir="ltr"><<a href="mailto:gedare@rtems.org" target="_blank">gedare@rtems.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Instead of deleting the cpu supplement from the doc, it may be worth<br>
it to leave a stub that indicates when support was removed?<br>
<div class="HOEnZb"><div class="h5"><br></div></div></blockquote><div><br></div><div>We haven't done that in the past. We have probably removed 6+ architectures</div><div>in the history. I honestly think no one will look here. The tools will be gone, configure</div><div>will fail, etc,. <br><br>I would like to add a section to the release page/information for Transition guidance.</div><div>4.11 needed that and I think the next few releases will need it as well.</div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="HOEnZb"><div class="h5">
On Sun, Jan 3, 2016 at 4:27 PM, Joel Sherrill <<a href="mailto:joel@rtems.org">joel@rtems.org</a>> wrote:<br>
> From: Joel Sherrill <<a href="mailto:joel.sherrill@oarcorp.com">joel.sherrill@oarcorp.com</a>><br>
><br>
> updates #2452.<br>
> ---<br>
> c/ACKNOWLEDGEMENTS | 9 +-<br>
> c/TOOL_TARGETS | 3 -<br>
> c/src/aclocal/check-networking.m4 | 2 +-<br>
> c/src/aclocal/rtems-cpu-subdirs.m4 | 1 -<br>
> c/src/lib/libbsp/h8300/Makefile.am | 7 -<br>
> c/src/lib/libbsp/h8300/acinclude.m4 | 8 -<br>
> c/src/lib/libbsp/h8300/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a> | 19 -<br>
> cpukit/aclocal/check-networking.m4 | 2 +-<br>
> cpukit/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a> | 4 -<br>
> cpukit/librpc/src/xdr/xdr_float.c | 1 -<br>
> cpukit/score/cpu/Makefile.am | 1 -<br>
> cpukit/score/cpu/h8300/Makefile.am | 19 -<br>
> cpukit/score/cpu/h8300/README | 27 -<br>
> cpukit/score/cpu/h8300/cpu.c | 134 ---<br>
> cpukit/score/cpu/h8300/cpu_asm.S | 221 ----<br>
> .../score/cpu/h8300/h8300-exception-frame-print.c | 24 -<br>
> cpukit/score/cpu/h8300/<a href="http://preinstall.am" rel="noreferrer" target="_blank">preinstall.am</a> | 45 -<br>
> cpukit/score/cpu/h8300/rtems/asm.h | 118 --<br>
> cpukit/score/cpu/h8300/rtems/score/cpu.h | 1176 --------------------<br>
> cpukit/score/cpu/h8300/rtems/score/cpuatomic.h | 14 -<br>
> cpukit/score/cpu/h8300/rtems/score/h8300.h | 44 -<br>
> cpukit/score/cpu/h8300/rtems/score/types.h | 47 -<br>
> doc/cpu_supplement/Makefile.am | 6 -<br>
> doc/cpu_supplement/cpu_supplement.texi | 2 -<br>
> doc/cpu_supplement/h8300.t | 11 -<br>
> testsuites/libtests/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a> | 3 -<br>
> testsuites/psxtests/psx04/task3.c | 2 +-<br>
> 27 files changed, 5 insertions(+), 1945 deletions(-)<br>
> delete mode 100644 c/src/lib/libbsp/h8300/Makefile.am<br>
> delete mode 100644 c/src/lib/libbsp/h8300/acinclude.m4<br>
> delete mode 100644 c/src/lib/libbsp/h8300/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a><br>
> delete mode 100644 cpukit/score/cpu/h8300/Makefile.am<br>
> delete mode 100644 cpukit/score/cpu/h8300/README<br>
> delete mode 100644 cpukit/score/cpu/h8300/cpu.c<br>
> delete mode 100644 cpukit/score/cpu/h8300/cpu_asm.S<br>
> delete mode 100644 cpukit/score/cpu/h8300/h8300-exception-frame-print.c<br>
> delete mode 100644 cpukit/score/cpu/h8300/<a href="http://preinstall.am" rel="noreferrer" target="_blank">preinstall.am</a><br>
> delete mode 100644 cpukit/score/cpu/h8300/rtems/asm.h<br>
> delete mode 100644 cpukit/score/cpu/h8300/rtems/score/cpu.h<br>
> delete mode 100644 cpukit/score/cpu/h8300/rtems/score/cpuatomic.h<br>
> delete mode 100644 cpukit/score/cpu/h8300/rtems/score/h8300.h<br>
> delete mode 100644 cpukit/score/cpu/h8300/rtems/score/types.h<br>
> delete mode 100644 doc/cpu_supplement/h8300.t<br>
><br>
> diff --git a/c/ACKNOWLEDGEMENTS b/c/ACKNOWLEDGEMENTS<br>
> index 76956fd..25d4a0b 100644<br>
> --- a/c/ACKNOWLEDGEMENTS<br>
> +++ b/c/ACKNOWLEDGEMENTS<br>
> @@ -150,9 +150,8 @@ The following persons/organizations have made contributions:<br>
> it easier to support external interrupt controllers.<br>
><br>
> + Joel Sherrill <joel@OARcorp.com> for the BSPs that work with<br>
> - numerous simulators including psim, c4xsim, h8sim, armulator,<br>
> - sim68000, and simcpu32. Most of these BSPs work with instruction<br>
> - set simulators in gdb.<br>
> + numerous simulators. Many work with instruction set simulators<br>
> + in gdb.<br>
><br>
> + Darlene Stewart <<a href="mailto:Darlene.Stewart@nrc.ca">Darlene.Stewart@nrc.ca</a>> and Charles Gauthier<br>
> <<a href="mailto:Charles.Gauthier@nrc.ca">Charles.Gauthier@nrc.ca</a>> of the Institute for Information Technology<br>
> @@ -165,10 +164,6 @@ The following persons/organizations have made contributions:<br>
> Technology for the National Research Council of Canada<br>
> submitted the RTEMS Cache Manager.<br>
><br>
> -+ Philip Quaife <<a href="mailto:philip@qs.co.nz">philip@qs.co.nz</a>> of Q Solutions ported<br>
> - RTEMS to the Hitachi H8300H. This effort was sponsored by<br>
> - Comnet Technologies Ltd.<br>
> -<br>
> + Joel Sherrill <joel@OARcorp.com> and Jennifer Averett <jennifer@OARcorp.com><br>
> for the Texas Instruments C3x/C4x port and c4xsim BSP that works<br>
> with the C3x/C4X instruction set simulator in gdb.<br>
> diff --git a/c/TOOL_TARGETS b/c/TOOL_TARGETS<br>
> index 4811277..3b22d81 100644<br>
> --- a/c/TOOL_TARGETS<br>
> +++ b/c/TOOL_TARGETS<br>
> @@ -7,9 +7,6 @@ arm:<br>
> c4x:<br>
> c4x-rtems COFF Requires patches<br>
><br>
> -h8300:<br>
> - h8300-rtems COFF<br>
> -<br>
> i386:<br>
> i386-rtems ELF<br>
><br>
> diff --git a/c/src/aclocal/check-networking.m4 b/c/src/aclocal/check-networking.m4<br>
> index 53d2d36..69265ac 100644<br>
> --- a/c/src/aclocal/check-networking.m4<br>
> +++ b/c/src/aclocal/check-networking.m4<br>
> @@ -8,7 +8,7 @@ AC_CACHE_CHECK([whether BSP supports networking],<br>
> [dnl<br>
> case "$RTEMS_CPU" in<br>
> # do not have address space to hold BSD TCP/IP stack<br>
> - avr*|h8300*|m32c*)<br>
> + avr*|m32c*)<br>
> rtems_cv_HAS_NETWORKING="no"<br>
> ;;<br>
> *)<br>
> diff --git a/c/src/aclocal/rtems-cpu-subdirs.m4 b/c/src/aclocal/rtems-cpu-subdirs.m4<br>
> index 3cb28b1..5f10bda 100644<br>
> --- a/c/src/aclocal/rtems-cpu-subdirs.m4<br>
> +++ b/c/src/aclocal/rtems-cpu-subdirs.m4<br>
> @@ -14,7 +14,6 @@ _RTEMS_CPU_SUBDIR([arm],[$1]);;<br>
> _RTEMS_CPU_SUBDIR([bfin],[$1]);;<br>
> _RTEMS_CPU_SUBDIR([epiphany],[$1]);;<br>
> _RTEMS_CPU_SUBDIR([avr],[$1]);;<br>
> -_RTEMS_CPU_SUBDIR([h8300],[$1]);;<br>
> _RTEMS_CPU_SUBDIR([i386],[$1]);;<br>
> _RTEMS_CPU_SUBDIR([lm32],[$1]);;<br>
> _RTEMS_CPU_SUBDIR([m32c],[$1]);;<br>
> diff --git a/c/src/lib/libbsp/h8300/Makefile.am b/c/src/lib/libbsp/h8300/Makefile.am<br>
> deleted file mode 100644<br>
> index 140d76e..0000000<br>
> --- a/c/src/lib/libbsp/h8300/Makefile.am<br>
> +++ /dev/null<br>
> @@ -1,7 +0,0 @@<br>
> -ACLOCAL_AMFLAGS = -I ../../../aclocal<br>
> -<br>
> -# Descend into the @RTEMS_BSP_FAMILY@ directory<br>
> -SUBDIRS = @RTEMS_BSP_FAMILY@<br>
> -<br>
> -include $(top_srcdir)/../../../automake/<a href="http://subdirs.am" rel="noreferrer" target="_blank">subdirs.am</a><br>
> -include $(top_srcdir)/../../../automake/<a href="http://local.am" rel="noreferrer" target="_blank">local.am</a><br>
> diff --git a/c/src/lib/libbsp/h8300/acinclude.m4 b/c/src/lib/libbsp/h8300/acinclude.m4<br>
> deleted file mode 100644<br>
> index 296a6f7..0000000<br>
> --- a/c/src/lib/libbsp/h8300/acinclude.m4<br>
> +++ /dev/null<br>
> @@ -1,8 +0,0 @@<br>
> -# RTEMS_CHECK_BSPDIR(RTEMS_BSP_FAMILY)<br>
> -AC_DEFUN([RTEMS_CHECK_BSPDIR],<br>
> -[<br>
> - case "$1" in<br>
> - *)<br>
> - AC_MSG_ERROR([Invalid BSP]);;<br>
> - esac<br>
> -])<br>
> diff --git a/c/src/lib/libbsp/h8300/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a> b/c/src/lib/libbsp/h8300/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a><br>
> deleted file mode 100644<br>
> index e885460..0000000<br>
> --- a/c/src/lib/libbsp/h8300/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a><br>
> +++ /dev/null<br>
> @@ -1,19 +0,0 @@<br>
> -## Process this file with autoconf to produce a configure script.<br>
> -<br>
> -AC_PREREQ([2.69])<br>
> -AC_INIT([rtems-c-src-lib-libbsp-h8300],[_RTEMS_VERSION],[<a href="https://devel.rtems.org/newticket" rel="noreferrer" target="_blank">https://devel.rtems.org/newticket</a>])<br>
> -AC_CONFIG_SRCDIR([Makefile.am])<br>
> -RTEMS_TOP(../../../../..)<br>
> -<br>
> -RTEMS_CANONICAL_TARGET_CPU<br>
> -AM_INIT_AUTOMAKE([no-define foreign 1.12.2])<br>
> -AM_MAINTAINER_MODE<br>
> -<br>
> -RTEMS_ENV_RTEMSBSP<br>
> -<br>
> -RTEMS_PROJECT_ROOT<br>
> -RTEMS_CHECK_BSPDIR([$RTEMS_BSP_FAMILY])<br>
> -<br>
> -# Explicitly list all Makefiles here<br>
> -AC_CONFIG_FILES([Makefile])<br>
> -AC_OUTPUT<br>
> diff --git a/cpukit/aclocal/check-networking.m4 b/cpukit/aclocal/check-networking.m4<br>
> index 06c94c0..50982f3 100644<br>
> --- a/cpukit/aclocal/check-networking.m4<br>
> +++ b/cpukit/aclocal/check-networking.m4<br>
> @@ -9,7 +9,7 @@ AC_CACHE_CHECK([whether CPU supports networking],<br>
> [dnl<br>
> case "$host" in<br>
> # do not have address space to hold BSD TCP/IP stack<br>
> - avr*|h8300*|m32c*)<br>
> + avr*|m32c*)<br>
> rtems_cv_HAS_NETWORKING="no"<br>
> ;;<br>
> *-*-rtems*)<br>
> diff --git a/cpukit/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a> b/cpukit/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a><br>
> index 8436c91..c5bbee8 100644<br>
> --- a/cpukit/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a><br>
> +++ b/cpukit/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a><br>
> @@ -393,9 +393,6 @@ case $RTEMS_CPU in<br>
> # bfin has an issue to resolve with libdl. See ticket #2252<br>
> bfin)<br>
> HAVE_LIBDL=no ;;<br>
> - # h8300 has an issue to resolve with libdl. See ticket #2284<br>
> - h8300)<br>
> - HAVE_LIBDL=no ;;<br>
> # lm32 has an issue to resolve with libdl. See ticket #2283<br>
> lm32)<br>
> HAVE_LIBDL=no ;;<br>
> @@ -457,7 +454,6 @@ score/cpu/arm/Makefile<br>
> score/cpu/bfin/Makefile<br>
> score/cpu/avr/Makefile<br>
> score/cpu/epiphany/Makefile<br>
> -score/cpu/h8300/Makefile<br>
> score/cpu/i386/Makefile<br>
> score/cpu/lm32/Makefile<br>
> score/cpu/m68k/Makefile<br>
> diff --git a/cpukit/librpc/src/xdr/xdr_float.c b/cpukit/librpc/src/xdr/xdr_float.c<br>
> index 5d6b4ea..74d0bbc 100644<br>
> --- a/cpukit/librpc/src/xdr/xdr_float.c<br>
> +++ b/cpukit/librpc/src/xdr/xdr_float.c<br>
> @@ -62,7 +62,6 @@ static char *rcsid = "$FreeBSD: src/lib/libc/xdr/xdr_float.c,v 1.7 1999/08/28 00<br>
> defined(_AM29K) || \<br>
> defined(__arm__) || \<br>
> defined(__epiphany__) || defined(__EPIPHANY__) || \<br>
> - defined(__H8300__) || defined(__h8300__) || \<br>
> defined(__hppa__) || \<br>
> defined(__i386__) || \<br>
> defined(__lm32__) || \<br>
> diff --git a/cpukit/score/cpu/Makefile.am b/cpukit/score/cpu/Makefile.am<br>
> index 4438e3f..a973a82 100644<br>
> --- a/cpukit/score/cpu/Makefile.am<br>
> +++ b/cpukit/score/cpu/Makefile.am<br>
> @@ -5,7 +5,6 @@ DIST_SUBDIRS += arm<br>
> DIST_SUBDIRS += avr<br>
> DIST_SUBDIRS += bfin<br>
> DIST_SUBDIRS += epiphany<br>
> -DIST_SUBDIRS += h8300<br>
> DIST_SUBDIRS += i386<br>
> DIST_SUBDIRS += lm32<br>
> DIST_SUBDIRS += m32c<br>
> diff --git a/cpukit/score/cpu/h8300/Makefile.am b/cpukit/score/cpu/h8300/Makefile.am<br>
> deleted file mode 100644<br>
> index 6a80409..0000000<br>
> --- a/cpukit/score/cpu/h8300/Makefile.am<br>
> +++ /dev/null<br>
> @@ -1,19 +0,0 @@<br>
> -include $(top_srcdir)/automake/<a href="http://compile.am" rel="noreferrer" target="_blank">compile.am</a><br>
> -<br>
> -include_rtemsdir = $(includedir)/rtems<br>
> -include_rtems_HEADERS = rtems/asm.h<br>
> -<br>
> -include_rtems_scoredir = $(includedir)/rtems/score<br>
> -include_rtems_score_HEADERS = rtems/score/cpu.h<br>
> -include_rtems_score_HEADERS += rtems/score/h8300.h<br>
> -include_rtems_score_HEADERS += rtems/score/types.h<br>
> -include_rtems_score_HEADERS += rtems/score/cpuatomic.h<br>
> -<br>
> -noinst_LIBRARIES = libscorecpu.a<br>
> -libscorecpu_a_SOURCES = cpu.c cpu_asm.S<br>
> -libscorecpu_a_SOURCES += ../no_cpu/cpucounterread.c<br>
> -libscorecpu_a_SOURCES += h8300-exception-frame-print.c<br>
> -libscorecpu_a_CPPFLAGS = $(AM_CPPFLAGS)<br>
> -<br>
> -include $(srcdir)/<a href="http://preinstall.am" rel="noreferrer" target="_blank">preinstall.am</a><br>
> -include $(top_srcdir)/automake/<a href="http://local.am" rel="noreferrer" target="_blank">local.am</a><br>
> diff --git a/cpukit/score/cpu/h8300/README b/cpukit/score/cpu/h8300/README<br>
> deleted file mode 100644<br>
> index 1fed837..0000000<br>
> --- a/cpukit/score/cpu/h8300/README<br>
> +++ /dev/null<br>
> @@ -1,27 +0,0 @@<br>
> -<br>
> -This port was done by Philip Quaife <<a href="mailto:philip@qs.co.nz">philip@qs.co.nz</a>> of Q Solutions<br>
> -using RTEMS 3.5.1 under DOS and Hiview. Philip used an H8300H<br>
> -to develop and test this port.<br>
> -<br>
> -It was updated to 4.5 and merged into the main development trunk<br>
> -by Joel Sherrill <joel@OARcorp.com>. As part of the merger, the<br>
> -port was made to conditionally compile for the H8, H8300H, and H8300S<br>
> -series.<br>
> -<br>
> -The status of each CPU subfamily is as follows.<br>
> -<br>
> -H8 - Although RTEMS compiles with for these CPUs, it does not<br>
> - truly support them. All code that will not work on these<br>
> - CPUs is conditionally disabled. These CPUs have a 16-bit<br>
> - address space. Thus although a port is technically<br>
> - feasible, some work will to be performed on RTEMS to<br>
> - further minimize its footprint and address pointer<br>
> - manipulation issues.<br>
> -<br>
> -H8H - Port was developed on this class of H8 so there should be<br>
> - no problems.<br>
> -<br>
> -H8S - Port should work on this class of H8 but it is untested.<br>
> -<br>
> ---joel<br>
> -28 June 2000<br>
> diff --git a/cpukit/score/cpu/h8300/cpu.c b/cpukit/score/cpu/h8300/cpu.c<br>
> deleted file mode 100644<br>
> index 36c41a2..0000000<br>
> --- a/cpukit/score/cpu/h8300/cpu.c<br>
> +++ /dev/null<br>
> @@ -1,134 +0,0 @@<br>
> -/**<br>
> - * @file<br>
> - *<br>
> - * @brief H8300 CPU Dependent Source<br>
> - */<br>
> -<br>
> -/*<br>
> - * COPYRIGHT (c) 1989-1999.<br>
> - * On-Line Applications Research Corporation (OAR).<br>
> - *<br>
> - * The license and distribution terms for this file may be<br>
> - * found in the file LICENSE in this distribution or at<br>
> - * <a href="http://www.rtems.org/license/LICENSE" rel="noreferrer" target="_blank">http://www.rtems.org/license/LICENSE</a>.<br>
> - */<br>
> -<br>
> -#ifdef HAVE_CONFIG_H<br>
> -#include "config.h"<br>
> -#endif<br>
> -<br>
> -#include <rtems/system.h><br>
> -#include <rtems/score/isr.h><br>
> -#include <rtems/score/wkspace.h><br>
> -<br>
> -/* _CPU_Initialize<br>
> - *<br>
> - * This routine performs processor dependent initialization.<br>
> - *<br>
> - * INPUT PARAMETERS: NONE<br>
> - */<br>
> -<br>
> -<br>
> -void _CPU_Initialize(void)<br>
> -{<br>
> - /*<br>
> - * If there is not an easy way to initialize the FP context<br>
> - * during Context_Initialize, then it is usually easier to<br>
> - * save an "uninitialized" FP context here and copy it to<br>
> - * the task's during Context_Initialize.<br>
> - */<br>
> -<br>
> - /* FP context initialization support goes here */<br>
> -}<br>
> -<br>
> -uint32_t _CPU_ISR_Get_level( void )<br>
> -{<br>
> - unsigned int _ccr;<br>
> -<br>
> -#if defined(__H8300__)<br>
> -#warning "How do we get ccr on base CPU models"<br>
> -#else<br>
> - __asm__ volatile ( "stc ccr, %0" : "=m" (_ccr) : );<br>
> -#endif<br>
> -<br>
> - if ( _ccr & 0x80 )<br>
> - return 1;<br>
> - return 0;<br>
> -}<br>
> -<br>
> -/*<br>
> - * _CPU_ISR_install_raw_handler<br>
> - */<br>
> -<br>
> -void _CPU_ISR_install_raw_handler(<br>
> - uint32_t vector,<br>
> - proc_ptr new_handler,<br>
> - proc_ptr *old_handler<br>
> -)<br>
> -{<br>
> - /*<br>
> - * This is where we install the interrupt handler into the "raw" interrupt<br>
> - * table used by the CPU to dispatch interrupt handlers.<br>
> - * Use Debug level IRQ Handlers<br>
> - */<br>
> - H8BD_Install_IRQ(vector,new_handler,old_handler);<br>
> -}<br>
> -<br>
> -void _CPU_ISR_install_vector(<br>
> - uint32_t vector,<br>
> - proc_ptr new_handler,<br>
> - proc_ptr *old_handler<br>
> -)<br>
> -{<br>
> - *old_handler = _ISR_Vector_table[ vector ];<br>
> -<br>
> - /*<br>
> - * If the interrupt vector table is a table of pointer to isr entry<br>
> - * points, then we need to install the appropriate RTEMS interrupt<br>
> - * handler for this vector number.<br>
> - */<br>
> -<br>
> - _CPU_ISR_install_raw_handler( vector, new_handler, old_handler );<br>
> -<br>
> - /*<br>
> - * We put the actual user ISR address in '_ISR_vector_table'. This will<br>
> - * be used by the _ISR_Handler so the user gets control.<br>
> - */<br>
> -<br>
> - _ISR_Vector_table[ vector ] = new_handler;<br>
> -}<br>
> -<br>
> -/*<br>
> - * _CPU_Install_interrupt_stack<br>
> - */<br>
> -<br>
> -void _CPU_Install_interrupt_stack( void )<br>
> -{<br>
> -}<br>
> -<br>
> -/*<br>
> - * _CPU_Thread_Idle_body<br>
> - *<br>
> - * NOTES:<br>
> - *<br>
> - * 1. This is the same as the regular CPU independent algorithm.<br>
> - *<br>
> - * 2. If you implement this using a "halt", "idle", or "shutdown"<br>
> - * instruction, then don't forget to put it in an infinite loop.<br>
> - *<br>
> - * 3. Be warned. Some processors with onboard DMA have been known<br>
> - * to stop the DMA if the CPU were put in IDLE mode. This might<br>
> - * also be a problem with other on-chip peripherals. So use this<br>
> - * hook with caution.<br>
> - */<br>
> -<br>
> -#if 0<br>
> -void *_CPU_Thread_Idle_body( uintptr_t ignored )<br>
> -{<br>
> -<br>
> - for( ; ; )<br>
> - IDLE_Monitor();<br>
> - /* __asm__ (" sleep \n"); */<br>
> - /* insert your "halt" instruction here */ ;<br>
> -}<br>
> -#endif<br>
> diff --git a/cpukit/score/cpu/h8300/cpu_asm.S b/cpukit/score/cpu/h8300/cpu_asm.S<br>
> deleted file mode 100644<br>
> index e0fdf0a..0000000<br>
> --- a/cpukit/score/cpu/h8300/cpu_asm.S<br>
> +++ /dev/null<br>
> @@ -1,221 +0,0 @@<br>
> -/*<br>
> - * Hitachi H8 Score CPU functions<br>
> - * Copyright Comnet Technologies Ltd 1999<br>
> - *<br>
> - * Based on example code and other ports with this copyright:<br>
> - *<br>
> - * COPYRIGHT (c) 1989-1999.<br>
> - * On-Line Applications Research Corporation (OAR).<br>
> - *<br>
> - * The license and distribution terms for this file may be<br>
> - * found in the file LICENSE in this distribution or at<br>
> - * <a href="http://www.rtems.org/license/LICENSE" rel="noreferrer" target="_blank">http://www.rtems.org/license/LICENSE</a>.<br>
> - */<br>
> -<br>
> -#ifdef HAVE_CONFIG_H<br>
> -#include "config.h"<br>
> -#endif<br>
> -<br>
> -#include <rtems/asm.h><br>
> -#include <rtems/score/percpu.h><br>
> -<br>
> -;.equ RUNCONTEXT_ARG, er0<br>
> -;.equ HEIRCONTEXT_ARG, er1<br>
> -<br>
> -/*<br>
> - * Make sure we tell the assembler what type of CPU model we are<br>
> - * being compiled for.<br>
> - */<br>
> -<br>
> -#if defined(__H8300H__)<br>
> - .h8300h<br>
> -#endif<br>
> -#if defined(__H8300S__)<br>
> - .h8300s<br>
> -#endif<br>
> -#if defined(__H8300SX__)<br>
> - .h8300sx<br>
> -#endif<br>
> - .text<br>
> -<br>
> - .text<br>
> -/*<br>
> - GCC Compiled with optimisations and Wimplicit decs to ensure<br>
> - that stack from doesn't change<br>
> -<br>
> - Supposedly R2 and R3 do not need to be saved but who knows<br>
> -<br>
> - Arg1 = er0 (not on stack)<br>
> - Arg2 = er1 (not on stack)<br>
> -*/<br>
> -<br>
> - .align 2<br>
> -<br>
> - .global SYM(_CPU_Context_switch)<br>
> -<br>
> -SYM(_CPU_Context_switch):<br>
> - /* Save Context */<br>
> -#if defined(__H8300H__) || defined(__H8300S__) || defined(__H8300SX__)<br>
> - stc.w ccr,@(0:16,er0)<br>
> - mov.l er7,@(2:16,er0)<br>
> - mov.l er6,@(6:16,er0)<br>
> - mov.l er5,@(10:16,er0)<br>
> - mov.l er4,@(14:16,er0)<br>
> - mov.l er3,@(18:16,er0)<br>
> - mov.l er2,@(22:16,er0)<br>
> -<br>
> - /* Install New context */<br>
> -<br>
> -restore:<br>
> - mov.l @(22:16,er1),er2<br>
> - mov.l @(18:16,er1),er3<br>
> - mov.l @(14:16,er1),er4<br>
> - mov.l @(10:16,er1),er5<br>
> - mov.l @(6:16,er1),er6<br>
> - mov.l @(2:16,er1),er7<br>
> - ldc.w @(0:16,er1),ccr<br>
> -#endif<br>
> -<br>
> - rts<br>
> -<br>
> - .align 2<br>
> -<br>
> - .global SYM(_CPU_Context_restore)<br>
> -<br>
> -SYM(_CPU_Context_restore):<br>
> -<br>
> -#if defined(__H8300H__) || defined(__H8300S__) || defined(__H8300SX__)<br>
> - mov.l er0,er1<br>
> - jmp @restore:24<br>
> -#endif<br>
> -<br>
> -<br>
> -<br>
> -/*<br>
> - VHandler for Vectored Interrupts<br>
> -<br>
> - All IRQ's are vectored to routine _ISR_#vector_number<br>
> - This routine stacks er0 and loads er0 with vector number<br>
> - before transferring to here<br>
> -<br>
> -*/<br>
> - .align 2<br>
> - .global SYM(_ISR_Handler)<br>
> - .extern SYM(_Vector_table)<br>
> -<br>
> -<br>
> -SYM(_ISR_Handler):<br>
> -#if defined(__H8300H__) || defined(__H8300S__) || defined(__H8300SX__)<br>
> - mov.l er1,@-er7<br>
> - mov.l er2,@-er7<br>
> - mov.l er3,@-er7<br>
> - mov.l er4,@-er7<br>
> - mov.l er5,@-er7<br>
> - mov.l er6,@-er7<br>
> -<br>
> -/* Set IRQ Stack */<br>
> - orc #0xc0,ccr<br>
> - mov.l er7,er6 ; save stack pointer<br>
> - mov.l @ISR_NEST_LEVEL,er1<br>
> - bne nested<br>
> - mov.l @INTERRUPT_STACK_HIGH,er7<br>
> -<br>
> -nested:<br>
> - mov.l er6,@-er7 ; save sp so pop regardless of nest level<br>
> -<br>
> -;; Inc system counters<br>
> - mov.l @ISR_NEST_LEVEL,er1<br>
> - inc.l #1,er1<br>
> - mov.l er1,@ISR_NEST_LEVEL<br>
> - mov.l @THREAD_DISPATCH_DISABLE_LEVEL,er1<br>
> - inc.l #1,er1<br>
> - mov.l er1,@THREAD_DISPATCH_DISABLE_LEVEL<br>
> -<br>
> -/* Vector to ISR */<br>
> -<br>
> - mov er0,er2 ; copy vector<br>
> - shll.l er2<br>
> - shll.l er2 ; vector = vector * 4 (sizeof(int))<br>
> - mov.l @(SYM(_ISR_Vector_table), er2),er1<br>
> - jsr @er1 ; er0 = arg1 =vector<br>
> -<br>
> - orc #0xc0,ccr<br>
> - mov.l @ISR_NEST_LEVEL,er1<br>
> - dec.l #1,er1<br>
> - mov.l er1,@ISR_NEST_LEVEL<br>
> - mov.l @THREAD_DISPATCH_DISABLE_LEVEL,er1<br>
> - dec.l #1,er1<br>
> - mov.l er1,@THREAD_DISPATCH_DISABLE_LEVEL<br>
> - bne exit<br>
> -<br>
> - mov.l @DISPATCH_NEEDED,er1<br>
> - beq exit ; If no then exit<br>
> -<br>
> - /* Context switch here through ISR_Dispatch */<br>
> -bframe:<br>
> - orc #0xc0,ccr<br>
> -/* Pop Stack */<br>
> - mov @er7+,er6<br>
> - mov er6,er7<br>
> -<br>
> - /* Set up IRQ stack frame and dispatch to _ISR_Dispatch */<br>
> -<br>
> - mov.l #0xc0000000,er2 /* Disable IRQ */<br>
> - or.l #SYM(_ISR_Dispatch),er2<br>
> - mov.l er2,@-er7<br>
> - rte<br>
> -<br>
> -/* Inner IRQ Return, pop flags and return */<br>
> -exit:<br>
> -/* Pop Stack */<br>
> - orc #0x80,ccr<br>
> - mov @er7+,er6<br>
> - mov er6,er7<br>
> - mov @er7+,er6<br>
> - mov @er7+,er5<br>
> - mov @er7+,er4<br>
> - mov @er7+,er3<br>
> - mov @er7+,er2<br>
> - mov @er7+,er1<br>
> - mov @er7+,er0<br>
> -#endif<br>
> - rte<br>
> -<br>
> -/*<br>
> - Called from ISR_Handler as a way of ending IRQ<br>
> - but allowing dispatch to another task.<br>
> - Must use RTE as CCR is still on stack but IRQ has been serviced.<br>
> - CCR and PC occupy same word so rte can be used.<br>
> - now using task stack<br>
> -*/<br>
> -<br>
> - .align 2<br>
> - .global SYM(_ISR_Dispatch)<br>
> -<br>
> -SYM(_ISR_Dispatch):<br>
> -<br>
> -#if defined(__H8300H__) || defined(__H8300S__) || defined(__H8300SX__)<br>
> - jsr @SYM(_Thread_Dispatch)<br>
> - mov @er7+,er6<br>
> - mov @er7+,er5<br>
> - mov @er7+,er4<br>
> - mov @er7+,er3<br>
> - mov @er7+,er2<br>
> - mov @er7+,er1<br>
> - mov @er7+,er0<br>
> -#endif<br>
> - rte<br>
> -<br>
> -<br>
> - .align 2<br>
> - .global SYM(_CPU_Context_save_fp)<br>
> -<br>
> -SYM(_CPU_Context_save_fp):<br>
> - rts<br>
> -<br>
> -<br>
> - .align 2<br>
> - .global SYM(_CPU_Context_restore_fp)<br>
> -<br>
> -SYM(_CPU_Context_restore_fp):<br>
> - rts<br>
> diff --git a/cpukit/score/cpu/h8300/h8300-exception-frame-print.c b/cpukit/score/cpu/h8300/h8300-exception-frame-print.c<br>
> deleted file mode 100644<br>
> index 71e7e1c..0000000<br>
> --- a/cpukit/score/cpu/h8300/h8300-exception-frame-print.c<br>
> +++ /dev/null<br>
> @@ -1,24 +0,0 @@<br>
> -/*<br>
> - * Copyright (c) 2012 embedded brains GmbH. All rights reserved.<br>
> - *<br>
> - * embedded brains GmbH<br>
> - * Obere Lagerstr. 30<br>
> - * 82178 Puchheim<br>
> - * Germany<br>
> - * <<a href="mailto:rtems@embedded-brains.de">rtems@embedded-brains.de</a>><br>
> - *<br>
> - * The license and distribution terms for this file may be<br>
> - * found in the file LICENSE in this distribution or at<br>
> - * <a href="http://www.rtems.org/license/LICENSE" rel="noreferrer" target="_blank">http://www.rtems.org/license/LICENSE</a>.<br>
> - */<br>
> -<br>
> -#ifdef HAVE_CONFIG_H<br>
> - #include "config.h"<br>
> -#endif<br>
> -<br>
> -#include <rtems/score/cpu.h><br>
> -<br>
> -void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )<br>
> -{<br>
> - /* TODO */<br>
> -}<br>
> diff --git a/cpukit/score/cpu/h8300/<a href="http://preinstall.am" rel="noreferrer" target="_blank">preinstall.am</a> b/cpukit/score/cpu/h8300/<a href="http://preinstall.am" rel="noreferrer" target="_blank">preinstall.am</a><br>
> deleted file mode 100644<br>
> index f3c1681..0000000<br>
> --- a/cpukit/score/cpu/h8300/<a href="http://preinstall.am" rel="noreferrer" target="_blank">preinstall.am</a><br>
> +++ /dev/null<br>
> @@ -1,45 +0,0 @@<br>
> -## Automatically generated by ampolish3 - Do not edit<br>
> -<br>
> -if AMPOLISH3<br>
> -$(srcdir)/<a href="http://preinstall.am" rel="noreferrer" target="_blank">preinstall.am</a>: Makefile.am<br>
> - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/<a href="http://preinstall.am" rel="noreferrer" target="_blank">preinstall.am</a><br>
> -endif<br>
> -<br>
> -PREINSTALL_DIRS =<br>
> -DISTCLEANFILES = $(PREINSTALL_DIRS)<br>
> -<br>
> -all-am: $(PREINSTALL_FILES)<br>
> -<br>
> -PREINSTALL_FILES =<br>
> -CLEANFILES = $(PREINSTALL_FILES)<br>
> -<br>
> -$(PROJECT_INCLUDE)/rtems/$(dirstamp):<br>
> - @$(MKDIR_P) $(PROJECT_INCLUDE)/rtems<br>
> - @: > $(PROJECT_INCLUDE)/rtems/$(dirstamp)<br>
> -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/rtems/$(dirstamp)<br>
> -<br>
> -$(PROJECT_INCLUDE)/rtems/asm.h: rtems/asm.h $(PROJECT_INCLUDE)/rtems/$(dirstamp)<br>
> - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/asm.h<br>
> -PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/asm.h<br>
> -<br>
> -$(PROJECT_INCLUDE)/rtems/score/$(dirstamp):<br>
> - @$(MKDIR_P) $(PROJECT_INCLUDE)/rtems/score<br>
> - @: > $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)<br>
> -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)<br>
> -<br>
> -$(PROJECT_INCLUDE)/rtems/score/cpu.h: rtems/score/cpu.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)<br>
> - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/cpu.h<br>
> -PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/cpu.h<br>
> -<br>
> -$(PROJECT_INCLUDE)/rtems/score/h8300.h: rtems/score/h8300.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)<br>
> - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/h8300.h<br>
> -PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/h8300.h<br>
> -<br>
> -$(PROJECT_INCLUDE)/rtems/score/types.h: rtems/score/types.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)<br>
> - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/types.h<br>
> -PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/types.h<br>
> -<br>
> -$(PROJECT_INCLUDE)/rtems/score/cpuatomic.h: rtems/score/cpuatomic.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)<br>
> - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/cpuatomic.h<br>
> -PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/cpuatomic.h<br>
> -<br>
> diff --git a/cpukit/score/cpu/h8300/rtems/asm.h b/cpukit/score/cpu/h8300/rtems/asm.h<br>
> deleted file mode 100644<br>
> index 6c1a643..0000000<br>
> --- a/cpukit/score/cpu/h8300/rtems/asm.h<br>
> +++ /dev/null<br>
> @@ -1,118 +0,0 @@<br>
> -/**<br>
> - * @file<br>
> - *<br>
> - * @brief Address the Problems Caused by Incompatible Flavor of<br>
> - * Assemblers and Toolsets<br>
> - *<br>
> - * This include file attempts to address the problems<br>
> - * caused by incompatible flavors of assemblers and<br>
> - * toolsets. It primarily addresses variations in the<br>
> - * use of leading underscores on symbols and the requirement<br>
> - * that register names be preceded by a %.<br>
> - *<br>
> - * NOTE: The spacing in the use of these macros<br>
> - * is critical to them working as advertised.<br>
> - */<br>
> -<br>
> -/*<br>
> - * COPYRIGHT:<br>
> - *<br>
> - * This file is based on similar code found in newlib available<br>
> - * from <a href="http://ftp.cygnus.com" rel="noreferrer" target="_blank">ftp.cygnus.com</a>. The file which was used had no copyright<br>
> - * notice. This file is freely distributable as long as the source<br>
> - * of the file is noted. This file is:<br>
> - *<br>
> - *<br>
> - * COPYRIGHT (c) 1989-1999.<br>
> - * On-Line Applications Research Corporation (OAR).<br>
> - *<br>
> - * The license and distribution terms for this file may be<br>
> - * found in the file LICENSE in this distribution or at<br>
> - * <a href="http://www.rtems.org/license/LICENSE" rel="noreferrer" target="_blank">http://www.rtems.org/license/LICENSE</a>.<br>
> - */<br>
> -<br>
> -#ifndef _RTEMS_ASM_H<br>
> -#define _RTEMS_ASM_H<br>
> -<br>
> -/*<br>
> - * Indicate we are in an assembly file and get the basic CPU definitions.<br>
> - */<br>
> -<br>
> -#include <rtems/score/h8300.h><br>
> -<br>
> -/*<br>
> - * Recent versions of GNU cpp define variables which indicate the<br>
> - * need for underscores and percents. If not using GNU cpp or<br>
> - * the version does not support this, then you will obviously<br>
> - * have to define these as appropriate.<br>
> - */<br>
> -<br>
> -#ifndef __USER_LABEL_PREFIX__<br>
> -#define __USER_LABEL_PREFIX__ _<br>
> -#endif<br>
> -<br>
> -#ifndef __REGISTER_PREFIX__<br>
> -#define __REGISTER_PREFIX__<br>
> -#endif<br>
> -<br>
> -#include <rtems/concat.h><br>
> -<br>
> -/* Use the right prefix for global labels. */<br>
> -<br>
> -#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)<br>
> -<br>
> -/* Use the right prefix for registers. */<br>
> -<br>
> -#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)<br>
> -<br>
> -/*<br>
> - * define macros for all of the registers on this CPU<br>
> - *<br>
> - * EXAMPLE: #define d0 REG (d0)<br>
> - */<br>
> -#define r0 REG(r0)<br>
> -#define r1 REG(r1)<br>
> -#define r2 REG(r2)<br>
> -#define r3 REG(r3)<br>
> -#define r4 REG(r4)<br>
> -#define r5 REG(r5)<br>
> -#define r6 REG(r6)<br>
> -#define r7 REG(r7)<br>
> -<br>
> -#define er0 REG(er0)<br>
> -#define er1 REG(er1)<br>
> -#define er2 REG(er2)<br>
> -#define er3 REG(er3)<br>
> -#define er4 REG(er4)<br>
> -#define er5 REG(er5)<br>
> -#define er6 REG(er6)<br>
> -#define er7 REG(er7)<br>
> -<br>
> -#define sp REG(sp)<br>
> -<br>
> -/*<br>
> - * Define macros to handle section beginning and ends.<br>
> - */<br>
> -<br>
> -<br>
> -#define BEGIN_CODE_DCL .text<br>
> -#define END_CODE_DCL<br>
> -#define BEGIN_DATA_DCL .data<br>
> -#define END_DATA_DCL<br>
> -#define BEGIN_CODE __asm__ ( ".text<br>
> -#define END_CODE ");<br>
> -#define BEGIN_DATA<br>
> -#define END_DATA<br>
> -#define BEGIN_BSS<br>
> -#define END_BSS<br>
> -#define END<br>
> -<br>
> -/*<br>
> - * Following must be tailor for a particular flavor of the C compiler.<br>
> - * They may need to put underscores in front of the symbols.<br>
> - */<br>
> -<br>
> -#define PUBLIC(sym) .globl SYM (sym)<br>
> -#define EXTERN(sym) .globl SYM (sym)<br>
> -<br>
> -#endif<br>
> diff --git a/cpukit/score/cpu/h8300/rtems/score/cpu.h b/cpukit/score/cpu/h8300/rtems/score/cpu.h<br>
> deleted file mode 100644<br>
> index 8b34bb4..0000000<br>
> --- a/cpukit/score/cpu/h8300/rtems/score/cpu.h<br>
> +++ /dev/null<br>
> @@ -1,1176 +0,0 @@<br>
> -/**<br>
> - * @file<br>
> - *<br>
> - * @brief Hitachi H8300 CPU Department Source<br>
> - *<br>
> - * This include file contains information pertaining to the H8300<br>
> - * processor.<br>
> - */<br>
> -<br>
> -/*<br>
> - * COPYRIGHT (c) 1989-2006.<br>
> - * On-Line Applications Research Corporation (OAR).<br>
> - *<br>
> - * The license and distribution terms for this file may be<br>
> - * found in the file LICENSE in this distribution or at<br>
> - * <a href="http://www.rtems.org/license/LICENSE" rel="noreferrer" target="_blank">http://www.rtems.org/license/LICENSE</a>.<br>
> - */<br>
> -<br>
> -#ifndef _RTEMS_SCORE_CPU_H<br>
> -#define _RTEMS_SCORE_CPU_H<br>
> -<br>
> -#ifdef __cplusplus<br>
> -extern "C" {<br>
> -#endif<br>
> -<br>
> -#include <rtems/score/types.h><br>
> -#include <rtems/score/h8300.h><br>
> -#ifndef ASM<br>
> - #include <rtems/bspIo.h><br>
> -#endif<br>
> -<br>
> -/* conditional compilation parameters */<br>
> -<br>
> -/*<br>
> - * Should the calls to _Thread_Enable_dispatch be inlined?<br>
> - *<br>
> - * If TRUE, then they are inlined.<br>
> - * If FALSE, then a subroutine call is made.<br>
> - *<br>
> - * Basically this is an example of the classic trade-off of size<br>
> - * versus speed. Inlining the call (TRUE) typically increases the<br>
> - * size of RTEMS while speeding up the enabling of dispatching.<br>
> - * [NOTE: In general, the _Thread_Dispatch_disable_level will<br>
> - * only be 0 or 1 unless you are in an interrupt handler and that<br>
> - * interrupt handler invokes the executive.] When not inlined<br>
> - * something calls _Thread_Enable_dispatch which in turns calls<br>
> - * _Thread_Dispatch. If the enable dispatch is inlined, then<br>
> - * one subroutine call is avoided entirely.]<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_INLINE_ENABLE_DISPATCH FALSE<br>
> -<br>
> -/*<br>
> - * Should this target use 16 or 32 bit object Ids?<br>
> - *<br>
> - */<br>
> -#define RTEMS_USE_16_BIT_OBJECT<br>
> -<br>
> -/*<br>
> - * Does RTEMS manage a dedicated interrupt stack in software?<br>
> - *<br>
> - * If TRUE, then a stack is allocated in _ISR_Handler_initialization.<br>
> - * If FALSE, nothing is done.<br>
> - *<br>
> - * If the CPU supports a dedicated interrupt stack in hardware,<br>
> - * then it is generally the responsibility of the BSP to allocate it<br>
> - * and set it up.<br>
> - *<br>
> - * If the CPU does not support a dedicated interrupt stack, then<br>
> - * the porter has two options: (1) execute interrupts on the<br>
> - * stack of the interrupted task, and (2) have RTEMS manage a dedicated<br>
> - * interrupt stack.<br>
> - *<br>
> - * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.<br>
> - *<br>
> - * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and<br>
> - * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is<br>
> - * possible that both are FALSE for a particular CPU. Although it<br>
> - * is unclear what that would imply about the interrupt processing<br>
> - * procedure on that CPU.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE<br>
> -<br>
> -/*<br>
> - * Does the CPU follow the simple vectored interrupt model?<br>
> - *<br>
> - * If TRUE, then RTEMS allocates the vector table it internally manages.<br>
> - * If FALSE, then the BSP is assumed to allocate and manage the vector<br>
> - * table<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX document implementation including references if appropriate<br>
> - */<br>
> -#define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE<br>
> -<br>
> -/*<br>
> - * Does this CPU have hardware support for a dedicated interrupt stack?<br>
> - *<br>
> - * If TRUE, then it must be installed during initialization.<br>
> - * If FALSE, then no installation is performed.<br>
> - *<br>
> - * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.<br>
> - *<br>
> - * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and<br>
> - * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is<br>
> - * possible that both are FALSE for a particular CPU. Although it<br>
> - * is unclear what that would imply about the interrupt processing<br>
> - * procedure on that CPU.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE<br>
> -<br>
> -/*<br>
> - * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager?<br>
> - *<br>
> - * If TRUE, then the memory is allocated during initialization.<br>
> - * If FALSE, then the memory is allocated during initialization.<br>
> - *<br>
> - * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_ALLOCATE_INTERRUPT_STACK TRUE<br>
> -<br>
> -/*<br>
> - * Does the CPU have hardware floating point?<br>
> - *<br>
> - * If TRUE, then the RTEMS_FLOATING_POINT task attribute is supported.<br>
> - * If FALSE, then the RTEMS_FLOATING_POINT task attribute is ignored.<br>
> - *<br>
> - * If there is a FP coprocessor such as the i387 or mc68881, then<br>
> - * the answer is TRUE.<br>
> - *<br>
> - * The macro name "H8300_HAS_FPU" should be made CPU specific.<br>
> - * It indicates whether or not this CPU model has FP support. For<br>
> - * example, it would be possible to have an i386_nofp CPU model<br>
> - * which set this to false to indicate that you have an i386 without<br>
> - * an i387 and wish to leave floating point support out of RTEMS.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_HARDWARE_FP FALSE<br>
> -<br>
> -/*<br>
> - * Are all tasks RTEMS_FLOATING_POINT tasks implicitly?<br>
> - *<br>
> - * If TRUE, then the RTEMS_FLOATING_POINT task attribute is assumed.<br>
> - * If FALSE, then the RTEMS_FLOATING_POINT task attribute is followed.<br>
> - *<br>
> - * If CPU_HARDWARE_FP is FALSE, then this should be FALSE as well.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_ALL_TASKS_ARE_FP FALSE<br>
> -<br>
> -/*<br>
> - * Should the IDLE task have a floating point context?<br>
> - *<br>
> - * If TRUE, then the IDLE task is created as a RTEMS_FLOATING_POINT task<br>
> - * and it has a floating point context which is switched in and out.<br>
> - * If FALSE, then the IDLE task does not have a floating point context.<br>
> - *<br>
> - * Setting this to TRUE negatively impacts the time required to preempt<br>
> - * the IDLE task from an interrupt because the floating point context<br>
> - * must be saved as part of the preemption.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_IDLE_TASK_IS_FP FALSE<br>
> -<br>
> -/*<br>
> - * Should the saving of the floating point registers be deferred<br>
> - * until a context switch is made to another different floating point<br>
> - * task?<br>
> - *<br>
> - * If TRUE, then the floating point context will not be stored until<br>
> - * necessary. It will remain in the floating point registers and not<br>
> - * disturned until another floating point task is switched to.<br>
> - *<br>
> - * If FALSE, then the floating point context is saved when a floating<br>
> - * point task is switched out and restored when the next floating point<br>
> - * task is restored. The state of the floating point registers between<br>
> - * those two operations is not specified.<br>
> - *<br>
> - * If the floating point context does NOT have to be saved as part of<br>
> - * interrupt dispatching, then it should be safe to set this to TRUE.<br>
> - *<br>
> - * Setting this flag to TRUE results in using a different algorithm<br>
> - * for deciding when to save and restore the floating point context.<br>
> - * The deferred FP switch algorithm minimizes the number of times<br>
> - * the FP context is saved and restored. The FP context is not saved<br>
> - * until a context switch is made to another, different FP task.<br>
> - * Thus in a system with only one FP task, the FP context will never<br>
> - * be saved or restored.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_USE_DEFERRED_FP_SWITCH TRUE<br>
> -<br>
> -/*<br>
> - * Does this port provide a CPU dependent IDLE task implementation?<br>
> - *<br>
> - * If TRUE, then the routine _CPU_Internal_threads_Idle_thread_body<br>
> - * must be provided and is the default IDLE thread body instead of<br>
> - * _Internal_threads_Idle_thread_body.<br>
> - *<br>
> - * If FALSE, then use the generic IDLE thread body if the BSP does<br>
> - * not provide one.<br>
> - *<br>
> - * This is intended to allow for supporting processors which have<br>
> - * a low power or idle mode. When the IDLE thread is executed, then<br>
> - * the CPU can be powered down.<br>
> - *<br>
> - * The order of precedence for selecting the IDLE thread body is:<br>
> - *<br>
> - * 1. BSP provided<br>
> - * 2. CPU dependent (if provided)<br>
> - * 3. generic (if no BSP and no CPU dependent)<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - * The port initially called a BSP dependent routine called<br>
> - * IDLE_Monitor. The idle task body can be overridden by<br>
> - * the BSP in newer versions of RTEMS.<br>
> - */<br>
> -<br>
> -#define CPU_PROVIDES_IDLE_THREAD_BODY FALSE<br>
> -<br>
> -/*<br>
> - * Does the stack grow up (toward higher addresses) or down<br>
> - * (toward lower addresses)?<br>
> - *<br>
> - * If TRUE, then the grows upward.<br>
> - * If FALSE, then the grows toward smaller addresses.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_STACK_GROWS_UP FALSE<br>
> -<br>
> -/*<br>
> - * The following is the variable attribute used to force alignment<br>
> - * of critical RTEMS structures. On some processors it may make<br>
> - * sense to have these aligned on tighter boundaries than<br>
> - * the minimum requirements of the compiler in order to have as<br>
> - * much of the critical data area as possible in a cache line.<br>
> - *<br>
> - * The placement of this macro in the declaration of the variables<br>
> - * is based on the syntactically requirements of the GNU C<br>
> - * "__attribute__" extension. For example with GNU C, use<br>
> - * the following to force a structures to a 32 byte boundary.<br>
> - *<br>
> - * __attribute__ ((aligned (32)))<br>
> - *<br>
> - * NOTE: Currently only the Priority Bit Map table uses this feature.<br>
> - * To benefit from using this, the data must be heavily<br>
> - * used so it will stay in the cache and used frequently enough<br>
> - * in the executive to justify turning this on.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_STRUCTURE_ALIGNMENT<br>
> -<br>
> -#define CPU_TIMESTAMP_USE_STRUCT_TIMESPEC TRUE<br>
> -<br>
> -/*<br>
> - * Define what is required to specify how the network to host conversion<br>
> - * routines are handled.<br>
> - */<br>
> -<br>
> -#define CPU_BIG_ENDIAN TRUE<br>
> -#define CPU_LITTLE_ENDIAN FALSE<br>
> -<br>
> -/*<br>
> - * The following defines the number of bits actually used in the<br>
> - * interrupt field of the task mode. How those bits map to the<br>
> - * CPU interrupt levels is defined by the routine _CPU_ISR_Set_level().<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_MODES_INTERRUPT_MASK 0x00000001<br>
> -<br>
> -#define CPU_PER_CPU_CONTROL_SIZE 0<br>
> -<br>
> -/*<br>
> - * Processor defined structures required for cpukit/score.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -/* may need to put some structures here. */<br>
> -<br>
> -/*<br>
> - * Contexts<br>
> - *<br>
> - * Generally there are 2 types of context to save.<br>
> - * 1. Interrupt registers to save<br>
> - * 2. Task level registers to save<br>
> - *<br>
> - * This means we have the following 3 context items:<br>
> - * 1. task level context stuff:: Context_Control<br>
> - * 2. floating point task stuff:: Context_Control_fp<br>
> - * 3. special interrupt level context :: Context_Control_interrupt<br>
> - *<br>
> - * On some processors, it is cost-effective to save only the callee<br>
> - * preserved registers during a task context switch. This means<br>
> - * that the ISR code needs to save those registers which do not<br>
> - * persist across function calls. It is not mandatory to make this<br>
> - * distinctions between the caller/callee saves registers for the<br>
> - * purpose of minimizing context saved during task switch and on interrupts.<br>
> - * If the cost of saving extra registers is minimal, simplicity is the<br>
> - * choice. Save the same context on interrupt entry as for tasks in<br>
> - * this case.<br>
> - *<br>
> - * Additionally, if gdb is to be made aware of RTEMS tasks for this CPU, then<br>
> - * care should be used in designing the context area.<br>
> - *<br>
> - * On some CPUs with hardware floating point support, the Context_Control_fp<br>
> - * structure will not be used or it simply consist of an array of a<br>
> - * fixed number of bytes. This is done when the floating point context<br>
> - * is dumped by a "FP save context" type instruction and the format<br>
> - * is not really defined by the CPU. In this case, there is no need<br>
> - * to figure out the exact format -- only the size. Of course, although<br>
> - * this is enough information for RTEMS, it is probably not enough for<br>
> - * a debugger such as gdb. But that is another problem.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#ifndef ASM<br>
> -<br>
> -typedef struct {<br>
> - /* There is no CPU specific per-CPU state */<br>
> -} CPU_Per_CPU_control;<br>
> -<br>
> -#define nogap __attribute__ ((packed))<br>
> -<br>
> -typedef struct {<br>
> - uint16_t ccr nogap;<br>
> - void *er7 nogap;<br>
> - void *er6 nogap;<br>
> - uint32_t er5 nogap;<br>
> - uint32_t er4 nogap;<br>
> - uint32_t er3 nogap;<br>
> - uint32_t er2 nogap;<br>
> - uint32_t er1 nogap;<br>
> - uint32_t er0 nogap;<br>
> - uint32_t xxx nogap;<br>
> -} Context_Control;<br>
> -<br>
> -#define _CPU_Context_Get_SP( _context ) \<br>
> - (_context)->er7<br>
> -<br>
> -typedef struct {<br>
> - double some_float_register[2];<br>
> -} Context_Control_fp;<br>
> -<br>
> -typedef struct {<br>
> - uint32_t special_interrupt_register;<br>
> -} CPU_Interrupt_frame;<br>
> -<br>
> -/*<br>
> - * This variable is optional. It is used on CPUs on which it is difficult<br>
> - * to generate an "uninitialized" FP context. It is filled in by<br>
> - * _CPU_Initialize and copied into the task's FP context area during<br>
> - * _CPU_Context_Initialize.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;<br>
> -<br>
> -/*<br>
> - * Nothing prevents the porter from declaring more CPU specific variables.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -/* XXX: if needed, put more variables here */<br>
> -<br>
> -/*<br>
> - * The size of the floating point context area. On some CPUs this<br>
> - * will not be a "sizeof" because the format of the floating point<br>
> - * area is not defined -- only the size is. This is usually on<br>
> - * CPUs with a "floating point save context" instruction.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp )<br>
> -<br>
> -#endif /* ASM */<br>
> -<br>
> -/*<br>
> - * Amount of extra stack (above minimum stack size) required by<br>
> - * system initialization thread. Remember that in a multiprocessor<br>
> - * system the system intialization thread becomes the MP server thread.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * It is highly unlikely the H8300 will get used in a multiprocessor system.<br>
> - */<br>
> -<br>
> -#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0<br>
> -<br>
> -/*<br>
> - * This defines the number of entries in the ISR_Vector_table managed<br>
> - * by RTEMS.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_INTERRUPT_NUMBER_OF_VECTORS 64<br>
> -#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)<br>
> -<br>
> -/*<br>
> - * This is defined if the port has a special way to report the ISR nesting<br>
> - * level. Most ports maintain the variable _ISR_Nest_level.<br>
> - */<br>
> -<br>
> -#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE<br>
> -<br>
> -/*<br>
> - * Should be large enough to run all RTEMS tests. This ensures<br>
> - * that a "reasonable" small application should not have any problems.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_STACK_MINIMUM_SIZE (1536)<br>
> -<br>
> -#if defined(__H8300H__) || defined(__H8300S__) || defined(__H8300SX__)<br>
> - #define CPU_SIZEOF_POINTER 4<br>
> -#else<br>
> - #define CPU_SIZEOF_POINTER 2<br>
> -#endif<br>
> -<br>
> -/*<br>
> - * CPU's worst alignment requirement for data types on a byte boundary. This<br>
> - * alignment does not take into account the requirements for the stack.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_ALIGNMENT 8<br>
> -<br>
> -/*<br>
> - * This number corresponds to the byte alignment requirement for the<br>
> - * heap handler. This alignment requirement may be stricter than that<br>
> - * for the data types alignment specified by CPU_ALIGNMENT. It is<br>
> - * common for the heap to follow the same alignment requirement as<br>
> - * CPU_ALIGNMENT. If the CPU_ALIGNMENT is strict enough for the heap,<br>
> - * then this should be set to CPU_ALIGNMENT.<br>
> - *<br>
> - * NOTE: This does not have to be a power of 2. It does have to<br>
> - * be greater or equal to than CPU_ALIGNMENT.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_HEAP_ALIGNMENT CPU_ALIGNMENT<br>
> -<br>
> -/*<br>
> - * This number corresponds to the byte alignment requirement for memory<br>
> - * buffers allocated by the partition manager. This alignment requirement<br>
> - * may be stricter than that for the data types alignment specified by<br>
> - * CPU_ALIGNMENT. It is common for the partition to follow the same<br>
> - * alignment requirement as CPU_ALIGNMENT. If the CPU_ALIGNMENT is strict<br>
> - * enough for the partition, then this should be set to CPU_ALIGNMENT.<br>
> - *<br>
> - * NOTE: This does not have to be a power of 2. It does have to<br>
> - * be greater or equal to than CPU_ALIGNMENT.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_PARTITION_ALIGNMENT CPU_ALIGNMENT<br>
> -<br>
> -/*<br>
> - * This number corresponds to the byte alignment requirement for the<br>
> - * stack. This alignment requirement may be stricter than that for the<br>
> - * data types alignment specified by CPU_ALIGNMENT. If the CPU_ALIGNMENT<br>
> - * is strict enough for the stack, then this should be set to 0.<br>
> - *<br>
> - * NOTE: This must be a power of 2 either 0 or greater than CPU_ALIGNMENT.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_STACK_ALIGNMENT 2<br>
> -<br>
> -/*<br>
> - * ISR handler macros<br>
> - */<br>
> -<br>
> -/*<br>
> - * Support routine to initialize the RTEMS vector table after it is allocated.<br>
> - */<br>
> -<br>
> -#define _CPU_Initialize_vectors()<br>
> -<br>
> -/* COPE With Brain dead version of GCC distributed with Hitachi HIView Tools.<br>
> - Note requires ISR_Level be uint16_t or assembler croaks.<br>
> -*/<br>
> -<br>
> -#if (__GNUC__ == 2 && __GNUC_MINOR__ == 7 )<br>
> -<br>
> -<br>
> -/*<br>
> - * Disable all interrupts for an RTEMS critical section. The previous<br>
> - * level is returned in _level.<br>
> - */<br>
> -<br>
> -#define _CPU_ISR_Disable( _isr_cookie ) \<br>
> - do { \<br>
> - __asm__ volatile( "stc.w ccr, @-er7 ;\n orc #0xC0,ccr ;\n mov.w @er7+,%0" : : "r" (_isr_cookie) ); \<br>
> - } while (0)<br>
> -<br>
> -<br>
> -/*<br>
> - * Enable interrupts to the previous level (returned by _CPU_ISR_Disable).<br>
> - * This indicates the end of an RTEMS critical section. The parameter<br>
> - * _level is not modified.<br>
> - */<br>
> -<br>
> -<br>
> -#define _CPU_ISR_Enable( _isr_cookie ) \<br>
> - do { \<br>
> - __asm__ volatile( "mov.w %0,@-er7 ;\n ldc.w @er7+, ccr" : : "r" (_isr_cookie) ); \<br>
> - } while (0)<br>
> -<br>
> -<br>
> -/*<br>
> - * This temporarily restores the interrupt to _level before immediately<br>
> - * disabling them again. This is used to divide long RTEMS critical<br>
> - * sections into two or more parts. The parameter _level is not<br>
> - * modified.<br>
> - */<br>
> -<br>
> -<br>
> -#define _CPU_ISR_Flash( _isr_cookie ) \<br>
> - do { \<br>
> - __asm__ volatile( "mov.w %0,@-er7 ;\n ldc.w @er7+, ccr ;\n orc #0xC0,ccr" : : "r" (_isr_cookie) ); \<br>
> - } while (0)<br>
> -<br>
> -/* end of ISR handler macros */<br>
> -<br>
> -#else /* modern gcc version */<br>
> -<br>
> -/*<br>
> - * Disable all interrupts for an RTEMS critical section. The previous<br>
> - * level is returned in _level.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * TODO: As of 8 October 2014, this method is not implemented for the SX.<br>
> - */<br>
> -<br>
> -#if defined(__H8300H__) || defined(__H8300S__)<br>
> -#define _CPU_ISR_Disable( _isr_cookie ) \<br>
> - do { \<br>
> - unsigned char __ccr; \<br>
> - __asm__ volatile( "stc ccr, %0 ; orc #0x80,ccr " \<br>
> - : "=m" (__ccr) /* : "0" (__ccr) */ ); \<br>
> - (_isr_cookie) = __ccr; \<br>
> - } while (0)<br>
> -#else<br>
> -#define _CPU_ISR_Disable( _isr_cookie ) \<br>
> - do { \<br>
> - (_isr_cookie) = 0; \<br>
> - } while (0)<br>
> -#endif<br>
> -<br>
> -<br>
> -/*<br>
> - * Enable interrupts to the previous level (returned by _CPU_ISR_Disable).<br>
> - * This indicates the end of an RTEMS critical section. The parameter<br>
> - * _level is not modified.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * TODO: As of 8 October 2014, this method is not implemented for the SX.<br>
> - */<br>
> -<br>
> -#if defined(__H8300H__) || defined(__H8300S__)<br>
> -#define _CPU_ISR_Enable( _isr_cookie ) \<br>
> - do { \<br>
> - unsigned char __ccr = (unsigned char) (_isr_cookie); \<br>
> - __asm__ volatile( "ldc %0, ccr" : : "m" (__ccr) ); \<br>
> - } while (0)<br>
> -#else<br>
> -#define _CPU_ISR_Enable( _isr_cookie ) \<br>
> - do { \<br>
> - (_isr_cookie) = (_isr_cookie); \<br>
> - } while (0)<br>
> -#endif<br>
> -<br>
> -/*<br>
> - * This temporarily restores the interrupt to _level before immediately<br>
> - * disabling them again. This is used to divide long RTEMS critical<br>
> - * sections into two or more parts. The parameter _level is not<br>
> - * modified.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * TODO: As of 8 October 2014, this method is not implemented for the SX.<br>
> - */<br>
> -<br>
> -#if defined(__H8300H__) || defined(__H8300S__)<br>
> -#define _CPU_ISR_Flash( _isr_cookie ) \<br>
> - do { \<br>
> - unsigned char __ccr = (unsigned char) (_isr_cookie); \<br>
> - __asm__ volatile( "ldc %0, ccr ; orc #0x80,ccr " : : "m" (__ccr) ); \<br>
> - } while (0)<br>
> -#else<br>
> -#define _CPU_ISR_Flash( _isr_cookie ) \<br>
> - do { \<br>
> - _CPU_ISR_Enable( _isr_cookie ); \<br>
> - _CPU_ISR_Disable( _isr_cookie ); \<br>
> - } while (0)<br>
> -#endif<br>
> -<br>
> -#endif /* end of old gcc */<br>
> -<br>
> -<br>
> -/*<br>
> - * Map interrupt level in task mode onto the hardware that the CPU<br>
> - * actually provides. Currently, interrupt levels which do not<br>
> - * map onto the CPU in a generic fashion are undefined. Someday,<br>
> - * it would be nice if these were "mapped" by the application<br>
> - * via a callout. For example, m68k has 8 levels 0 - 7, levels<br>
> - * 8 - 255 would be available for bsp/application specific meaning.<br>
> - * This could be used to manage a programmable interrupt controller<br>
> - * via the rtems_task_mode directive.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define _CPU_ISR_Set_level( _new_level ) \<br>
> - { \<br>
> - if ( _new_level ) __asm__ volatile ( "orc #0x80,ccr\n" ); \<br>
> - else __asm__ volatile ( "andc #0x7f,ccr\n" ); \<br>
> - }<br>
> -<br>
> -#ifndef ASM<br>
> -<br>
> -uint32_t _CPU_ISR_Get_level( void );<br>
> -<br>
> -/* end of ISR handler macros */<br>
> -<br>
> -/* Context handler macros */<br>
> -<br>
> -/*<br>
> - * Initialize the context to a state suitable for starting a<br>
> - * task after a context restore operation. Generally, this<br>
> - * involves:<br>
> - *<br>
> - * - setting a starting address<br>
> - * - preparing the stack<br>
> - * - preparing the stack and frame pointers<br>
> - * - setting the proper interrupt level in the context<br>
> - * - initializing the floating point context<br>
> - *<br>
> - * This routine generally does not set any unnecessary register<br>
> - * in the context. The state of the "general data" registers is<br>
> - * undefined at task start time.<br>
> - *<br>
> - * NOTE: This is_fp parameter is TRUE if the thread is to be a floating<br>
> - * point thread. This is typically only used on CPUs where the<br>
> - * FPU may be easily disabled by software such as on the SPARC<br>
> - * where the PSR contains an enable FPU bit.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -<br>
> -#define CPU_CCR_INTERRUPTS_ON 0x80<br>
> -#define CPU_CCR_INTERRUPTS_OFF 0x00<br>
> -<br>
> -#define _CPU_Context_Initialize( _the_context, _stack_base, _size, \<br>
> - _isr, _entry_point, _is_fp, _tls_area ) \<br>
> - /* Locate Me */ \<br>
> - do { \<br>
> - uintptr_t _stack; \<br>
> - \<br>
> - if ( (_isr) ) (_the_context)->ccr = CPU_CCR_INTERRUPTS_OFF; \<br>
> - else (_the_context)->ccr = CPU_CCR_INTERRUPTS_ON; \<br>
> - \<br>
> - (void) _is_fp; /* to eliminate set but not used warning */ \<br>
> - _stack = ((uintptr_t)(_stack_base)) + (_size) - 4; \<br>
> - *((proc_ptr *)(_stack)) = (_entry_point); \<br>
> - (_the_context)->er7 = (void *) _stack; \<br>
> - (_the_context)->er6 = (void *) _stack; \<br>
> - (_the_context)->er5 = 0; \<br>
> - (_the_context)->er4 = 1; \<br>
> - (_the_context)->er3 = 2; \<br>
> - } while (0)<br>
> -<br>
> -<br>
> -/*<br>
> - * This routine is responsible for somehow restarting the currently<br>
> - * executing task. If you are lucky, then all that is necessary<br>
> - * is restoring the context. Otherwise, there will need to be<br>
> - * a special assembly routine which does something special in this<br>
> - * case. Context_Restore should work most of the time. It will<br>
> - * not work if restarting self conflicts with the stack frame<br>
> - * assumptions of restoring a context.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define _CPU_Context_Restart_self( _the_context ) \<br>
> - _CPU_Context_restore( (_the_context) );<br>
> -<br>
> -/*<br>
> - * The purpose of this macro is to allow the initial pointer into<br>
> - * a floating point context area (used to save the floating point<br>
> - * context) to be at an arbitrary place in the floating point<br>
> - * context area.<br>
> - *<br>
> - * This is necessary because some FP units are designed to have<br>
> - * their context saved as a stack which grows into lower addresses.<br>
> - * Other FP units can be saved by simply moving registers into offsets<br>
> - * from the base of the context area. Finally some FP units provide<br>
> - * a "dump context" instruction which could fill in from high to low<br>
> - * or low to high based on the whim of the CPU designers.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define _CPU_Context_Fp_start( _base, _offset ) \<br>
> - ( (void *) (_base) + (_offset) )<br>
> -<br>
> -/*<br>
> - * This routine initializes the FP context area passed to it to.<br>
> - * There are a few standard ways in which to initialize the<br>
> - * floating point context. The code included for this macro assumes<br>
> - * that this is a CPU in which a "initial" FP context was saved into<br>
> - * _CPU_Null_fp_context and it simply copies it to the destination<br>
> - * context passed to it.<br>
> - *<br>
> - * Other models include (1) not doing anything, and (2) putting<br>
> - * a "null FP status word" in the correct place in the FP context.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define _CPU_Context_Initialize_fp( _destination ) \<br>
> - { \<br>
> - *(*(_destination)) = _CPU_Null_fp_context; \<br>
> - }<br>
> -<br>
> -/* end of Context handler macros */<br>
> -<br>
> -/* Fatal Error manager macros */<br>
> -<br>
> -/*<br>
> - * This routine copies _error into a known place -- typically a stack<br>
> - * location or a register, optionally disables interrupts, and<br>
> - * halts/stops the CPU.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define _CPU_Fatal_halt( _source, _error ) \<br>
> - printk("Fatal Error %d.%d Halted\n",_source, _error); \<br>
> - for(;;)<br>
> -<br>
> -<br>
> -/* end of Fatal Error manager macros */<br>
> -<br>
> -/* Bitfield handler macros */<br>
> -<br>
> -/*<br>
> - * This routine sets _output to the bit number of the first bit<br>
> - * set in _value. _value is of CPU dependent type Priority_bit_map_Word.<br>
> - * This type may be either 16 or 32 bits wide although only the 16<br>
> - * least significant bits will be used.<br>
> - *<br>
> - * There are a number of variables in using a "find first bit" type<br>
> - * instruction.<br>
> - *<br>
> - * (1) What happens when run on a value of zero?<br>
> - * (2) Bits may be numbered from MSB to LSB or vice-versa.<br>
> - * (3) The numbering may be zero or one based.<br>
> - * (4) The "find first bit" instruction may search from MSB or LSB.<br>
> - *<br>
> - * RTEMS guarantees that (1) will never happen so it is not a concern.<br>
> - * (2),(3), (4) are handled by the macros _CPU_Priority_mask() and<br>
> - * _CPU_Priority_bits_index(). These three form a set of routines<br>
> - * which must logically operate together. Bits in the _value are<br>
> - * set and cleared based on masks built by _CPU_Priority_mask().<br>
> - * The basic major and minor values calculated by _Priority_Major()<br>
> - * and _Priority_Minor() are "massaged" by _CPU_Priority_bits_index()<br>
> - * to properly range between the values returned by the "find first bit"<br>
> - * instruction. This makes it possible for _Priority_Get_highest() to<br>
> - * calculate the major and directly index into the minor table.<br>
> - * This mapping is necessary to ensure that 0 (a high priority major/minor)<br>
> - * is the first bit found.<br>
> - *<br>
> - * This entire "find first bit" and mapping process depends heavily<br>
> - * on the manner in which a priority is broken into a major and minor<br>
> - * components with the major being the 4 MSB of a priority and minor<br>
> - * the 4 LSB. Thus (0 << 4) + 0 corresponds to priority 0 -- the highest<br>
> - * priority. And (15 << 4) + 14 corresponds to priority 254 -- the next<br>
> - * to the lowest priority.<br>
> - *<br>
> - * If your CPU does not have a "find first bit" instruction, then<br>
> - * there are ways to make do without it. Here are a handful of ways<br>
> - * to implement this in software:<br>
> - *<br>
> - * - a series of 16 bit test instructions<br>
> - * - a "binary search using if's"<br>
> - * - _number = 0<br>
> - * if _value > 0x00ff<br>
> - * _value >>=8<br>
> - * _number = 8;<br>
> - *<br>
> - * if _value > 0x0000f<br>
> - * _value >=8<br>
> - * _number += 4<br>
> - *<br>
> - * _number += bit_set_table[ _value ]<br>
> - *<br>
> - * where bit_set_table[ 16 ] has values which indicate the first<br>
> - * bit set<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#define CPU_USE_GENERIC_BITFIELD_CODE TRUE<br>
> -#define CPU_USE_GENERIC_BITFIELD_DATA TRUE<br>
> -<br>
> -#if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE)<br>
> -<br>
> -#define _CPU_Bitfield_Find_first_bit( _value, _output ) \<br>
> - { \<br>
> - (_output) = 0; /* do something to prevent warnings */ \<br>
> - }<br>
> -<br>
> -#endif<br>
> -<br>
> -/* end of Bitfield handler macros */<br>
> -<br>
> -/*<br>
> - * This routine builds the mask which corresponds to the bit fields<br>
> - * as searched by _CPU_Bitfield_Find_first_bit(). See the discussion<br>
> - * for that routine.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE)<br>
> -<br>
> -#define _CPU_Priority_Mask( _bit_number ) \<br>
> - ( 1 << (_bit_number) )<br>
> -<br>
> -#endif<br>
> -<br>
> -/*<br>
> - * This routine translates the bit numbers returned by<br>
> - * _CPU_Bitfield_Find_first_bit() into something suitable for use as<br>
> - * a major or minor component of a priority. See the discussion<br>
> - * for that routine.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -#if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE)<br>
> -<br>
> -#define _CPU_Priority_bits_index( _priority ) \<br>
> - (_priority)<br>
> -<br>
> -#endif<br>
> -<br>
> -/* end of Priority handler macros */<br>
> -<br>
> -/* functions */<br>
> -<br>
> -/*<br>
> - * _CPU_Initialize<br>
> - *<br>
> - * This routine performs CPU dependent initialization.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -void _CPU_Initialize(void);<br>
> -<br>
> -/*<br>
> - * _CPU_ISR_install_raw_handler<br>
> - *<br>
> - * This routine installs a "raw" interrupt handler directly into the<br>
> - * processor's vector table.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -void _CPU_ISR_install_raw_handler(<br>
> - uint32_t vector,<br>
> - proc_ptr new_handler,<br>
> - proc_ptr *old_handler<br>
> -);<br>
> -<br>
> -/*<br>
> - * _CPU_ISR_install_vector<br>
> - *<br>
> - * This routine installs an interrupt vector.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -void _CPU_ISR_install_vector(<br>
> - uint32_t vector,<br>
> - proc_ptr new_handler,<br>
> - proc_ptr *old_handler<br>
> -);<br>
> -<br>
> -/*<br>
> - * _CPU_Install_interrupt_stack<br>
> - *<br>
> - * This routine installs the hardware interrupt stack pointer.<br>
> - *<br>
> - * NOTE: It need only be provided if CPU_HAS_HARDWARE_INTERRUPT_STACK<br>
> - * is TRUE.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -void _CPU_Install_interrupt_stack( void );<br>
> -<br>
> -/*<br>
> - * _CPU_Internal_threads_Idle_thread_body<br>
> - *<br>
> - * This routine is the CPU dependent IDLE thread body.<br>
> - *<br>
> - * NOTE: It need only be provided if CPU_PROVIDES_IDLE_THREAD_BODY<br>
> - * is TRUE.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -void *_CPU_Thread_Idle_body( uint32_t );<br>
> -<br>
> -/*<br>
> - * _CPU_Context_switch<br>
> - *<br>
> - * This routine switches from the run context to the heir context.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -void _CPU_Context_switch(<br>
> - Context_Control *run,<br>
> - Context_Control *heir<br>
> -);<br>
> -<br>
> -/*<br>
> - * _CPU_Context_restore<br>
> - *<br>
> - * This routine is generallu used only to restart self in an<br>
> - * efficient manner. It may simply be a label in _CPU_Context_switch.<br>
> - *<br>
> - * NOTE: May be unnecessary to reload some registers.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -void _CPU_Context_restore(<br>
> - Context_Control *new_context<br>
> -) RTEMS_NO_RETURN;<br>
> -<br>
> -/*<br>
> - * _CPU_Context_save_fp<br>
> - *<br>
> - * This routine saves the floating point context passed to it.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -void _CPU_Context_save_fp(<br>
> - Context_Control_fp **fp_context_ptr<br>
> -);<br>
> -<br>
> -/*<br>
> - * _CPU_Context_restore_fp<br>
> - *<br>
> - * This routine restores the floating point context passed to it.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * XXX<br>
> - */<br>
> -<br>
> -void _CPU_Context_restore_fp(<br>
> - Context_Control_fp **fp_context_ptr<br>
> -);<br>
> -<br>
> -static inline void _CPU_Context_volatile_clobber( uintptr_t pattern )<br>
> -{<br>
> - /* TODO */<br>
> -}<br>
> -<br>
> -static inline void _CPU_Context_validate( uintptr_t pattern )<br>
> -{<br>
> - while (1) {<br>
> - /* TODO */<br>
> - }<br>
> -}<br>
> -<br>
> -/* FIXME */<br>
> -typedef CPU_Interrupt_frame CPU_Exception_frame;<br>
> -<br>
> -void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );<br>
> -<br>
> -/* The following routine swaps the endian format of an unsigned int.<br>
> - * It must be static because it is referenced indirectly.<br>
> - *<br>
> - * This version will work on any processor, but if there is a better<br>
> - * way for your CPU PLEASE use it. The most common way to do this is to:<br>
> - *<br>
> - * swap least significant two bytes with 16-bit rotate<br>
> - * swap upper and lower 16-bits<br>
> - * swap most significant two bytes with 16-bit rotate<br>
> - *<br>
> - * Some CPUs have special instructions which swap a 32-bit quantity in<br>
> - * a single instruction (e.g. i486). It is probably best to avoid<br>
> - * an "endian swapping control bit" in the CPU. One good reason is<br>
> - * that interrupts would probably have to be disabled to ensure that<br>
> - * an interrupt does not try to access the same "chunk" with the wrong<br>
> - * endian. Another good reason is that on some CPUs, the endian bit<br>
> - * endianness for ALL fetches -- both code and data -- so the code<br>
> - * will be fetched incorrectly.<br>
> - *<br>
> - * H8300 Specific Information:<br>
> - *<br>
> - * This is the generic implementation.<br>
> - */<br>
> -<br>
> -static inline uint32_t CPU_swap_u32(<br>
> - uint32_t value<br>
> -)<br>
> -{<br>
> - uint32_t byte1, byte2, byte3, byte4, swapped;<br>
> -<br>
> - byte4 = (value >> 24) & 0xff;<br>
> - byte3 = (value >> 16) & 0xff;<br>
> - byte2 = (value >> 8) & 0xff;<br>
> - byte1 = value & 0xff;<br>
> -<br>
> - swapped = (byte1 << 24) | (byte2 << 16) | (byte3 << 8) | byte4;<br>
> - return( swapped );<br>
> -}<br>
> -<br>
> -#define CPU_swap_u16( value ) \<br>
> - (((value&0xff) << 8) | ((value >> 8)&0xff))<br>
> -<br>
> -typedef uint32_t CPU_Counter_ticks;<br>
> -<br>
> -CPU_Counter_ticks _CPU_Counter_read( void );<br>
> -<br>
> -static inline CPU_Counter_ticks _CPU_Counter_difference(<br>
> - CPU_Counter_ticks second,<br>
> - CPU_Counter_ticks first<br>
> -)<br>
> -{<br>
> - return second - first;<br>
> -}<br>
> -<br>
> -/* to be provided by the BSP */<br>
> -extern void H8BD_Install_IRQ(<br>
> - uint32_t vector,<br>
> - proc_ptr new_handler,<br>
> - proc_ptr *old_handler );<br>
> -<br>
> -#endif /* ASM */<br>
> -<br>
> -#ifdef __cplusplus<br>
> -}<br>
> -#endif<br>
> -<br>
> -#endif<br>
> diff --git a/cpukit/score/cpu/h8300/rtems/score/cpuatomic.h b/cpukit/score/cpu/h8300/rtems/score/cpuatomic.h<br>
> deleted file mode 100644<br>
> index 598ee76..0000000<br>
> --- a/cpukit/score/cpu/h8300/rtems/score/cpuatomic.h<br>
> +++ /dev/null<br>
> @@ -1,14 +0,0 @@<br>
> -/*<br>
> - * COPYRIGHT (c) 2012-2013 Deng Hengyi.<br>
> - *<br>
> - * The license and distribution terms for this file may be<br>
> - * found in the file LICENSE in this distribution or at<br>
> - * <a href="http://www.rtems.org/license/LICENSE" rel="noreferrer" target="_blank">http://www.rtems.org/license/LICENSE</a>.<br>
> - */<br>
> -<br>
> -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H<br>
> -#define _RTEMS_SCORE_ATOMIC_CPU_H<br>
> -<br>
> -#include <rtems/score/cpustdatomic.h><br>
> -<br>
> -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */<br>
> diff --git a/cpukit/score/cpu/h8300/rtems/score/h8300.h b/cpukit/score/cpu/h8300/rtems/score/h8300.h<br>
> deleted file mode 100644<br>
> index e30343c..0000000<br>
> --- a/cpukit/score/cpu/h8300/rtems/score/h8300.h<br>
> +++ /dev/null<br>
> @@ -1,44 +0,0 @@<br>
> -/**<br>
> - * @file<br>
> - *<br>
> - * @brief Information Required to Build RTEMS for a Particular Member<br>
> - * of the Hitachi H8/300 Family<br>
> - *<br>
> - * This file contains information pertaining to the Hitachi H8/300<br>
> - * processor family.<br>
> - */<br>
> -<br>
> -/*<br>
> - * COPYRIGHT (c) 1989-1999.<br>
> - * On-Line Applications Research Corporation (OAR).<br>
> - *<br>
> - * The license and distribution terms for this file may be<br>
> - * found in the file LICENSE in this distribution or at<br>
> - * <a href="http://www.rtems.org/license/LICENSE" rel="noreferrer" target="_blank">http://www.rtems.org/license/LICENSE</a>.<br>
> - */<br>
> -<br>
> -#ifndef _RTEMS_SCORE_H8300_H<br>
> -#define _RTEMS_SCORE_H8300_H<br>
> -<br>
> -#ifdef __cplusplus<br>
> -extern "C" {<br>
> -#endif<br>
> -<br>
> -/*<br>
> - * This file contains the information required to build<br>
> - * RTEMS for a particular member of the "h8300"<br>
> - * family when executing in protected mode. It does<br>
> - * this by setting variables to indicate which implementation<br>
> - * dependent features are present in a particular member<br>
> - * of the family.<br>
> - */<br>
> -<br>
> -#define CPU_NAME "Hitachi H8300"<br>
> -#define CPU_MODEL_NAME "h8300"<br>
> -#define H8300_HAS_FPU 0<br>
> -<br>
> -#ifdef __cplusplus<br>
> -}<br>
> -#endif<br>
> -<br>
> -#endif<br>
> diff --git a/cpukit/score/cpu/h8300/rtems/score/types.h b/cpukit/score/cpu/h8300/rtems/score/types.h<br>
> deleted file mode 100644<br>
> index 7fcac8b..0000000<br>
> --- a/cpukit/score/cpu/h8300/rtems/score/types.h<br>
> +++ /dev/null<br>
> @@ -1,47 +0,0 @@<br>
> -/**<br>
> - * @file<br>
> - *<br>
> - * @brief Hitachi H8300 CPU Type Definitions<br>
> - *<br>
> - * This include file contains type definitions pertaining to the Hitachi<br>
> - * h8300 processor family.<br>
> - */<br>
> -<br>
> -/*<br>
> - * COPYRIGHT (c) 1989-1999.<br>
> - * On-Line Applications Research Corporation (OAR).<br>
> - *<br>
> - * The license and distribution terms for this file may be<br>
> - * found in the file LICENSE in this distribution or at<br>
> - * <a href="http://www.rtems.org/license/LICENSE" rel="noreferrer" target="_blank">http://www.rtems.org/license/LICENSE</a>.<br>
> - */<br>
> -<br>
> -#ifndef _RTEMS_SCORE_TYPES_H<br>
> -#define _RTEMS_SCORE_TYPES_H<br>
> -<br>
> -#include <rtems/score/basedefs.h><br>
> -<br>
> -#ifndef ASM<br>
> -<br>
> -#ifdef __cplusplus<br>
> -extern "C" {<br>
> -#endif<br>
> -<br>
> -/*<br>
> - * This section defines the basic types for this processor.<br>
> - */<br>
> -<br>
> -/** Type that can store a 32-bit integer or a pointer. */<br>
> -typedef unsigned long CPU_Uint32ptr;<br>
> -<br>
> -typedef uint16_t Priority_bit_map_Word;<br>
> -typedef void h8300_isr;<br>
> -typedef void ( *h8300_isr_entry )( void );<br>
> -<br>
> -#ifdef __cplusplus<br>
> -}<br>
> -#endif<br>
> -<br>
> -#endif /* !ASM */<br>
> -<br>
> -#endif<br>
> diff --git a/doc/cpu_supplement/Makefile.am b/doc/cpu_supplement/Makefile.am<br>
> index f27cc6a..4d8ac98 100644<br>
> --- a/doc/cpu_supplement/Makefile.am<br>
> +++ b/doc/cpu_supplement/Makefile.am<br>
> @@ -16,7 +16,6 @@ GENERATED_FILES += arm.texi<br>
> GENERATED_FILES += avr.texi<br>
> GENERATED_FILES += bfin.texi<br>
> GENERATED_FILES += epiphany.texi<br>
> -GENERATED_FILES += h8300.texi<br>
> GENERATED_FILES += i386.texi<br>
> GENERATED_FILES += lm32.texi<br>
> GENERATED_FILES += m32c.texi<br>
> @@ -67,11 +66,6 @@ epiphany.texi: epiphany.t<br>
> -u "Top" \<br>
> -n "" < $< > $@<br>
><br>
> -h8300.texi: h8300.t<br>
> - $(BMENU2) -p "" \<br>
> - -u "Top" \<br>
> - -n "" < $< > $@<br>
> -<br>
> i386.texi: i386.t<br>
> $(BMENU2) -p "" \<br>
> -u "Top" \<br>
> diff --git a/doc/cpu_supplement/cpu_supplement.texi b/doc/cpu_supplement/cpu_supplement.texi<br>
> index 2fcdfa0..52c1a6f 100644<br>
> --- a/doc/cpu_supplement/cpu_supplement.texi<br>
> +++ b/doc/cpu_supplement/cpu_supplement.texi<br>
> @@ -66,7 +66,6 @@<br>
> * Atmel AVR Specific Information::<br>
> * Blackfin Specific Information::<br>
> * Epiphany Specific Information::<br>
> -* Renesas H8/300 Specific Information::<br>
> * Intel/AMD x86 Specific Information::<br>
> * Lattice Mico32 Specific Information::<br>
> * Renesas M32C Specific Information::<br>
> @@ -90,7 +89,6 @@<br>
> @include avr.texi<br>
> @include bfin.texi<br>
> @include epiphany.texi<br>
> -@include h8300.texi<br>
> @include i386.texi<br>
> @include lm32.texi<br>
> @include m32c.texi<br>
> diff --git a/doc/cpu_supplement/h8300.t b/doc/cpu_supplement/h8300.t<br>
> deleted file mode 100644<br>
> index 8c50ffb..0000000<br>
> --- a/doc/cpu_supplement/h8300.t<br>
> +++ /dev/null<br>
> @@ -1,11 +0,0 @@<br>
> -@c Copyright (c) 2014 embedded brains GmbH. All rights reserved.<br>
> -<br>
> -@chapter Renesas H8/300 Specific Information<br>
> -<br>
> -@section Symmetric Multiprocessing<br>
> -<br>
> -SMP is not supported.<br>
> -<br>
> -@section Thread-Local Storage<br>
> -<br>
> -Thread-local storage is not implemented.<br>
> diff --git a/testsuites/libtests/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a> b/testsuites/libtests/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a><br>
> index 4941c51..5ac2dfd 100644<br>
> --- a/testsuites/libtests/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a><br>
> +++ b/testsuites/libtests/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a><br>
> @@ -53,9 +53,6 @@ case $RTEMS_CPU in<br>
> # bfin has an issue to resolve with libdl. See ticket #2252<br>
> bfin)<br>
> HAVE_LIBDL=no ;;<br>
> - # h8300 has an issue to resolve with libdl. See ticket #2284<br>
> - h8300)<br>
> - HAVE_LIBDL=no ;;<br>
> # lm32 has an issue to resolve with libdl. See ticket #2283<br>
> lm32)<br>
> HAVE_LIBDL=no ;;<br>
> diff --git a/testsuites/psxtests/psx04/task3.c b/testsuites/psxtests/psx04/task3.c<br>
> index 71ac39f..5d4172c 100644<br>
> --- a/testsuites/psxtests/psx04/task3.c<br>
> +++ b/testsuites/psxtests/psx04/task3.c<br>
> @@ -29,7 +29,7 @@ void *Task_3(<br>
> unsigned int remaining;<br>
> int status;<br>
> int sig;<br>
> - volatile union sigval value; /* should be removed once the H8300 target is fixed */<br>
> + volatile union sigval value;<br>
> sigset_t mask;<br>
> siginfo_t info;<br>
><br>
> --<br>
> 1.7.1<br>
><br>
> _______________________________________________<br>
> devel mailing list<br>
> <a href="mailto:devel@rtems.org">devel@rtems.org</a><br>
> <a href="http://lists.rtems.org/mailman/listinfo/devel" rel="noreferrer" target="_blank">http://lists.rtems.org/mailman/listinfo/devel</a><br>
</div></div></blockquote></div><br></div></div>