<div dir="ltr"><div><div><div><div><div><div><div><div><div><div><div><div><div>Hi all,<br><br></div>Github Link : <a href="https://github.com/spark1729/rtems/commit/eaf0ae5058877ee525f32ea545e3eb76e185ebbf">https://github.com/spark1729/rtems/commit/eaf0ae5058877ee525f32ea545e3eb76e185ebbf</a><br><br></div>As per the suggestions I have made modifications. <br><br></div>1. Invalidating the cache in the rpi_dma_start <br></div>2. Adding a atomic flag in the channel structure which will be used for DMA serializing.<br></div>3. Changed the rpi_dma_init function. Now according to me the flow for using DMA will be as follows. <br></div>
1. rpi_dma_init -> Initializes the channel structure and its members
for that particular channel, gets the physical address of the control
block structure and installs the interrupt handler.<br></div> 2. rpi_dma_allocate -> Allocates the channel if it is not busy<br>
3. rpi_dma_setup_dst & rpi_dma_setup_src -> These setup src and
dst parameters like dreq,width. Basically they configure the info
section of the control block structure of that particular channel.<br></div><div>
4. rpi_dma_setup_intr -> These will assign the handler function for
channel interrupt. This basically again updates the channel structure
with that function. <br> <wbr> Note : rpi_dma_intr is the callback function for the interrupt controller and calls this function internally. <br></div><div>
5. rpi_dma_start -> Here you provide the virtual address, the
channel to be used and the width. Internally, it converts the address to
physical address and configures the control block for that channel. <br></div><div> <wbr>
It flushes and invalidates the cache and writes the physical address of
the control block to a particular register corresponding to the
channel.<br></div> 6. rpi_dma_free -> Frees the channel<br></div>4. Used rtems_cache_aligned_malloc instead of rtems_cache_coherent_allocate.<br></div>5. Have added the corresponding IRQ for DMA channel 0 to irq.h and updated irq.c. Presently, have only added support for DMA CH0 in irq.c. Other channels can be added in further commits.<br></div>6. Added RTEMS_COMPILER_MEMORY_BARRIER() in dma_start. <br><br></div><div>The changes are on top of the previous change and builds without any warnings or errors.<br></div><div><br></div><div>I request people to review this and provide suggestion on what else can be improved. <br><br></div>Thanks <br></div>Mudit <br><div><div><div><br></div></div></div></div>