<div>I think it can use in i2c devices, but i don't test it.</div><div>and the read_eeprom is using reading the eeprom. and i will modify it in the future, conform to the RTEMS code specification.</div><div> </div><div><div><br></div><div><br></div><div style="font-size: 12px;font-family: Arial Narrow;padding:2px 0 2px 0;">------------------ Original ------------------</div><div style="font-size: 12px;background:#efefef;padding:8px;"><div><b>From: </b> "beng";<beng@shrike-systems.com>;</div><div><b>Date: </b> Tue, Mar 21, 2017 12:12 PM</div><div><b>To: </b> "devel"<devel@rtems.org>; "ÕÔ˼³¿"<1473996754@qq.com>; <wbr></div><div></div><div><b>Subject: </b> Re: [PATCH] modify punitvara's works on BBB i2c, and now can read theeeprom info.</div></div><div><br></div>Dear all,<br><br>SZ, great initiative. Gedare and Sebastian have commented.<br><br>For my part, can I just check - the implementation is supposed to be<br>generic to i2c devices, correct?<br><br>If so, can you explain what read_eeprom is for? Is it just as demo? Is<br>the code generic otherwise?<br><br>Cheers,<br><br>Ben<br><br><br>On 03/14/2017 10:05 AM, Sichen Zhao wrote:<br>> ---<br>>  c/src/lib/libbsp/arm/beagle/i2c/bbb-i2c.c | 684 ++++++++++++++++++++++++++++--<br>>  c/src/lib/libbsp/arm/beagle/include/i2c.h |  18 +-<br>>  cpukit/dev/i2c/eeprom.c                   |  24 +-<br>>  testsuites/samples/i2c0/init.c            |  98 ++++-<br>>  4 files changed, 777 insertions(+), 47 deletions(-)<br>><br>> diff --git a/c/src/lib/libbsp/arm/beagle/i2c/bbb-i2c.c b/c/src/lib/libbsp/arm/beagle/i2c/bbb-i2c.c<br>> index 6b790e5..6a22125 100644<br>> --- a/c/src/lib/libbsp/arm/beagle/i2c/bbb-i2c.c<br>> +++ b/c/src/lib/libbsp/arm/beagle/i2c/bbb-i2c.c<br>> @@ -21,11 +21,23 @@<br>>  #include <bsp/bbb-gpio.h><br>>  #include <rtems/score/assert.h><br>>  <br>> +#define u16 unsigned int<br>> +<br>> +static int am335x_i2c_set_clock(i2c_bus *base, unsigned long clock);<br>> +static void omap24_i2c_init(i2c_bus *base);<br>> +static void flush_fifo(i2c_bus *base);<br>> +static int wait_for_bb(i2c_bus *base);<br>> +static int omap24_i2c_probe(i2c_bus *base);<br>> +static u16 wait_for_event(i2c_bus *base);<br>> +static int am335x_i2c_read(i2c_bus *base, unsigned char chip, uint addr, int alen, unsigned char *buffer, <br>> +                           int len);<br>> +static int read_eeprom(i2c_bus *base,struct am335x_baseboard_id *header);<br>> +static int am335x_i2c_write(i2c_bus *base, unsigned char chip, uint addr,int alen, unsigned char *buffer, <br>> +                            int len);<br>>  /*<br>>  static bool am335x_i2c_pinmux(bbb_i2c_bus *bus)<br>>  {<br>>    bool status =true;<br>> -<br>>      // We will check i2c_bus_id in am335x_i2c_bus_register<br>>      // Apart from mode and pull_up register what about SCREWCTRL & RXACTIVE ??<br>>    if (bus->i2c_bus_id == I2C1) {<br>> @@ -48,9 +60,7 @@ static bool am335x_i2c_pinmux(bbb_i2c_bus *bus)<br>>  /* ref. Table 21-4 I2C Clock Signals */<br>>  /* <br>>   For I2C1/2<br>> -<br>>   Interface clock - 100MHz - CORE_LKOUTM4 / 2 - pd_per_l4ls_gclk<br>> -<br>>   Functional clock - 48MHz - PER_CLKOUTM2 / 4 - pd_per_ic2_fclk<br>>  */<br>>  <br>> @@ -74,7 +84,6 @@ state. Functional clocks are guarantied to stay present. As long as in<br>>  this configuration, power domain sleep transition cannot happen.*/<br>>   /* REG(AM335X_CM_PER_ADDR + AM335X_CM_PER_L4LS_CLKCTRL) |=<br>>                          AM335X_CM_PER_L4LS_CLKCTRL_MODULEMODE_ENABLE;<br>> -<br>>    while((REG(AM335X_CM_PER_ADDR + AM335X_CM_PER_L4LS_CLKCTRL) &<br>>        AM335X_CM_PER_L4LS_CLKCTRL_MODULEMODE) != AM335X_CM_PER_L4LS_CLKCTRL_MODULEMODE_ENABLE);<br>>  */<br>> @@ -86,30 +95,29 @@ this configuration, power domain sleep transition cannot happen.*/<br>>    if (bus->i2c_bus_id == I2C1) {<br>>    REG(AM335X_CM_PER_ADDR + AM335X_CM_PER_I2C1_CLKCTRL) |=<br>>                               AM335X_CM_PER_I2C1_CLKCTRL_MODULEMODE_ENABLE;<br>> -<br>>    while(REG((AM335X_CM_PER_ADDR + AM335X_CM_PER_I2C1_CLKCTRL) &<br>>       AM335X_CM_PER_I2C1_CLKCTRL_MODULEMODE) != AM335X_CM_PER_I2C1_CLKCTRL_MODULEMODE_ENABLE);<br>>    } else if (bus->i2c_bus_id == I2C2) {<br>>    REG(AM335X_CM_PER_ADDR + AM335X_CM_PER_I2C2_CLKCTRL) |=<br>>                               AM335X_CM_PER_I2C2_CLKCTRL_MODULEMODE_ENABLE;<br>> -<br>>    while(REG((AM335X_CM_PER_ADDR + AM335X_CM_PER_I2C2_CLKCTRL) &<br>>       AM335X_CM_PER_I2C2_CLKCTRL_MODULEMODE) != AM335X_CM_PER_I2C2_CLKCTRL_MODULEMODE_ENABLE);<br>> -<br>>    while(!(REG(AM335X_CM_PER_ADDR + AM335X_CM_PER_L4LS_CLKSTCTRL) &<br>>             (AM335X_CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_L4LS_GCLK |<br>>              AM335X_CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_I2C_FCLK)));<br>> -<br>>    }<br>>  }<br>>  */<br>>  <br>>  static void am335x_i2c0_pinmux(bbb_i2c_bus *bus)<br>>  {<br>> -  REG(bus->regs + AM335X_CONF_I2C0_SDA) =<br>> +  printf("0x44e10000 + AM335X_CONF_I2C0_SDA:%x\n",0x44e10000 + AM335X_CONF_I2C0_SDA);<br>> +  printf("bus->regs:%x\n", bus->regs);<br>> + <br>> +  REG(0x44e10000 + AM335X_CONF_I2C0_SDA) =<br>>    (BBB_RXACTIVE | BBB_SLEWCTRL | BBB_PU_EN);<br>>  <br>> -  REG(bus->regs + AM335X_CONF_I2C0_SCL) =<br>> +  REG(0x44e10000 + AM335X_CONF_I2C0_SCL) =<br>>    (BBB_RXACTIVE | BBB_SLEWCTRL | BBB_PU_EN); <br>>  }<br>>  <br>> @@ -314,14 +322,29 @@ void am335x_i2c_init(bbb_i2c_bus *bus, uint32_t input_clock)<br>>  static bool am335x_i2c_busbusy(volatile bbb_i2c_regs *regs)<br>>  {<br>>    bool status;<br>> -<br>> -  if (REG(&regs->BBB_I2C_IRQSTATUS_RAW) & AM335X_I2C_IRQSTATUS_RAW_BB)<br>> +  unsigned short stat;<br>> +  int timeout = I2C_TIMEOUT;<br>> +<br>> +  REG(&regs->BBB_I2C_IRQSTATUS)=0xffff;<br>> +  printf("REG(&regs->BBB_I2C_IRQSTATUS_RAW):%x\n",REG(&regs->BBB_I2C_IRQSTATUS_RAW) );<br>> + // printf("%x\n",0x1400 & 0x1000 );<br>> + printf("REG(&regs->BBB_I2C_IRQSTATUS_RAW) & AM335X_I2C_IRQSTATUS_RAW_BB:%x\n",(REG(&regs->BBB_I2C_IRQSTATUS_RAW) & AM335X_I2C_IRQSTATUS_RAW_BB));<br>> +while(stat =( REG(&regs->BBB_I2C_IRQSTATUS_RAW) & AM335X_I2C_IRQSTATUS_RAW_BB) && timeout--)<br>>    {<br>> -    status = true; <br>> -  } else {<br>> -    status = false;<br>> +<br>> +REG(&regs->BBB_I2C_IRQSTATUS)=stat;<br>> +    udelay(20);<br>> +<br>> +  }<br>> +<br>> +  if (timeout <= 0) {<br>> +    printf("Timed out in wait_for_bb: status=%04x\n",<br>> +           stat);<br>> +    return 1;<br>>    }<br>> -  return status; <br>> +  REG(&regs->BBB_I2C_IRQSTATUS)=0xffff;   /* clear delayed stuff*/<br>> +  return 0;<br>> +<br>>  }<br>>  <br>>  static void am335x_i2c_reset(bbb_i2c_bus *bus)<br>> @@ -330,9 +353,27 @@ static void am335x_i2c_reset(bbb_i2c_bus *bus)<br>>    printk("reset bus->reg is %x \n",bus->regs);<br>>    /* Disable I2C module at the time of initialization*/<br>>    /*Should I use write32 ?? I guess mmio_clear is correct choice here*/<br>> +  REG(&regs->BBB_I2C_CON)=0x00;<br>>    printk("inside BBB_I2C_CON value is %x \n",&regs->BBB_I2C_CON);<br>> -  mmio_clear((&regs->BBB_I2C_CON),AM335X_I2C_CON_I2C_EN);<br>> -  mmio_clear((&regs->BBB_I2C_SYSC),AM335X_I2C_SYSC_AUTOIDLE);  <br>> +   REG(&regs->BBB_I2C_SYSC)= 0x2;<br>> +//  mmio_clear((&regs->BBB_I2C_CON),AM335X_I2C_CON_I2C_EN);<br>> +<br>> +   REG(&regs->BBB_I2C_CON)= AM335X_I2C_CON_I2C_EN;<br>> +<br>> +   while((REG(&regs->BBB_I2C_SYSS) &I2C_SYSS_RDONE)==0)  //wait reset done<br>> +   {<br>> +    udelay(100);<br>> +<br>> +   }<br>> +<br>> +   REG(&regs->BBB_I2C_CON)=0x00;<br>> +<br>> +   am335x_i2c_set_clock(&bus->base, I2C_BUS_CLOCK_DEFAULT);<br>> +<br>> +   REG(&regs->BBB_I2C_CON)= AM335X_I2C_CON_MST | AM335X_I2C_CON_I2C_EN;<br>> +<br>> +//  mmio_clear((&regs->BBB_I2C_SYSC),AM335X_I2C_SYSC_AUTOIDLE); <br>> +<br>>    //REG(bus->regs + AM335X_I2C_CON) &= ~(AM335X_I2C_CON_I2C_EN);<br>>    //REG(bus->regs + AM335X_I2C_SYSC) &= ~(AM335X_I2C_SYSC_AUTOIDLE);<br>>    <br>> @@ -385,6 +426,7 @@ static unsigned int am335x_i2c_intrawstatus(volatile bbb_i2c_regs *regs)<br>>  <br>>  static void am335x_i2c_masterint_enable(volatile bbb_i2c_regs *regs, unsigned int flag)<br>>  {<br>> +  printf("am335x_i2c_masterint_enable func\n");<br>>    REG(&regs->BBB_I2C_IRQENABLE_SET) |= flag;<br>>  }<br>>  <br>> @@ -401,6 +443,7 @@ static void am335x_int_clear(volatile bbb_i2c_regs *regs, unsigned int flag)<br>>  <br>>  static void am335x_clean_interrupts(volatile bbb_i2c_regs *regs)<br>>  {<br>> +  printf("am335x_clean_interrupts func\n");<br>>    am335x_i2c_masterint_enable(regs,0x7FFF);<br>>    am335x_int_clear(regs,0x7FFF);<br>>    am335x_i2c_masterint_disable(regs,0x7FFF); <br>> @@ -412,30 +455,69 @@ static void am335x_i2c_setup_read_transfer(bbb_i2c_bus *bus, volatile bbb_i2c_re<br>>    volatile unsigned int no_bytes;<br>>    //am335x_i2c_masterint_enable(regs, AM335X_I2C_INT_RECV_READY);<br>>     // No of data to be transmitted at a time<br>> +<br>> +<br>> +//bbb_i2c_bus *bus = (bbb_i2c_bus *) base;<br>> +//  volatile bbb_i2c_regs *regs = bus->regs;<br>> +  struct am335x_baseboard_id header;<br>> +<br>> +  omap24_i2c_probe(&bus->base);<br>> +   read_eeprom(&bus->base,&header);<br>> +<br>> +/*<br>>    REG(&regs->BBB_I2C_CNT) = 0x02;<br>>    no_bytes = REG(&regs->BBB_I2C_CNT);<br>>  <br>> + // Set Slave address & Master enable, bring out of reset<br>> +  REG(&regs->BBB_I2C_SA) = msgs->addr;<br>> +  printf("slave address : %x\n",REG(&regs->BBB_I2C_SA));<br>> +<br>> +<br>>    // I2C Controller in Master Mode<br>> -  REG(&regs->BBB_I2C_CON) = AM335X_I2C_CFG_MST_TX | AM335X_I2C_CON_I2C_EN | AM335X_I2C_CON_START | AM335X_I2C_CON_MST;<br>> +  REG(&regs->BBB_I2C_CON) = AM335X_I2C_CFG_MST_TX  | AM335X_I2C_CON_MST | AM335X_I2C_CON_START | AM335X_I2C_CON_I2C_EN | AM335X_I2C_CON_STOP;<br>>    printk("set master in transmission mode %x \n",REG(&regs->BBB_I2C_CON));<br>>  <br>> -  // Set Slave address & Master enable, bring out of reset<br>> -  REG(&regs->BBB_I2C_SA) = msgs->addr;<br>> -  printf("slave address : %x\n",REG(&regs->BBB_I2C_SA));<br>> +while(am335x_i2c_busbusy(regs) != 0);<br>> +  printk("bus is free \n"); <br>> +<br>> +<br>> + <br>>  <br>>    // clear status of all interrupts<br>>    am335x_clean_interrupts(regs);<br>>    printk("\n set memory address to read\n");<br>>      <br>>    // transmit interrupt is enabled<br>> +<br>>    am335x_i2c_masterint_enable(regs,AM335X_I2C_IRQSTATUS_XRDY);<br>>    printk("Enable transmit interrupt \n");<br>> +<br>> +  <br>> +<br>>    //start condition <br>> -  REG(&regs->BBB_I2C_CON) |= AM335X_I2C_CON_START;<br>> +  REG(&regs->BBB_I2C_CON) |= AM335X_I2C_CON_START | AM335X_I2C_CON_I2C_EN;<br>>    printk("start transmission \n");<br>> -  while(am335x_i2c_busbusy(regs) == 0);<br>> -  printk("bus is free \n"); <br>> + <br>>    printk("CNT : %x\n", no_bytes);<br>> +  printf("BBB_I2C_DATA:%x\n", readb(&regs->BBB_I2C_DATA));<br>> +<br>> +writeb(0x5,&regs->BBB_I2C_DATA);<br>> +printf("(0x50 >> 8)& 0xff:%x\n",(0x50 >> 8)& 0xff);<br>> +printf("REG(&regs->BBB_I2C_DATA):%x\n",readb(&regs->BBB_I2C_DATA) );<br>> +printf("&regs->BBB_I2C_DATA:%x\n",&regs->BBB_I2C_DATA);<br>> +//REG(&regs->BBB_I2C_IRQSTATUS)=AM335X_I2C_IRQSTATUS_XRDY;<br>> +<br>> +udelay(10);<br>> +<br>> +writeb(0x0,&regs->BBB_I2C_DATA);<br>> +//REG(&regs->BBB_I2C_DATA)= ( (0x50 >> 0)& 0xff);<br>> +printf("(0x50 >> 0)& 0xff:%x\n",(0x50 >> 0)& 0xff);<br>> +printf("REG(&regs->BBB_I2C_DATA):%x\n",readb(&regs->BBB_I2C_DATA) );<br>> +<br>> +REG(&regs->BBB_I2C_IRQSTATUS)=AM335X_I2C_IRQSTATUS_XRDY;<br>> +<br>> +<br>> + // no_bytes = REG(&regs->BBB_I2C_CNT);<br>>    while(0 != no_bytes);<br>>    printk("total msg count for tranmission is zero \n");<br>>    while( !(am335x_i2c_intrawstatus(regs) & (AM335X_I2C_IRQSTATUS_ARDY)));<br>> @@ -464,6 +546,7 @@ static void am335x_i2c_setup_read_transfer(bbb_i2c_bus *bus, volatile bbb_i2c_re<br>>      REG(&regs->BBB_I2C_CON) |= AM335X_I2C_CON_START;<br>>    }<br>>    while(am335x_i2c_busbusy(regs) == 0);<br>> +  */<br>>    printk("Exit read transfer\n");<br>>  }<br>>  <br>> @@ -570,11 +653,16 @@ static void am335x_i2c_setup_transfer(bbb_i2c_bus *bus, volatile bbb_i2c_regs *r<br>>    }<br>>  <br>>    regs = bus->regs;<br>> -  <br>> -  REG(&bus->regs->BBB_I2C_BUF) |= AM335X_I2C_BUF_TXFIFO_CLR;<br>> -  REG(&bus->regs->BBB_I2C_BUF) |= AM335X_I2C_BUF_RXFIFO_CLR;<br>> -  am335x_i2c_set_address_size(msgs,regs);<br>> -  bus->read = ((bus->read == true) ? 0:1); <br>> +  printf("REG(&regs->BBB_I2C_DATA):%x\n",REG(&regs->BBB_I2C_DATA) );<br>> + // REG(&bus->regs->BBB_I2C_BUF) |= AM335X_I2C_BUF_TXFIFO_CLR;<br>> + // REG(&bus->regs->BBB_I2C_BUF) |= AM335X_I2C_BUF_RXFIFO_CLR;<br>> +printf("REG(&regs->BBB_I2C_DATA):%x\n",REG(&regs->BBB_I2C_DATA) );<br>> +<br>> + // am335x_i2c_set_address_size(msgs,regs);<br>> +bus->read = (msgs->flags & I2C_M_RD) != 0;<br>> +<br>> +printf("bus->read:%d\n",bus->read );<br>> +  //bus->read = ((bus->read == true) ? 0:1); <br>>    bus->already_transferred = (bus->read == true) ? 0 : 1;<br>>  <br>>    if (bus->read) {<br>> @@ -652,7 +740,7 @@ static int am335x_i2c_transfer(i2c_bus *base, i2c_msg *msgs, uint32_t msg_count)<br>>    bbb_i2c_bus *bus = (bbb_i2c_bus *)base;<br>>    volatile bbb_i2c_regs *regs;<br>>    uint32_t i;<br>> - printk("\n enter transfer ");<br>> + printk("\n enter transfer\n ");<br>>    rtems_task_wake_after(1);<br>>    <br>>  <br>> @@ -665,20 +753,23 @@ static int am335x_i2c_transfer(i2c_bus *base, i2c_msg *msgs, uint32_t msg_count)<br>>          return -EINVAL;<br>>        }<br>>    }<br>> -  <br>> +  printf("bus->regs:%x\n",bus->regs );<br>>    bus->msgs = &msgs[0];<br>>    bus->msg_todo = msg_count;<br>>    printk("total msg = msg_count : %x \n",bus->msg_todo);<br>>    bus->current_msg_todo = msgs[0].len;// current data size<br>> -  bus->current_msg_byte = msgs[0].buf;// current data<br>> +  //bus->current_msg_byte = msgs[0].buf;// current data<br>>    printk("\n current_msg_todo %x \n ",msgs[0].len);<br>>    printk("\n current_msg_byte %x \n ",msgs[0].buf);<br>> +  //printf("8011A5CC:%x\n",  *(unsigned int *)(0x8011A5CC) );<br>>    bus->task_id = rtems_task_self();<br>>  <br>>    regs = bus->regs;<br>> -  am335x_i2c_setup_transfer(bus,regs);<br>> -  REG(&regs->BBB_I2C_IRQENABLE_SET) = BBB_I2C_IRQ_USED;<br>>  <br>> + // REG(&regs->BBB_I2C_IRQENABLE_SET) = BBB_I2C_IRQ_USED;<br>> +  am335x_i2c_setup_transfer(bus,regs);<br>> +  <br>> +/*<br>>    sc = rtems_event_transient_receive(RTEMS_WAIT, bus->base.timeout);<br>>    // If timeout then return timeout error<br>>    if (sc != RTEMS_SUCCESSFUL) {<br>> @@ -688,7 +779,9 @@ static int am335x_i2c_transfer(i2c_bus *base, i2c_msg *msgs, uint32_t msg_count)<br>>  <br>>      return -ETIMEDOUT;<br>>    }<br>> +   */<br>>    printk("exit transfer\n");<br>> +<br>>    // return bus->regs->BBB_I2C_IRQSTATUS == 0 ? 0 : -EIO;<br>>    return 0;<br>>  }<br>> @@ -700,19 +793,28 @@ static int am335x_i2c_set_clock(i2c_bus *base, unsigned long clock)<br>>    uint32_t prescaler,divider;<br>>  <br>>    printk("set clock start\n"); <br>> +  REG(&regs->BBB_I2C_CON)=0;<br>> +<br>>    prescaler = (BBB_I2C_SYSCLK / BBB_I2C_INTERNAL_CLK) -1;<br>> +  printf("prescaler:%d\n",prescaler );<br>>    printk("PSC offset %x \n ",&regs->BBB_I2C_PSC);<br>>    printk("PSC offset %x \n", &bus->regs->BBB_I2C_PSC);<br>>    //mmio_write((&regs->BBB_I2C_PSC), prescaler);<br>>    REG(&bus->regs->BBB_I2C_PSC) = prescaler;<br>>    <br>>    divider = BBB_I2C_INTERNAL_CLK/(2*clock);<br>> +  printf("divider:%d\n", divider);<br>>    printk("SCLL offset %x \n",&bus->regs->BBB_I2C_SCLL); <br>>    //mmio_write((&regs->BBB_I2C_SCLL), (divider - 7));<br>>    REG(&bus->regs->BBB_I2C_SCLL) = (divider - 7);<br>>    //mmio_write((&regs->BBB_I2C_SCLH), (divider - 5));<br>>    printk("SCHL offset %x\n",&bus->regs->BBB_I2C_SCLH);<br>>    REG(&bus->regs->BBB_I2C_SCLH) = (divider - 5);<br>> +<br>> + REG(&regs->BBB_I2C_CON)=I2C_CON_EN;<br>> +<br>> +writew(0xFFFF, &bus->regs->BBB_I2C_IRQSTATUS);  /* clear all pending status */<br>> +<br>>    printk("set clock end \n");<br>>    return 0;<br>>  }<br>> @@ -729,6 +831,8 @@ static void am335x_i2c_destroy(i2c_bus *base)<br>>    i2c_bus_destroy_and_free(&bus->base);<br>>  }<br>>  <br>> +<br>> +<br>>  int am335x_i2c_bus_register(<br>>    const char *bus_path,<br>>    uintptr_t register_base,<br>> @@ -751,14 +855,15 @@ int am335x_i2c_bus_register(<br>>    bus->regs = (volatile bbb_i2c_regs *) register_base;<br>>   <br>>  // 1. Enable clock for I2CX<br>> -  I2C0ModuleClkConfig();<br>> + I2C0ModuleClkConfig();<br>>  // 2. pinmux setup<br>>    am335x_i2c0_pinmux(bus);<br>>  // 3. RESET : Disable Master, autoideal <br>> -  am335x_i2c_reset(bus);<br>> + // am335x_i2c_reset(bus);<br>>  // 4. configure bus speed  <br>>    bus->input_clock = input_clock; // By default 100KHz. Normally pass 100KHz as argument <br>>   <br>> +/*<br>>    printk("Before set clock \n"); <br>>    err = am335x_i2c_set_clock(&bus->base, I2C_BUS_CLOCK_DEFAULT);<br>>   <br>> @@ -768,12 +873,16 @@ int am335x_i2c_bus_register(<br>>      rtems_set_errno_and_return_minus_one(-err);<br>>    }<br>>     bus->irq = irq;<br>> -  <br>> +  */<br>> +omap24_i2c_init(&bus->base);<br>> +<br>>    //bring I2C out of reset<br>>  <br>> -   REG(&bus->regs->BBB_I2C_CON) |= AM335X_I2C_CON_I2C_EN;<br>> +//printf("REG(&regs->BBB_I2C_IRQSTATUS):%x\n",REG(&bus->regs->BBB_I2C_IRQSTATUS));<br>> +  // REG(&bus->regs->BBB_I2C_CON) |= AM335X_I2C_CON_I2C_EN;<br>>   <br>>    // 5. Start interrupt service routine & one interrupt at a time <br>> +/*<br>>    sc  = rtems_interrupt_handler_install(<br>>      irq,<br>>      "BBB I2C",<br>> @@ -787,6 +896,7 @@ int am335x_i2c_bus_register(<br>>   <br>>      rtems_set_errno_and_return_minus_one(EIO);<br>>    }<br>> +  */<br>>    // 6. start transfer for reading and writing <br>>    bus->base.transfer = am335x_i2c_transfer;<br>>    bus->base.set_clock = am335x_i2c_set_clock;<br>> @@ -794,3 +904,499 @@ int am335x_i2c_bus_register(<br>>    printk("exit register\n");<br>>    return i2c_bus_register(&bus->base,bus_path);<br>>  }<br>> +<br>> +<br>> +<br>> +<br>> +<br>> +<br>> +static void omap24_i2c_init(i2c_bus *base)<br>> +{<br>> +   bbb_i2c_bus *bus = (bbb_i2c_bus *) base;<br>> +  volatile bbb_i2c_regs *regs = bus->regs;<br>> +<br>> +  struct am335x_baseboard_id header;<br>> + <br>> +  int timeout = I2C_TIMEOUT;<br>> +  int deblock = 1;<br>> +printf("omap24_i2c_init func!!!!!!\n");<br>> +retry:<br>> +  if (readw(&bus->regs->BBB_I2C_CON) & I2C_CON_EN) {<br>> +    writew(0, &bus->regs->BBB_I2C_CON);<br>> +    udelay(50000);<br>> +  }<br>> +<br>> +  writew(0x2, &bus->regs->BBB_I2C_SYSC); /* for ES2 after soft reset */<br>> +  udelay(1000);<br>> +<br>> +  writew(I2C_CON_EN, &bus->regs->BBB_I2C_CON);<br>> +  while (!(readw(&bus->regs->BBB_I2C_SYSS) & I2C_SYSS_RDONE) && timeout--) {<br>> +    if (timeout <= 0) {<br>> +      puts("ERROR: Timeout in soft-reset\n");<br>> +      return;<br>> +    }<br>> +    udelay(1000);<br>> +  }<br>> +<br>> +am335x_i2c_set_clock(&bus->base, I2C_BUS_CLOCK_DEFAULT);<br>> +<br>> +  /* own address */<br>> +  writew(1, &bus->regs->BBB_I2C_OA);<br>> +<br>> +//#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)<br>> +  /*<br>> +   * Have to enable interrupts for OMAP2/3, these IPs don't have<br>> +   * an 'irqstatus_raw' register and we shall have to poll 'stat'<br>> +   */<br>> + // writew(I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE | I2C_IE_NACK_IE | I2C_IE_AL_IE, &i2c_base->ie);<br>> +//#endif<br>> +  udelay(1000);<br>> +  flush_fifo(&bus->base);<br>> +  writew(0xFFFF, &bus->regs->BBB_I2C_IRQSTATUS);<br>> +<br>> +  /* Handle possible failed I2C state */<br>> +  if (wait_for_bb(&bus->base))<br>> +    if (deblock == 1) {<br>> +<br>> +      //omap24_i2c_deblock(&bus->base);<br>> +      printf("deblock\n");<br>> +      deblock = 0;<br>> +      goto retry;<br>> +    }<br>> +<br>> +<br>> +  //  omap24_i2c_probe(&bus->base);<br>> + //  read_eeprom(&bus->base,&header);<br>> +    <br>> +}<br>> +<br>> +<br>> +static void flush_fifo(i2c_bus *base)<br>> +{<br>> +  bbb_i2c_bus *bus = (bbb_i2c_bus *) base;<br>> +  volatile bbb_i2c_regs *regs = bus->regs;<br>> +<br>> + <br>> +  u16 stat;<br>> +printf("flush_fifo\n");<br>> +  /*<br>> +   * note: if you try and read data when its not there or ready<br>> +   * you get a bus error<br>> +   */<br>> +  while (1) {<br>> +    stat = readw(&bus->regs->BBB_I2C_IRQSTATUS);<br>> +    if (stat == I2C_STAT_RRDY) {<br>> +      readb(&bus->regs->BBB_I2C_DATA);<br>> +      writew(I2C_STAT_RRDY, &bus->regs->BBB_I2C_IRQSTATUS);<br>> +      udelay(1000);<br>> +    } else<br>> +      break;<br>> +  }<br>> +}<br>> +<br>> +<br>> +static int wait_for_bb(i2c_bus *base)<br>> +{<br>> +  bbb_i2c_bus *bus = (bbb_i2c_bus *) base;<br>> +  volatile bbb_i2c_regs *regs = bus->regs;<br>> +<br>> +<br>> +  int timeout = I2C_TIMEOUT;<br>> +  u16 stat;<br>> +printf("wait_for_bb\n");<br>> +  writew(0xFFFF, &bus->regs->BBB_I2C_IRQSTATUS);  /* clear current interrupts...*/<br>> +//printf("test1\n");<br>> +  /* Read RAW status */<br>> +//printf("%x\n", readw(&bus->regs->BBB_I2C_IRQSTATUS_RAW) & I2C_STAT_BB);<br>> +  while ((stat = readw(&bus->regs->BBB_I2C_IRQSTATUS_RAW) &<br>> +    I2C_STAT_BB) && timeout--) {<br>> +<br>> +    writew(stat, &bus->regs->BBB_I2C_IRQSTATUS);<br>> +    udelay(200);<br>> +  }<br>> +<br>> +  if (timeout <= 0) {<br>> +    printf("Timed out in wait_for_bb: status=%04x\n",<br>> +           stat);<br>> +    return 1;<br>> +  }<br>> +  writew(0xFFFF, &bus->regs->BBB_I2C_IRQSTATUS);   /* clear delayed stuff*/<br>> +  return 0;<br>> +}<br>> +<br>> +<br>> +static int omap24_i2c_probe(i2c_bus *base)<br>> +{<br>> + bbb_i2c_bus *bus = (bbb_i2c_bus *) base;<br>> +  volatile bbb_i2c_regs *regs = bus->regs;<br>> +<br>> +  unsigned char chip = 0x50;<br>> +  u16 status;<br>> +  int res = 1; /* default = fail */<br>> +<br>> +printf("omap24_i2c_probe\n");<br>> +  if (chip == readw(&bus->regs->BBB_I2C_OA))<br>> +    return res;<br>> +<br>> +  /* Wait until bus is free */<br>> +  if (wait_for_bb(&bus->base))<br>> +    return res;<br>> +<br>> +  /* No data transfer, slave addr only */<br>> +  writew(chip, &bus->regs->BBB_I2C_SA);<br>> +  /* Stop bit needed here */<br>> +  writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |<br>> +         I2C_CON_STP, &bus->regs->BBB_I2C_CON);<br>> +<br>> +  status = wait_for_event(&bus->base);<br>> +<br>> +  if ((status & ~I2C_STAT_XRDY) == 0 || (status & I2C_STAT_AL)) {<br>> +    /*<br>> +     * With current high-level command implementation, notifying<br>> +     * the user shall flood the console with 127 messages. If<br>> +     * silent exit is desired upon unconfigured bus, remove the<br>> +     * following 'if' section:<br>> +     */<br>> +    if (status == I2C_STAT_XRDY)<br>> +      printf("i2c_probe: pads on bus probably not configured (status=0x%x)\n",status);<br>> +<br>> +    goto pr_exit;<br>> +  }<br>> +<br>> +  /* Check for ACK (!NAK) */<br>> +  if (!(status & I2C_STAT_NACK)) {<br>> +    printf("Device found\n");<br>> +    res = 0;        /* Device found */<br>> +    udelay(200);/* Required by AM335X in SPL */<br>> +    /* Abort transfer (force idle state) */<br>> +    writew(I2C_CON_MST | I2C_CON_TRX, &bus->regs->BBB_I2C_CON); /* Reset */<br>> +    udelay(1000);<br>> +    writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_TRX |<br>> +           I2C_CON_STP, &bus->regs->BBB_I2C_CON);    /* STP */<br>> +  }<br>> +pr_exit:<br>> +  flush_fifo(&bus->base);<br>> +  writew(0xFFFF, &bus->regs->BBB_I2C_IRQSTATUS);<br>> +  return res;<br>> +}<br>> +<br>> +<br>> +static u16 wait_for_event(i2c_bus *base)<br>> +{<br>> +  bbb_i2c_bus *bus = (bbb_i2c_bus *) base;<br>> +  volatile bbb_i2c_regs *regs = bus->regs;<br>> +<br>> + <br>> +  u16 status;<br>> +  int timeout = I2C_TIMEOUT;<br>> +//printf("wait_for_event \n");<br>> +  do {<br>> +    udelay(200);<br>> +<br>> +    /* Read RAW status */<br>> +    status = readw(&bus->regs->BBB_I2C_IRQSTATUS_RAW);<br>> +<br>> +  } while (!(status &<br>> +       (I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY |<br>> +        I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK |<br>> +        I2C_STAT_AL)) && timeout--);<br>> +<br>> +  if (timeout <= 0) {<br>> +    printf("Timed out in wait_for_event: status=%04x\n",<br>> +           status);<br>> +    /*<br>> +     * If status is still 0 here, probably the bus pads have<br>> +     * not been configured for I2C, and/or pull-ups are missing.<br>> +     */<br>> +    printf("Check if pads/pull-ups of bus are properly configured\n");<br>> +    writew(0xFFFF, &bus->regs->BBB_I2C_IRQSTATUS);<br>> +    status = 0;<br>> +  }<br>> +<br>> +  return status;<br>> +}<br>> +<br>> +<br>> +<br>> +<br>> +static int am335x_i2c_read(i2c_bus *base, unsigned char chip, uint addr, int alen, unsigned char *buffer, <br>> +                           int len)<br>> +{<br>> +<br>> +  bbb_i2c_bus *bus = (bbb_i2c_bus *) base;<br>> +  volatile bbb_i2c_regs *regs = bus->regs;<br>> +<br>> +  int i2c_error = 0;<br>> +  int i=0;<br>> +  u16 status;<br>> +printf("am335x_i2c_read\n");<br>> +  if (alen < 0) {<br>> +    puts("I2C read: addr len < 0\n");<br>> +    return 1;<br>> +  }<br>> +  if (len < 0) {<br>> +    puts("I2C read: data len < 0\n");<br>> +    return 1;<br>> +  }<br>> +  if (buffer == NULL) {<br>> +    puts("I2C read: NULL pointer passed\n");<br>> +    return 1;<br>> +  }<br>> +<br>> +  if (alen > 2) {<br>> +    printf("I2C read: addr len %d not supported\n", alen);<br>> +    return 1;<br>> +  }<br>> +<br>> +  if (addr + len > (1 << 16)) {<br>> +    puts("I2C read: address out of range\n");<br>> +    return 1;<br>> +  }<br>> +<br>> +  /* Wait until bus not busy */<br>> +  if (wait_for_bb(&bus->base))<br>> +    return 1;<br>> +//printf("test2\n");<br>> +  /* Zero, one or two bytes reg address (offset) */<br>> +  writew(alen, &bus->regs->BBB_I2C_CNT);<br>> +  /* Set slave address */<br>> +  writew(chip, &bus->regs->BBB_I2C_SA);<br>> +//printf("test3\n");<br>> +  if (alen) {<br>> +    /* Must write reg offset first */<br>> +<br>> +    /* Stop - Start (P-S) */<br>> +    writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP |<br>> +           I2C_CON_TRX, &bus->regs->BBB_I2C_CON);<br>> +<br>> +    /* Send register offset */<br>> +    while (1) {<br>> +      status = wait_for_event(&bus->base);<br>> +      printf("status:%x\n",status );<br>> +      /* Try to identify bus that is not padconf'd for I2C */<br>> +      if (status == I2C_STAT_XRDY) {<br>> +        i2c_error = 2;<br>> +        printf("i2c_read (addr phase): pads on bus probably not configured (status=0x%x)\n",<br>> +              status);<br>> +        goto rd_exit;<br>> +      }<br>> +      if (status == 0 || (status & I2C_STAT_NACK)) {<br>> +        i2c_error = 1;<br>> +        printf("i2c_read: error waiting for addr ACK (status=0x%x)\n",<br>> +               status);<br>> +        goto rd_exit;<br>> +      }<br>> +      if (alen) {<br>> +        if (status & I2C_STAT_XRDY) {<br>> +      //    printf("alen:%d\n",alen );<br>> +          alen--;<br>> +      //    printf("alen:%d\n",alen );<br>> +      //    printf("addr:%x\n",addr );<br>> +      //    printf("(addr >> (8 * alen)) & 0xff:%x\n",(addr >> (8 * alen)) & 0xff );<br>> +          /* Do we have to use byte access? */<br>> +          writeb((addr >> (8 * alen)) & 0xff,<br>> +                 &bus->regs->BBB_I2C_DATA);<br>> +          writew(I2C_STAT_XRDY, &bus->regs->BBB_I2C_IRQSTATUS);<br>> +        }<br>> +      }<br>> +      if (status & I2C_STAT_ARDY) {<br>> +        writew(I2C_STAT_ARDY, &bus->regs->BBB_I2C_IRQSTATUS);<br>> +        break;<br>> +      }<br>> +    }<br>> +  }<br>> +  /* Set slave address */<br>> +  writew(chip, &bus->regs->BBB_I2C_SA);<br>> +  /* Read len bytes from slave */<br>> +  writew(len, &bus->regs->BBB_I2C_CNT);<br>> +  /* Need stop bit here */<br>> +  writew(I2C_CON_EN | I2C_CON_MST |<br>> +         I2C_CON_STT | I2C_CON_STP,<br>> +         &bus->regs->BBB_I2C_CON);<br>> +//printf("test4\n");<br>> +<br>> +<br>> +  /* Receive data */<br>> +  while (1) {<br>> +    status = wait_for_event(&bus->base);<br>> + //   printf("test 5\n");<br>> +    /*<br>> +     * Try to identify bus that is not padconf'd for I2C. This<br>> +     * state could be left over from previous transactions if<br>> +     * the address phase is skipped due to alen=0.<br>> +     */<br>> +    if (status == I2C_STAT_XRDY) {<br>> +      i2c_error = 2;<br>> +      printf("i2c_read (data phase): pads on bus probably not configured (status=0x%x)\n",<br>> +              status);<br>> +      goto rd_exit;<br>> +    }<br>> +    if (status == 0 || (status & I2C_STAT_NACK)) {<br>> +     // printf("i2c_error = 1\n");<br>> +      i2c_error = 1;<br>> +      goto rd_exit;<br>> +    }<br>> +    if (status & I2C_STAT_RRDY) {<br>> +      char temp;<br>> +      temp=readb(&bus->regs->BBB_I2C_DATA);<br>> +      *buffer++ =temp; <br>> +<br>> +     *bus->msgs[0].buf++=temp;<br>> +  //   (*(uint8_t *) bus->current_msg_byte[0]) = readb(&bus->regs->BBB_I2C_DATA) & 0xFF;<br>> +      i++;<br>> +      writew(I2C_STAT_RRDY, &bus->regs->BBB_I2C_IRQSTATUS);<br>> +    }<br>> +    if (status & I2C_STAT_ARDY) {<br>> +      writew(I2C_STAT_ARDY, &bus->regs->BBB_I2C_IRQSTATUS);<br>> +      break;<br>> +    }<br>> +  }<br>> +<br>> +rd_exit:<br>> +//printf("rd_exit\n");<br>> +//printf("i2c_error:%d\n",i2c_error);<br>> +  flush_fifo(&bus->base);<br>> +  writew(0xFFFF, &bus->regs->BBB_I2C_IRQSTATUS);<br>> +  return i2c_error;<br>> +}<br>> +<br>> +<br>> +<br>> +static int read_eeprom(i2c_bus *base,struct am335x_baseboard_id *header)<br>> +{<br>> +<br>> +bbb_i2c_bus *bus = (bbb_i2c_bus *) base;<br>> +  volatile bbb_i2c_regs *regs = bus->regs;<br>> +<br>> +printf("sizeof(struct am335x_baseboard_id):%d\n",sizeof(struct am335x_baseboard_id) );<br>> +//printf("sizeof(struct am335x_baseboard_id):%d\n",sizeof(unsigned int) );<br>> +//printf("sizeof(struct am335x_baseboard_id):%d\n",sizeof(unsigned int) );<br>> + am335x_i2c_read(&bus->base,0x50,0,2,(unsigned char *)header,sizeof(struct am335x_baseboard_id));<br>> +/*<br>> +printf("am335x_i2c_read end\n");<br>> +    printf("header->magic:%x\n", header->magic);<br>> +     printf("header->name[0]:%x\n", header->name[0]);<br>> +      printf("header->name[1]:%x\n", header->name[1]);<br>> +     printf("header->name[2]:%x\n", header->name[2]);<br>> +      printf("header->name[3]:%x\n", header->name[3]);<br>> +       printf("header->name[4]:%x\n", header->name[4]);<br>> +        printf("header->name[5]:%x\n", header->name[5]);<br>> +         printf("header->name[6]:%x\n", header->name[6]);<br>> +          printf("header->name[7]:%x\n", header->name[7]);<br>> +          */<br>> +}<br>> +<br>> +<br>> +<br>> +static int am335x_i2c_write(i2c_bus *base, unsigned char chip, uint addr,int alen, unsigned char *buffer, <br>> +                            int len)<br>> +{<br>> +<br>> +  bbb_i2c_bus *bus = (bbb_i2c_bus *) base;<br>> +  volatile bbb_i2c_regs *regs = bus->regs;<br>> +<br>> +  int i;<br>> +  u16 status;<br>> +  int i2c_error = 0;<br>> +  int timeout = I2C_TIMEOUT;<br>> +<br>> +  if (alen < 0) {<br>> +    puts("I2C write: addr len < 0\n");<br>> +    return 1;<br>> +  }<br>> +<br>> +  if (len < 0) {<br>> +    puts("I2C write: data len < 0\n");<br>> +    return 1;<br>> +  }<br>> +<br>> +  if (buffer == NULL) {<br>> +    puts("I2C write: NULL pointer passed\n");<br>> +    return 1;<br>> +  }<br>> +<br>> +  if (alen > 2) {<br>> +    printf("I2C write: addr len %d not supported\n", alen);<br>> +    return 1;<br>> +  }<br>> +<br>> +  if (addr + len > (1 << 16)) {<br>> +    printf("I2C write: address 0x%x + 0x%x out of range\n",<br>> +           addr, len);<br>> +    return 1;<br>> +  }<br>> +<br>> +  /* Wait until bus not busy */<br>> +  if (wait_for_bb(&bus->base))<br>> +    return 1;<br>> +<br>> +  /* Start address phase - will write regoffset + len bytes data */<br>> +  writew(alen + len, &bus->regs->BBB_I2C_CNT);<br>> +  /* Set slave address */<br>> +  writew(chip,&bus->regs->BBB_I2C_SA);<br>> +  /* Stop bit needed here */<br>> +  writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |<br>> +         I2C_CON_STP,&bus->regs->BBB_I2C_CON);<br>> +<br>> +  while (alen) {<br>> +    /* Must write reg offset (one or two bytes) */<br>> +    status = wait_for_event(&bus->base);<br>> +    /* Try to identify bus that is not padconf'd for I2C */<br>> +    if (status == I2C_STAT_XRDY) {<br>> +      i2c_error = 2;<br>> +      printf("i2c_write: pads on bus probably not configured (status=0x%x)\n",status);<br>> +      goto wr_exit;<br>> +    }<br>> +    if (status == 0 || (status & I2C_STAT_NACK)) {<br>> +      i2c_error = 1;<br>> +      printf("i2c_write: error waiting for addr ACK (status=0x%x)\n",<br>> +             status);<br>> +      goto wr_exit;<br>> +    }<br>> +    if (status & I2C_STAT_XRDY) {<br>> +      alen--;<br>> +      writeb((addr >> (8 * alen)) & 0xff, &bus->regs->BBB_I2C_DATA);<br>> +      writew(I2C_STAT_XRDY, &bus->regs->BBB_I2C_IRQSTATUS);<br>> +    } else {<br>> +      i2c_error = 1;<br>> +      printf("i2c_write: bus not ready for addr Tx (status=0x%x)\n",<br>> +             status);<br>> +      goto wr_exit;<br>> +    }<br>> +  }<br>> +  /* Address phase is over, now write data */<br>> +  for (i = 0; i < len; i++) {<br>> +    status = wait_for_event(&bus->base);<br>> +    if (status == 0 || (status & I2C_STAT_NACK)) {<br>> +      i2c_error = 1;<br>> +      printf("i2c_write: error waiting for data ACK (status=0x%x)\n",<br>> +             status);<br>> +      goto wr_exit;<br>> +    }<br>> +    if (status & I2C_STAT_XRDY) {<br>> +      writeb(buffer[i], &bus->regs->BBB_I2C_DATA);<br>> +      writew(I2C_STAT_XRDY, &bus->regs->BBB_I2C_IRQSTATUS);<br>> +    } else {<br>> +      i2c_error = 1;<br>> +      printf("i2c_write: bus not ready for data Tx (i=%d)\n",<br>> +             i);<br>> +      goto wr_exit;<br>> +    }<br>> +  }<br>> +  /*<br>> +   * poll ARDY bit for making sure that last byte really has been<br>> +   * transferred on the bus.<br>> +   */<br>> +  do {<br>> +    status = wait_for_event(&bus->base);<br>> +  } while (!(status & I2C_STAT_ARDY) && timeout--);<br>> +  if (timeout <= 0)<br>> +    printf("i2c_write: timed out writig last byte!\n");<br>> +<br>> +wr_exit:<br>> +  flush_fifo(&bus->base);<br>> +  writew(0xFFFF, &bus->regs->BBB_I2C_IRQSTATUS);<br>> +  return i2c_error;<br>> +}<br>> +<br>> +<br>> diff --git a/c/src/lib/libbsp/arm/beagle/include/i2c.h b/c/src/lib/libbsp/arm/beagle/include/i2c.h<br>> index d4a9e32..6c924ee 100644<br>> --- a/c/src/lib/libbsp/arm/beagle/include/i2c.h<br>> +++ b/c/src/lib/libbsp/arm/beagle/include/i2c.h<br>> @@ -132,11 +132,11 @@ extern "C" {<br>>  <br>>  <br>>  #define DISP_LINE_LEN 128<br>> -#define I2C_TIMEOUT 1000<br>> +#define I2C_TIMEOUT 1001<br>>  <br>>  #define I2C_BUS_MAX 3<br>>  <br>> -#define I2C_BASE1         (OMAP34XX_CORE_L4_IO_BASE + 0x070000)<br>> +#define I2C_BASE1         (OMAP34XX_CORE_L4_IO_BASE + 0x070000) //0x48000000+0x070000<br>>  <br>>  #define I2C_DEFAULT_BASE      I2C_BASE1<br>>  <br>> @@ -356,7 +356,7 @@ static inline rtems_status_code beagle_i2c_read(<br>>      | AM335X_I2C_IRQSTATUS_ARDY \<br>>      | AM335X_I2C_IRQSTATUS_RRDY \<br>>      | AM335X_I2C_IRQSTATUS_XRDY \<br>> -    | AM335X_I2C_IRQSTATUS_XUDF)<br>> +    | AM335X_I2C_IRQSTATUS_XUDF )<br>>  <br>>  #define BBB_I2C_IRQ_USED \<br>>    ( BBB_I2C_IRQ_ERROR \<br>> @@ -478,6 +478,18 @@ static inline int bbb_register_i2c_2(void)<br>>  }<br>>  <br>>  <br>> +struct am335x_baseboard_id {<br>> + unsigned int  magic;<br>> +       char name[8];<br>> +   char version[4];<br>> +        char serial[12];<br>> +        char config[32];<br>> +        char mac_addr[3][6];<br>> +};<br>> +<br>> +<br>> +<br>> +<br>>  #ifdef __cplusplus<br>>  }<br>>  #endif /* __cplusplus */<br>> diff --git a/cpukit/dev/i2c/eeprom.c b/cpukit/dev/i2c/eeprom.c<br>> index 39cff95..15040af 100644<br>> --- a/cpukit/dev/i2c/eeprom.c<br>> +++ b/cpukit/dev/i2c/eeprom.c<br>> @@ -55,6 +55,7 @@ static ssize_t eeprom_read(<br>>    off_t offset<br>>  )<br>>  {<br>> +<br>>    eeprom *dev = (eeprom *) base;<br>>    off_t avail = dev->size - offset;<br>>    uint32_t off = (uint32_t) offset;<br>> @@ -86,6 +87,17 @@ static ssize_t eeprom_read(<br>>        (uint8_t) (off >> 16),<br>>        (uint8_t) (off >> 24)<br>>      };<br>> +<br>> +    i2c_msg msgs[1] = {<br>> +        {<br>> +        .addr = i2c_addr,<br>> +        .flags = I2C_M_RD,<br>> +        .buf = in,<br>> +        .len = cur<br>> +      }<br>> +    };<br>> +    <br>> +    /*<br>>      i2c_msg msgs[2] = {<br>>        {<br>>          .addr = i2c_addr,<br>> @@ -99,14 +111,22 @@ static ssize_t eeprom_read(<br>>          .len = cur<br>>        }<br>>      };<br>> +    <br>> +<br>> +    */<br>>      int err;<br>> +    <br>> +    <br>>  <br>>      err = i2c_bus_transfer(dev->base.bus, &msgs[0], RTEMS_ARRAY_SIZE(msgs));<br>> +<br>> +    <br>>      if (err != 0) {<br>>        return err;<br>>      }<br>> -<br>> +  <br>>      todo -= cur;<br>> +<br>>      off += cur;<br>>      in += cur;<br>>    }<br>> @@ -236,7 +256,7 @@ int i2c_dev_register_eeprom(<br>>    }<br>>  <br>>    if (program_timeout_in_ms == 0) {<br>> -    program_timeout_in_ms = 1000;<br>> +    program_timeout_in_ms = 5000;<br>>    }<br>>  <br>>    dev = (eeprom *)<br>> diff --git a/testsuites/samples/i2c0/init.c b/testsuites/samples/i2c0/init.c<br>> index b428216..70bbe12 100644<br>> --- a/testsuites/samples/i2c0/init.c<br>> +++ b/testsuites/samples/i2c0/init.c<br>> @@ -23,10 +23,62 @@<br>>  #include <rtems/score/assert.h><br>>  #include <dev/i2c/eeprom.h><br>>  <br>> +#include <rtems/shell.h><br>> +#include <stdio.h><br>> +#include <stdarg.h><br>> +#include <stdlib.h><br>> +#include <string.h><br>> +#include <errno.h><br>> +#include <rtems/userenv.h><br>> +<br>> +#define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER<br>> +#define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER<br>> +#define CONFIGURE_APPLICATION_NEEDS_STUB_DRIVER<br>> +#define CONFIGURE_APPLICATION_NEEDS_ZERO_DRIVER<br>> +#define CONFIGURE_APPLICATION_NEEDS_LIBBLOCK<br>> +<br>> +#define CONFIGURE_USE_IMFS_AS_BASE_FILESYSTEM<br>> +<br>> +#define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32<br>> +<br>> +#define CONFIGURE_MAXIMUM_USER_EXTENSIONS 1<br>> +<br>> +#define CONFIGURE_UNLIMITED_ALLOCATION_SIZE 32<br>> +#define CONFIGURE_UNLIMITED_OBJECTS<br>> +#define CONFIGURE_UNIFIED_WORK_AREAS<br>> +<br>> +#define CONFIGURE_STACK_CHECKER_ENABLED<br>> +<br>> +#define CONFIGURE_RTEMS_INIT_TASKS_TABLE<br>> +<br>> +#define CONFIGURE_INIT_TASK_INITIAL_MODES RTEMS_DEFAULT_MODES<br>> +#define CONFIGURE_INIT_TASK_ATTRIBUTES RTEMS_FLOATING_POINT<br>> +<br>> +#define CONFIGURE_INIT<br>> +<br>> +#include <rtems/confdefs.h><br>> +<br>> +<br>> +#define CONFIGURE_SHELL_COMMAND_CP<br>> +#define CONFIGURE_SHELL_COMMAND_PWD<br>> +#define CONFIGURE_SHELL_COMMAND_LS<br>> +#define CONFIGURE_SHELL_COMMAND_LN<br>> +#define CONFIGURE_SHELL_COMMAND_LSOF<br>> +#define CONFIGURE_SHELL_COMMAND_CHDIR<br>> +#define CONFIGURE_SHELL_COMMAND_CD<br>> +#define CONFIGURE_SHELL_COMMAND_MKDIR<br>> +#define CONFIGURE_SHELL_COMMAND_RMDIR<br>> +#define CONFIGURE_SHELL_COMMAND_CAT<br>> +#define CONFIGURE_SHELL_COMMAND_MV<br>> +#define CONFIGURE_SHELL_COMMAND_RM<br>> +#define CONFIGURE_SHELL_COMMAND_MALLOC_INFO<br>> +#include <rtems/shellconfig.h><br>> +<br>> +<br>>  /* I2C address of CAT24C256 eeprom<br>>     EEPROM SIZE 32 KB Ref: BBB SRM */<br>>  #define I2C_SLAVE_ADDR         (0x50)<br>> -#define EEPROM_SIZE 256<br>> +#define EEPROM_SIZE 78<br>>  #define EEPROM_PATH "/dev/i2c-0.eeprom"<br>>  <br>>  /* forward declarations to avoid warnings */<br>> @@ -35,16 +87,23 @@ rtems_task Init(rtems_task_argument argument);<br>>  const char rtems_test_name[] = "GSOC 2016 I2C TESTING";<br>>  rtems_printer rtems_test_printer;<br>>  <br>> +<br>>  rtems_task Init(<br>>    rtems_task_argument ignored<br>>  )<br>>  {<br>> +  <br>>    rtems_test_begin();<br>>    int i;<br>>    int rv,fd_bus,fd_in_dev;<br>>    uint8_t in[EEPROM_SIZE];<br>>    struct stat st;<br>>    off_t off;<br>> +  ssize_t n;<br>> +<br>> +  rtems_shell_env_t env;<br>> +<br>> +  <br>>  <br>>    /*bus registration */<br>>    rv = bbb_register_i2c_0();<br>> @@ -64,23 +123,56 @@ rtems_task Init(<br>>        256, // size_in_bytes<br>>        0 // program time out in ms<br>>       );<br>> +  <br>> + <br>> +<br>> + _Assert(rv == 0);<br>> +// exit( 0 );<br>>    printf("register EEPROM \n");<br>>    fd_in_dev = open(EEPROM_PATH, O_RDWR);<br>> +  printf("fd_in_dev:%d\n", fd_in_dev);<br>>    _Assert(fd_in_dev >=0);<br>> +<br>> +<br>>    printf("open eeprom \n");<br>>    rv = fstat(fd_in_dev, &st);<br>>    _Assert(rv == 0);<br>>    _Assert(st.st_blksize == 8);<br>>    _Assert(st.st_size == sizeof(in));<br>>  <br>> +printf("read func\n");<br>> +<br>> +  n = read(fd_in_dev, &in[0], sizeof(in));<br>> +   printf("n:%d\n",n );<br>> +    printf("0:%x, ",in[0]);<br>> +   printf("1:%x, ",in[1]);<br>> +<br>> + for(i=0;i<sizeof(in);++i)<br>> +   {<br>> +printf("%x\n",in[i]);<br>> +<br>> +   }<br>> +   <br>> +  <br>> +<br>> +   printf("sizeof(in):%d\n", sizeof(in));<br>> +<br>> +  <br>> +   <br>> +   // _Assert(n == -1);<br>> +/*<br>> +printf("test\n");<br>>    for ( i = 0; i < sizeof(in); ++i) {<br>> +    printf("i:%d\n",i);<br>>      off = lseek(fd_in_dev, 0, SEEK_SET);<br>> +    printf("lseek func done!\n");<br>>      rv = read(fd_in_dev,&in[0], sizeof(in));<br>> -    printf("\n %s \n ",in[i]);<br>> +   // printf("\n %s \n ",in[i]);<br>>    }<br>> +  */<br>>    printf("EXIT from test case");<br>>    close(fd_bus);<br>> -  unlink(BBB_I2C_2_BUS_PATH);<br>> + unlink(BBB_I2C_2_BUS_PATH);<br>>    <br>>    rtems_test_end();<br>>  }<br></div>