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<p class="MsoNormal"> </p>
<p class="MsoNormal">Hi RTEMS Maintainers<span style="">,</span></p>
<p class="MsoNormal"> </p>
<p class="MsoNormal">Pls. let me know which of these item # changes below (or delta within a given item #) you do not wish to accommodate in the main line so that I will provide it as part of my BSP. I am porting RTEMS to IBM PowerPC 750 chip; very similar
to MPC750 but there are minute differences.</p>
<p class="MsoNormal"> </p>
<p class="MsoListParagraph" style="text-indent:-.25in"><span style="">1)<span style="font:7.0pt "Times New Roman"">
</span></span>Bug: In rtems\c\src\lib\libbsp\shared\src\irq-generic.c:bsp_interrupt_allocate_handler_index(). See attachment irq-generic.c vs. irq-generic.c.orig</p>
<p class="MsoNormal"> </p>
<p class="MsoListParagraph" style="text-indent:-.25in"><span style="">2)<span style="font:7.0pt "Times New Roman"">
</span></span>Enhancement: Add support for IBM PowerPC 750 chip in rtems\c\src\lib\libcpu\powerpc\shared\include\cpuIdent.[c,h] and rtems\c\src\lib\libcpu\powerpc\new-exceptions\bspsupport\ppc_exc_categories.c</p>
<p class="MsoListParagraph"> </p>
<p class="MsoListParagraph" style="text-indent:-.25in"><span style="">3)<span style="font:7.0pt "Times New Roman"">
</span></span>Bug: Missing a couple registers when DLAB is 1 in rtems\c\src\libchip\serial\ns16550_p.h. Also add a #ifndef ASM around libchip/serial.h inclusion.</p>
<p class="MsoListParagraph"> </p>
<p class="MsoListParagraph" style="text-indent:-.25in"><span style="">4)<span style="font:7.0pt "Times New Roman"">
</span></span>Suggestion: In pci.h, there are references to BSP_pci_configuration data structure which is in pci.c. However, in this file, there are also references to detect_host_bridge () in detect_raven_bridge.c. For folks that are just interested in pci_read_config_dword()
+ its brothers, all they need is to include pci.h and content for where BSP_pci_configuration is defined. The rest of the stuff in pci.c should be separate. Or in another word, data structures and #defines involving with BSP_pci_configuration needs to be
in separate files rather all stuffed in pci.c</p>
<p class="MsoNormal"> </p>
<p class="MsoListParagraph" style="text-indent:-.25in"><span style="">5)<span style="font:7.0pt "Times New Roman"">
</span></span>rtems\c\src\lib\libcpu\powerpc\mpc6xx\mmu\pte121.c:triv121PgTblMap() implementation only map virtual address to be the same as physical address for a given address range (start + numPages). It also assume an increment of page size for a given
address range. I suggest that an argument of triv121PgTblMap() is needed to specify the physical address to be mapped to for a given range of addresses. Also another parameter is whether or not to increment PhysAddr for each page. Enclosed in pte121.c is
an implementation of triv121PgTblMapPhysAddr() where a physical address is provided and it is hard coded not to increase the physical address for a given address range. So APIs are needed for these requests. Don’t know if and how much you want to support
me. If not, I’ll just add whatever you’re not supporting in my BSP.</p>
<p class="MsoListParagraph"> </p>
<p class="MsoNormal">Thanks,</p>
<p class="MsoNormal">Phong.</p>
<p class="MsoNormal"> </p>
<p class="MsoNormal">PS: There are a couple more items but the first five should get things rolling.</p>
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