<div dir="ltr"><div>Thanks a lot. <br></div><div>Then I will be working with "rv32imac" and "rv64imac"</div><div><br></div><div>Vaibhav Gupta<br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Fri, Aug 2, 2019 at 1:33 PM Sebastian Huber <<a href="mailto:sebastian.huber@embedded-brains.de">sebastian.huber@embedded-brains.de</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On 02/08/2019 09:50, Vaibhav Gupta wrote:<br>
> Hello,<br>
> I was about to test the testsuite code, need to confirm<br>
> on which RISCV BSP we are going to work?<br>
> <br>
> For example, for ARM I was asked for xilinx-zynq<br>
> So is there any specific one for riscv too, or should I build any of it?<br>
<br>
While you work on this, please review the documentation.<br>
<br>
<a href="https://docs.rtems.org/branches/master/user/bsps/bsps-riscv.html" rel="noreferrer" target="_blank">https://docs.rtems.org/branches/master/user/bsps/bsps-riscv.html</a><br>
<br>
Feel free to send documentation patches. There is support for some <br>
RISC-V BSPs in the RTEMS Tester:<br>
<br>
./tester/rtems/testing/bsps/griscv-sis.ini<br>
./tester/rtems/testing/bsps/griscv.ini<br>
./tester/rtems/testing/bsps/griscv-sis-cov.ini<br>
./tester/rtems/testing/bsps/rv32imac_spike.ini<br>
./tester/rtems/testing/bsps/rv64imafdc_spike.ini<br>
./tester/rtems/testing/bsps/rv64imafd_spike.ini<br>
./tester/rtems/testing/bsps/rv64imafd_medany.ini<br>
./tester/rtems/testing/bsps/rv64imafd_medany_spike.ini<br>
./tester/rtems/testing/bsps/rv32imafc_spike.ini<br>
./tester/rtems/testing/bsps/rv32imafd_spike.ini<br>
./tester/rtems/testing/bsps/rv64imac_medany_spike.ini<br>
./tester/rtems/testing/bsps/rv32im_spike.ini<br>
./tester/rtems/testing/bsps/rv64imac_spike.ini<br>
./tester/rtems/testing/bsps/rv32imafdc_spike.ini<br>
./tester/rtems/testing/bsps/rv32iac_spike.ini<br>
./tester/rtems/testing/bsps/rv64imafdc_medany_spike.ini<br>
./tester/rtems/testing/bsps/rv32i_spike.ini<br>
./tester/rtems/testing/bsps/rv32imac_spike.ini<br>
./tester/rtems/testing/bsps/rv64imafdc_spike.ini<br>
./tester/rtems/testing/bsps/rv64imafd_spike.ini<br>
./tester/rtems/testing/bsps/rv64imafd_medany.ini<br>
./tester/rtems/testing/bsps/rv64imafd_medany_spike.ini<br>
./tester/rtems/testing/bsps/rv32imafc_spike.ini<br>
./tester/rtems/testing/bsps/rv32imafd_spike.ini<br>
./tester/rtems/testing/bsps/rv64imac_medany_spike.ini<br>
./tester/rtems/testing/bsps/rv32im_spike.ini<br>
./tester/rtems/testing/bsps/rv64imac_spike.ini<br>
./tester/rtems/testing/bsps/rv32imafdc_spike.ini<br>
./tester/rtems/testing/bsps/rv32iac_spike.ini<br>
./tester/rtems/testing/bsps/rv64imafdc_medany_spike.ini<br>
./tester/rtems/testing/bsps/rv32i_spike.ini<br>
<br>
I would test on a 32-bit and 64-bit variant. Also with hardware FP and <br>
without.<br>
<br>
-- <br>
Sebastian Huber, embedded brains GmbH<br>
<br>
Address : Dornierstr. 4, D-82178 Puchheim, Germany<br>
Phone   : +49 89 189 47 41-16<br>
Fax     : +49 89 189 47 41-09<br>
E-Mail  : <a href="mailto:sebastian.huber@embedded-brains.de" target="_blank">sebastian.huber@embedded-brains.de</a><br>
PGP     : Public key available on request.<br>
<br>
Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.<br>
</blockquote></div>