<div dir="ltr"><div dir="ltr"><br></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Sun, Aug 4, 2019 at 10:11 PM Christian Mauderer <<a href="mailto:list@c-mauderer.de">list@c-mauderer.de</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Hello Vijay,<br>
<br>
for the whole patch set:<br>
<br>
The order and groups are good now. I didn't find anything where I would<br>
have big problems. All patches are compilable and libbsd still compiles<br>
on a PowerPC target. The result is great (with some demo application I<br>
get an image on the screen). So I'm OK with this version of the patch set.<br>
<br>
I'm still not entirely happy with the pinmux because it re-initializes<br>
some pins that are already initialized by the BSP. But if no one has a<br>
better idea that can be done in a reasonable time I would accept it like<br>
it is. I think I would prefer it without the hack that needs an extra<br>
overlay. If the patch set is committed in this form, we will need a<br>
ticket for that (wait with creating it till the commit) so that a future<br>
project can work on that ticket.<br>
<br></blockquote><div><br></div><div>Hi,</div><div><br></div><div>Regarding the videomode I'd like to note that the preferred video mode isn't </div><div>selected because it performs a lot of if checks on the videomode before setting.</div><div>My preferred mode was 1366*786, this is not set because there's a check</div><div>that does `if (hdisplay & 0xf) return` here hdisplay == 1366, that's why the </div><div>available modes are sorted and the max possible mode before it is set.</div><div><br></div><div>In another case where the preferred mode was 1920*1024 60Hz, it was not</div><div>setting the preferred mode because the MAX_BANDWIDTH is 1280*1024*60</div><div>and hence the detected mode is the max available mode before it.</div><div> <br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
Best regards<br>
<br>
Christian<br>
<br>
On 03/08/2019 22:19, Vijay Kumar Banerjee wrote:<br>
> ---<br>
> .../sys/arm/ti/am335x/am335x_scm_padconf.c | 305 ++++++++++++<br>
> .../sys/arm/ti/am335x/am335x_scm_padconf.h | 47 ++<br>
> freebsd/sys/arm/ti/omap4/omap4_scm_padconf.h | 83 ++++<br>
> freebsd/sys/arm/ti/ti_pinmux.c | 463 ++++++++++++++++++<br>
> freebsd/sys/arm/ti/ti_pinmux.h | 80 +++<br>
> freebsd/sys/dev/fdt/fdt_pinctrl.c | 160 ++++++<br>
> 6 files changed, 1138 insertions(+)<br>
> create mode 100644 freebsd/sys/arm/ti/am335x/am335x_scm_padconf.c<br>
> create mode 100644 freebsd/sys/arm/ti/am335x/am335x_scm_padconf.h<br>
> create mode 100644 freebsd/sys/arm/ti/omap4/omap4_scm_padconf.h<br>
> create mode 100644 freebsd/sys/arm/ti/ti_pinmux.c<br>
> create mode 100644 freebsd/sys/arm/ti/ti_pinmux.h<br>
> create mode 100644 freebsd/sys/dev/fdt/fdt_pinctrl.c<br>
> <br>
> diff --git a/freebsd/sys/arm/ti/am335x/am335x_scm_padconf.c b/freebsd/sys/arm/ti/am335x/am335x_scm_padconf.c<br>
> new file mode 100644<br>
> index 00000000..8823b6af<br>
> --- /dev/null<br>
> +++ b/freebsd/sys/arm/ti/am335x/am335x_scm_padconf.c<br>
> @@ -0,0 +1,305 @@<br>
> +#include <machine/rtems-bsd-kernel-space.h><br>
> +<br>
> +/*-<br>
> + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD<br>
> + *<br>
> + * Copyright (c) 2012 Damjan Marion <dmarion@FreeBSD.org><br>
> + * All rights reserved.<br>
> + *<br>
> + * Redistribution and use in source and binary forms, with or without<br>
> + * modification, are permitted provided that the following conditions<br>
> + * are met:<br>
> + * 1. Redistributions of source code must retain the above copyright<br>
> + * notice, this list of conditions and the following disclaimer.<br>
> + * 2. Redistributions in binary form must reproduce the above copyright<br>
> + * notice, this list of conditions and the following disclaimer in the<br>
> + * documentation and/or other materials provided with the distribution.<br>
> + *<br>
> + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND<br>
> + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE<br>
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE<br>
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE<br>
> + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL<br>
> + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS<br>
> + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)<br>
> + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT<br>
> + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY<br>
> + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF<br>
> + * SUCH DAMAGE.<br>
> + */<br>
> +<br>
> +#include <sys/cdefs.h><br>
> +__FBSDID("$FreeBSD$");<br>
> +<br>
> +#include <sys/param.h><br>
> +#include <sys/systm.h><br>
> +#include <sys/kernel.h><br>
> +#include <sys/module.h><br>
> +#include <sys/bus.h><br>
> +#include <rtems/bsd/sys/resource.h><br>
> +#include <sys/rman.h><br>
> +#include <sys/lock.h><br>
> +#include <sys/malloc.h><br>
> +<br>
> +#include <machine/bus.h><br>
> +#include <machine/resource.h><br>
> +#include <machine/intr.h><br>
> +#include <sys/gpio.h><br>
> +<br>
> +#include <arm/ti/tivar.h><br>
> +#include <arm/ti/ti_pinmux.h><br>
> +<br>
> +#include <arm/ti/am335x/am335x_scm_padconf.h><br>
> +<br>
> +#define _PIN(r, b, gp, gm, m0, m1, m2, m3, m4, m5, m6, m7) \<br>
> + { .reg_off = r, \<br>
> + .gpio_pin = gp, \<br>
> + .gpio_mode = gm, \<br>
> + .ballname = b, \<br>
> + .muxmodes[0] = m0, \<br>
> + .muxmodes[1] = m1, \<br>
> + .muxmodes[2] = m2, \<br>
> + .muxmodes[3] = m3, \<br>
> + .muxmodes[4] = m4, \<br>
> + .muxmodes[5] = m5, \<br>
> + .muxmodes[6] = m6, \<br>
> + .muxmodes[7] = m7, \<br>
> + }<br>
> +<br>
> +const static struct ti_pinmux_padstate ti_padstate_devmap[] = {<br>
> + {"output", PADCONF_OUTPUT },<br>
> + {"output_pullup", PADCONF_OUTPUT_PULLUP },<br>
> + {"input", PADCONF_INPUT },<br>
> + {"input_pulldown", PADCONF_INPUT_PULLDOWN },<br>
> + {"input_pullup", PADCONF_INPUT_PULLUP },<br>
> + {"i2c", PADCONF_INPUT_PULLUP_SLOW },<br>
> + { .state = NULL }<br>
> +};<br>
> +<br>
> +const static struct ti_pinmux_padconf ti_padconf_devmap[] = {<br>
> + _PIN(0x000, "GPMC_AD0", 32, 7,"gpmc_ad0", "mmc1_dat0", NULL, NULL, NULL, NULL, NULL, "gpio1_0"),<br>
> + _PIN(0x004, "GPMC_AD1", 33, 7,"gpmc_ad1", "mmc1_dat1", NULL, NULL, NULL, NULL, NULL, "gpio1_1"),<br>
> + _PIN(0x008, "GPMC_AD2", 34, 7,"gpmc_ad2", "mmc1_dat2", NULL, NULL, NULL, NULL, NULL, "gpio1_2"),<br>
> + _PIN(0x00C, "GPMC_AD3", 35, 7,"gpmc_ad3", "mmc1_dat3", NULL, NULL, NULL, NULL, NULL, "gpio1_3"),<br>
> + _PIN(0x010, "GPMC_AD4", 36, 7,"gpmc_ad4", "mmc1_dat4", NULL, NULL, NULL, NULL, NULL, "gpio1_4"),<br>
> + _PIN(0x014, "GPMC_AD5", 37, 7,"gpmc_ad5", "mmc1_dat5", NULL, NULL, NULL, NULL, NULL, "gpio1_5"),<br>
> + _PIN(0x018, "GPMC_AD6", 38, 7,"gpmc_ad6", "mmc1_dat6", NULL, NULL, NULL, NULL, NULL, "gpio1_6"),<br>
> + _PIN(0x01C, "GPMC_AD7", 39, 7,"gpmc_ad7", "mmc1_dat7", NULL, NULL, NULL, NULL, NULL, "gpio1_7"),<br>
> + _PIN(0x020, "GPMC_AD8", 22, 7, "gpmc_ad8", "lcd_data23", "mmc1_dat0", "mmc2_dat4", "ehrpwm2A", NULL, NULL, "gpio0_22"),<br>
> + _PIN(0x024, "GPMC_AD9", 23, 7, "gpmc_ad9", "lcd_data22", "mmc1_dat1", "mmc2_dat5", "ehrpwm2B", NULL, NULL, "gpio0_23"),<br>
> + _PIN(0x028, "GPMC_AD10", 26, 7, "gpmc_ad10", "lcd_data21", "mmc1_dat2", "mmc2_dat6", "ehrpwm2_tripzone_in", NULL, NULL, "gpio0_26"),<br>
> + _PIN(0x02C, "GPMC_AD11", 27, 7, "gpmc_ad11", "lcd_data20", "mmc1_dat3", "mmc2_dat7", "ehrpwm0_synco", NULL, NULL, "gpio0_27"),<br>
> + _PIN(0x030, "GPMC_AD12", 44, 7, "gpmc_ad12", "lcd_data19", "mmc1_dat4", "mmc2_dat0", "eQEP2A_in", "pr1_mii0_txd2", "pr1_pru0_pru_r30_14", "gpio1_12"),<br>
> + _PIN(0x034, "GPMC_AD13", 45, 7, "gpmc_ad13", "lcd_data18", "mmc1_dat5", "mmc2_dat1", "eQEP2B_in", "pr1_mii0_txd1", "pr1_pru0_pru_r30_15", "gpio1_13"),<br>
> + _PIN(0x038, "GPMC_AD14", 46, 7, "gpmc_ad14", "lcd_data17", "mmc1_dat6", "mmc2_dat2", "eQEP2_index", "pr1_mii0_txd0", "pr1_pru0_pru_r31_14", "gpio1_14"),<br>
> + _PIN(0x03C, "GPMC_AD15", 47, 7, "gpmc_ad15", "lcd_data16", "mmc1_dat7", "mmc2_dat3", "eQEP2_strobe", "pr1_ecap0_ecap_capin_apwm_o", "pr1_pru0_pru_r31_15", "gpio1_15"),<br>
> + _PIN(0x040, "GPMC_A0", 48, 7, "gpmc_a0", "gmii2_txen", "rgmii2_tctl", "rmii2_txen", "gpmc_a16", "pr1_mii_mt1_clk", "ehrpwm1_tripzone_input", "gpio1_16"),<br>
> + _PIN(0x044, "GPMC_A1", 49, 7, "gpmc_a1", "gmii2_rxdv", "rgmii2_rctl", "mmc2_dat0", "gpmc_a17", "pr1_mii1_txd3", "ehrpwm0_synco", "gpio1_17"),<br>
> + _PIN(0x048, "GPMC_A2", 50, 7, "gpmc_a2", "gmii2_txd3", "rgmii2_td3", "mmc2_dat1", "gpmc_a18", "pr1_mii1_txd2", "ehrpwm1A", "gpio1_18"),<br>
> + _PIN(0x04C, "GPMC_A3", 51, 7, "gpmc_a3", "gmii2_txd2", "rgmii2_td2", "mmc2_dat2", "gpmc_a19", "pr1_mii1_txd1", "ehrpwm1B", "gpio1_19"),<br>
> + _PIN(0x050, "GPMC_A4", 52, 7, "gpmc_a4", "gmii2_txd1", "rgmii2_td1", "rmii2_tdx1", "gpmc_a20", "pr1_mii1_txd0", "eQEP1A_in", "gpio1_20"),<br>
> + _PIN(0x054, "GPMC_A5", 53, 7, "gpmc_a5", "gmii2_txd0", "rgmii2_td0", "rmii2_txd0", "gpmc_a21", "pr1_mii1_rxd3", "eQEP1B_in", "gpio1_21"),<br>
> + _PIN(0x058, "GPMC_A6", 54, 7, "gpmc_a6", "gmii2_txclk", "rgmii2_tclk", "mmc2_dat4", "gpmc_a22", "pr1_mii1_rxd2", "eQEP1_index", "gpio1_22"),<br>
> + _PIN(0x05C, "GPMC_A7", 55, 7, "gpmc_a7", "gmii2_rxclk", "rgmii2_rclk", "mmc2_dat5", "gpmc_a23", "pr1_mii1_rxd1", "eQEP1_strobe", "gpio1_23"),<br>
> + _PIN(0x060, "GPMC_A8", 56, 7, "gpmc_a8", "gmii2_rxd3", "rgmii2_rd3", "mmc2_dat6", "gpmc_a24", "pr1_mii1_rxd0", "mcasp0_aclkx", "gpio1_24"),<br>
> + _PIN(0x064, "GPMC_A9", 57, 7, "gmpc_a9", "gmii2_rxd2", "rgmii2_rd2", "mmc2_dat7 / rmii2_crs_dv", "gpmc_a25", "pr1_mii_mr1_clk", "mcasp0_fsx", "gpio1_25"),<br>
> + _PIN(0x068, "GPMC_A10", 58, 7, "gmpc_a10", "gmii2_rxd1", "rgmii2_rd1", "rmii2_rxd1", "gpmc_a26", "pr1_mii1_rxdv", "mcasp0_arx0", "gpio1_26"),<br>
> + _PIN(0x06C, "GPMC_A11", 59, 7, "gmpc_a11", "gmii2_rxd0", "rgmii2_rd0", "rmii2_rxd0", "gpmc_a27", "pr1_mii1_rxer", "mcasp0_axr1", "gpio1_27"),<br>
> + _PIN(0x070, "GPMC_WAIT0", 30, 7, "gpmc_wait0", "gmii2_crs", "gpmc_csn4", "rmii2_crs_dv", "mmc1_sdcd", "pr1_mii1_col", "uart4_rxd", "gpio0_30"),<br>
> + _PIN(0x074, "GPMC_WPn", 31, 7, "gpmc_wpn", "gmii2_rxerr", "gpmc_csn5", "rmii2_rxerr", "mmc2_sdcd", "pr1_mii1_txen", "uart4_txd", "gpio0_31"),<br>
> + _PIN(0x078, "GPMC_BEn1", 60, 7, "gpmc_be1n", "gmii2_col", "gmpc_csn6","mmc2_dat3", "gpmc_dir", "pr1_mii1_rxlink", "mcasp0_aclkr", "gpio1_28"),<br>
> + _PIN(0x07c, "GPMC_CSn0", 61, 7, "gpmc_csn0", NULL, NULL, NULL, NULL, NULL, NULL, "gpio1_29"),<br>
> + _PIN(0x080, "GPMC_CSn1", 62, 7, "gpmc_csn1", "gpmc_clk", "mmc1_clk", "pr1_edio_data_in6", "pr1_edio_data_out6", "pr1_pru1_pru_r30_12", "pr1_pru1_pru_r31_12", "gpio1_30"),<br>
> + _PIN(0x084, "GPMC_CSn2", 63, 7, "gpmc_csn2", "gpmc_be1n", "mmc1_cmd", "pr1_edio_data_in7", "pr1_edio_data_out7", "pr1_pru1_pru_r30_13", "pr1_pru1_pru_r31_13", "gpio1_31"),<br>
> + _PIN(0x088, "GPMC_CSn3", 64, 7, "gpmc_csn3", "gpmc_a3", "rmii2_crs_dv", "mmc2_cmd", "pr1_mii0_crs", "pr1_mdio_data", "EMU4", "gpio2_0"),<br>
> + _PIN(0x08c, "GPMC_CLK", 65, 7, "gpmc_clk", "lcd_memory_clk", "gpmc_wait1", "mmc2_clk", "pr1_mii1_crs", "pr1_mdio_mdclk", "mcasp0_fsr", "gpio2_1"),<br>
> + _PIN(0x090, "GPMC_ADVn_ALE", 66, 7, "gpmc_advn_ale", NULL, "timer4", NULL, NULL, NULL, NULL, "gpio2_2"),<br>
> + _PIN(0x094, "GPMC_OEn_REn", 67, 7, "gpmc_oen_ren", NULL, "timer7", NULL, NULL, NULL, NULL, "gpio2_3"),<br>
> + _PIN(0x098, "GPMC_WEn", 68, 7, "gpmc_wen", NULL, "timer6", NULL, NULL, NULL, NULL, "gpio2_4"),<br>
> + _PIN(0x09c, "GPMC_BEn0_CLE", 67, 7, "gpmc_ben0_cle", NULL, "timer5", NULL, NULL, NULL, NULL, "gpio2_5"),<br>
> + _PIN(0x0a0, "LCD_DATA0", 68, 7, "lcd_data0", "gpmc_a0", "pr1_mii_mt0_clk", "ehrpwm2A", NULL, "pr1_pru1_pru_r30_0", "pr1_pru1_pru_r31_0", "gpio2_6"),<br>
> + _PIN(0x0a4, "LCD_DATA1", 69, 7, "lcd_data1", "gpmc_a1", "pr1_mii0_txen", "ehrpwm2B", NULL, "pr1_pru1_pru_r30_1", "pr1_pru1_pru_r31_1", "gpio2_7"),<br>
> + _PIN(0x0a8, "LCD_DATA2", 70, 7, "lcd_data2", "gpmc_a2", "pr1_mii0_txd3", "ehrpwm2_tripzone_input", NULL, "pr1_pru1_pru_r30_2", "pr1_pru1_pru_r31_2", "gpio2_8"),<br>
> + _PIN(0x0ac, "LCD_DATA3", 71, 7, "lcd_data3", "gpmc_a3", "pr1_mii0_txd2", "ehrpwm0_synco", NULL, "pr1_pru1_pru_r30_3", "pr1_pru1_pru_r31_3", "gpio2_9"),<br>
> + _PIN(0x0b0, "LCD_DATA4", 72, 7, "lcd_data4", "gpmc_a4", "pr1_mii0_txd1", "eQEP2A_in", NULL, "pr1_pru1_pru_r30_4", "pr1_pru1_pru_r31_4", "gpio2_10"),<br>
> + _PIN(0x0b4, "LCD_DATA5", 73, 7, "lcd_data5", "gpmc_a5", "pr1_mii0_txd0", "eQEP2B_in", NULL, "pr1_pru1_pru_r30_5", "pr1_pru1_pru_r31_5", "gpio2_11"),<br>
> + _PIN(0x0b8, "LCD_DATA6", 74, 7, "lcd_data6", "gpmc_a6", "pr1_edio_data_in6", "eQEP2_index", "pr1_edio_data_out6", "pr1_pru1_pru_r30_6", "pr1_pru1_pru_r31_6", "gpio2_12"),<br>
> + _PIN(0x0bc, "LCD_DATA7", 75, 7, "lcd_data7", "gpmc_a7", "pr1_edio_data_in7", "eQEP2_strobe", "pr1_edio_data_out7", "pr1_pru1_pru_r30_7", "pr1_pru1_pru_r31_7", "gpio2_13"),<br>
> + _PIN(0x0c0, "LCD_DATA8", 76, 7, "lcd_data8", "gpmc_a12", "ehrpwm1_tripzone_input", "mcasp0_aclkx", "uart5_txd", "pr1_mii0_rxd3", "uart2_ctsn", "gpio2_14"),<br>
> + _PIN(0x0c4, "LCD_DATA9", 76, 7, "lcd_data9", "gpmc_a13", "ehrpwm0_synco", "mcasp0_fsx", "uart5_rxd", "pr1_mii0_rxd2", "uart2_rtsn", "gpio2_15"),<br>
> + _PIN(0x0c8, "LCD_DATA10", 77, 7, "lcd_data10", "gpmc_a14", "ehrpwm1A", "mcasp0_axr0", NULL, "pr1_mii0_rxd1", "uart3_ctsn", "gpio2_16"),<br>
> + _PIN(0x0cc, "LCD_DATA11", 78, 7, "lcd_data11", "gpmc_a15", "ehrpwm1B", "mcasp0_ahclkr", "mcasp0_axr2", "pr1_mii0_rxd0", "uart3_rtsn", "gpio2_17"),<br>
> + _PIN(0x0d0, "LCD_DATA12", 8, 7, "lcd_data12", "gpmc_a16", "eQEP1A_in", "mcasp0_aclkr", "mcasp0_axr2", "pr1_mii0_rxlink", "uart4_ctsn", "gpio0_8"),<br>
> + _PIN(0x0d4, "LCD_DATA13", 9, 7, "lcd_data13", "gpmc_a17", "eQEP1B_in", "mcasp0_fsr", "mcasp0_axr3", "pr1_mii0_rxer", "uart4_rtsn", "gpio0_9"),<br>
> + _PIN(0x0d8, "LCD_DATA14", 10, 7, "lcd_data14", "gpmc_a18", "eQEP1_index", "mcasp0_axr1", "uart5_rxd", "pr1_mii_mr0_clk", "uart5_ctsn", "gpio0_10"),<br>
> + _PIN(0x0dc, "LCD_DATA15", 11, 7, "lcd_data15", "gpmc_a19", "eQEP1_strobe", "mcasp0_ahclkx", "mcasp0_axr3", "pr1_mii0_rxdv", "uart5_rtsn", "gpio0_11"),<br>
> + _PIN(0x0e0, "LCD_VSYNC", 86, 7, "lcd_vsync", "gpmc_a8", "gpmc_a1", "pr1_edio_data_in2", "pr1_edio_data_out2", "pr1_pru1_pru_r30_8", "pr1_pru1_pru_r31_8", "gpio2_22"),<br>
> + _PIN(0x0e4, "LCD_HSYNC", 87, 7, "lcd_hsync", "gmpc_a9", "gpmc_a2", "pr1_edio_data_in3", "pr1_edio_data_out3", "pr1_pru1_pru_r30_9", "pr1_pru1_pru_r31_9", "gpio2_23"),<br>
> + _PIN(0x0e8, "LCD_PCLK", 88, 7, "lcd_pclk", "gpmc_a10", "pr1_mii0_crs", "pr1_edio_data_in4", "pr1_edio_data_out4", "pr1_pru1_pru_r30_10", "pr1_pru1_pru_r31_10", "gpio2_24"),<br>
> + _PIN(0x0ec, "LCD_AC_BIAS_EN", 89, 7, "lcd_ac_bias_en", "gpmc_a11", "pr1_mii1_crs", "pr1_edio_data_in5", "pr1_edio_data_out5", "pr1_pru1_pru_r30_11", "pr1_pru1_pru_r31_11", "gpio2_25"),<br>
> + _PIN(0x0f0, "MMC0_DAT3", 90, 7, "mmc0_dat3", "gpmc_a20", "uart4_ctsn", "timer5", "uart1_dcdn", "pr1_pru0_pru_r30_8", "pr1_pru0_pru_r31_8", "gpio2_26"),<br>
> + _PIN(0x0f4, "MMC0_DAT2", 91, 7, "mmc0_dat2", "gpmc_a21", "uart4_rtsn", "timer6", "uart1_dsrn", "pr1_pru0_pru_r30_9", "pr1_pru0_pru_r31_9", "gpio2_27"),<br>
> + _PIN(0x0f8, "MMC0_DAT1", 92, 7, "mmc0_dat1", "gpmc_a22", "uart5_ctsn", "uart3_rxd", "uart1_dtrn", "pr1_pru0_pru_r30_10", "pr1_pru0_pru_r31_10", "gpio2_28"),<br>
> + _PIN(0x0fc, "MMC0_DAT0", 93, 7, "mmc0_dat0", "gpmc_a23", "uart5_rtsn", "uart3_txd", "uart1_rin", "pr1_pru0_pru_r30_11", "pr1_pru0_pru_r31_11", "gpio2_29"),<br>
> + _PIN(0x100, "MMC0_CLK", 94, 7, "mmc0_clk", "gpmc_a24", "uart3_ctsn", "uart2_rxd", "dcan1_tx", "pr1_pru0_pru_r30_12", "pr1_pru0_pru_r31_12", "gpio2_30"),<br>
> + _PIN(0x104, "MMC0_CMD", 95, 7, "mmc0_cmd", "gpmc_a25", "uart3_rtsn", "uart2_txd", "dcan1_rx", "pr1_pru0_pru_r30_13", "pr1_pru0_pru_r31_13", "gpio2_31"),<br>
> + _PIN(0x108, "MII1_COL", 96, 7, "gmii1_col", "rmii2_refclk", "spi1_sclk", "uart5_rxd", "mcasp1_axr2", "mmc2_dat3", "mcasp0_axr2", "gpio3_0"),<br>
> + _PIN(0x10c, "MII1_CRS", 97, 7, "gmii1_crs", "rmii1_crs_dv", "spi1_d0", "I2C1_SDA", "mcasp1_aclkx", "uart5_ctsn", "uart2_rxd", "gpio3_1"),<br>
> + _PIN(0x110, "MII1_RX_ER", 98, 7, "gmii1_rxerr", "rmii1_rxerr", "spi1_d1", "I2C1_SCL", "mcasp1_fsx", "uart5_rtsn", "uart2_txd", "gpio3_2"),<br>
> + _PIN(0x114, "MII1_TX_EN", 99, 7, "gmii1_txen", "rmii1_txen", "rgmii1_tctl", "timer4", "mcasp1_axr0", "eQEP0_index", "mmc2_cmd", "gpio3_3"),<br>
> + _PIN(0x118, "MII1_RX_DV", 100, 7, "gmii1_rxdv", "cd_memory_clk", "rgmii1_rctl", "uart5_txd", "mcasp1_aclkx", "mmc2_dat0", "mcasp0_aclkr", "gpio3_4"),<br>
> + _PIN(0x11c, "MII1_TXD3", 16, 7, "gmii1_txd3", "dcan0_tx", "rgmii1_td3", "uart4_rxd", "mcasp1_fsx", "mmc2_dat1", "mcasp0_fsr", "gpio0_16"),<br>
> + _PIN(0x120, "MII1_TXD2", 17, 7, "gmii1_txd2", "dcan0_rx", "rgmii1_td2", "uart4_txd", "mcasp1_axr0", "mmc2_dat2", "mcasp0_ahclkx", "gpio0_17"),<br>
> + _PIN(0x124, "MII1_TXD1", 21, 7, "gmii1_txd1", "rmii1_txd1", "rgmii1_td1", "mcasp1_fsr", "mcasp1_axr1", "eQEP0A_in", "mmc1_cmd", "gpio0_21"),<br>
> + _PIN(0x128, "MII1_TXD0", 28, 7, "gmii1_txd0", "rmii1_txd0", "rgmii1_td0", "mcasp1_axr2", "mcasp1_aclkr", "eQEP0B_in", "mmc1_clk", "gpio0_28"),<br>
> + _PIN(0x12c, "MII1_TX_CLK", 105, 7, "gmii1_txclk", "uart2_rxd", "rgmii1_tclk", "mmc0_dat7", "mmc1_dat0", "uart1_dcdn", "mcasp0_aclkx", "gpio3_9"),<br>
> + _PIN(0x130, "MII1_RX_CLK", 106, 7, "gmii1_rxclk", "uart2_txd", "rgmii1_rclk", "mmc0_dat6", "mmc1_dat1", "uart1_dsrn", "mcasp0_fsx", "gpio3_10"),<br>
> + _PIN(0x134, "MII1_RXD3", 82, 7, "gmii1_rxd3", "uart3_rxd", "rgmii1_rd3", "mmc0_dat5", "mmc1_dat2", "uart1_dtrn", "mcasp0_axr0", "gpio2_18"),<br>
> + _PIN(0x138, "MII1_RXD2", 83, 7, "gmii1_rxd2", "uart3_txd", "rgmii1_rd2", "mmc0_dat4", "mmc1_dat3", "uart1_rin", "mcasp0_axr1", "gpio2_19"),<br>
> + _PIN(0x13c, "MII1_RXD1", 84, 7, "gmii1_rxd1", "rmii1_rxd1", "rgmii1_rd1", "mcasp1_axr3", "mcasp1_fsr", "eQEP0_strobe", "mmc2_clk", "gpio2_20"),<br>
> + _PIN(0x140, "MII1_RXD0", 85, 7, "gmii1_rxd0", "rmii1_rxd0", "rgmii1_rd0", "mcasp1_ahclkx", "mcasp1_ahclkr", "mcasp1_aclkr", "mcasp0_axr3", "gpio2_21"),<br>
> + _PIN(0x144, "RMII1_REF_CLK", 29, 7, "rmii1_refclk", "xdma_event_intr2", "spi1_cs0", "uart5_txd", "mcasp1_axr3", "mmc0_pow", "mcasp1_ahclkx", "gpio0_29"),<br>
> + _PIN(0x148, "MDIO", 0, 7, "mdio_data", "timer6", "uart5_rxd", "uart3_ctsn", "mmc0_sdcd","mmc1_cmd", "mmc2_cmd","gpio0_0"),<br>
> + _PIN(0x14c, "MDC", 1, 7, "mdio_clk", "timer5", "uart5_txd", "uart3_rtsn", "mmc0_sdwp", "mmc1_clk", "mmc2_clk", "gpio0_1"),<br>
> + _PIN(0x150, "SPI0_SCLK", 2, 7, "spi0_sclk", "uart2_rxd", "I2C2_SDA", "ehrpwm0A", "pr1_uart0_cts_n", "pr1_edio_sof", "EMU2", "gpio0_2"),<br>
> + _PIN(0x154, "SPI0_D0", 3, 7, "spi0_d0", "uart2_txd", "I2C2_SCL", "ehrpwm0B", "pr1_uart0_rts_n", "pr1_edio_latch_in", "EMU3", "gpio0_3"),<br>
> + _PIN(0x158, "SPI0_D1", 4, 7, "spi0_d1", "mmc1_sdwp", "I2C1_SDA", "ehrpwm0_tripzone_input", "pr1_uart0_rxd", "pr1_edio_data_in0", "pr1_edio_data_out0", "gpio0_4"),<br>
> + _PIN(0x15c, "SPI0_CS0", 5, 7, "spi0_cs0", "mmc2_sdwp", "I2C1_SCL", "ehrpwm0_synci", "pr1_uart0_txd", "pr1_edio_data_in1", "pr1_edio_data_out1", "gpio0_5"),<br>
> + _PIN(0x160, "SPI0_CS1", 6, 7, "spi0_cs1", "uart3_rxd", "eCAP1_in_PWM1_out", "mcc0_pow", "xdm_event_intr2", "mmc0_sdcd", "EMU4", "gpio0_6"),<br>
> + _PIN(0x164, "ECAP0_IN_PWM0_OUT",7, 7, "eCAP0_in_PWM0_out", "uart3_txd", "spi1_cs1", "pr1_ecap0_ecap_capin_apwm_o", "spi1_sclk", "mmc0_sdwp", "xdma_event_intr2", "gpio0_7"),<br>
> + _PIN(0x168, "UART0_CTSn", 40, 7, "uart0_ctsn", "uart4_rxd", "dcan1_tx", "I2C1_SDA", "spi1_d0", "timer7", "pr1_edc_sync0_out", "gpio1_8"),<br>
> + _PIN(0x16c, "UART0_RTSn", 41, 7, "uart0_rtsn", "uart4_txd", "dcan1_rx", "I2C1_SCL", "spi1_d1", "spi1_cs0", "pr1_edc_sync1_out", "gpio1_9"),<br>
> + _PIN(0x170, "UART0_rxd", 42, 7, "uart0_rxd", "spi1_cs0", "dcan0_tx", "I2C2_SDA", "eCAP2_in_PWM2_out", "pr1_pru1_pru_r30_14", "pr1_pru1_pru_r31_14", "gpio1_10"),<br>
> + _PIN(0x174, "UART0_txd", 43, 7, "uart0_txd", "spi1_cs1", "dcan0_rx", "I2C2_SCL", "eCAP1_in_PWM1_out", "pr1_pru1_pru_r30_15", "pr1_pru1_pru_r31_15", "gpio1_11"),<br>
> + _PIN(0x178, "UART1_CTSn", 12, 7, "uart1_ctsn", "timer6_mux1", "dcan0_tx", "I2C2_SDA", "spi1_cs0", "pr1_uart0_cts_n", "pr1_edc_latch0_in", "gpio0_12"),<br>
> + _PIN(0x17c, "UART1_RTSn", 13, 7, "uart1_rtsn", "timer5_mux1", "dcan0_rx", "I2C2_SCL", "spi1_cs1", "pr1_uart0_rts_n", "pr1_edc_latch1_in", "gpio0_13"),<br>
> + _PIN(0x180, "UART1_RXD", 14, 7, "uart1_rxd", "mmc1_sdwp", "dcan1_tx", "I2C1_SDA", NULL, "pr1_uart0_rxd", "pr1_pru1_pru_r31_16", "gpio0_14"),<br>
> + _PIN(0x184, "UART1_TXD", 15, 7, "uart1_txd", "mmc2_sdwp", "dcan1_rx", "I2C1_SCL", NULL, "pr1_uart0_txd", "pr1_pru0_pru_r31_16", "gpio0_15"),<br>
> + _PIN(0x188, "I2C0_SDA", 101, 7, "I2C0_SDA", "timer4", "uart2_ctsn", "eCAP2_in_PWM2_out", NULL, NULL, NULL, "gpio3_5"),<br>
> + _PIN(0x18c, "I2C0_SCL", 102, 7, "I2C0_SCL", "timer7", "uart2_rtsn", "eCAP1_in_PWM1_out", NULL, NULL, NULL, "gpio3_6"),<br>
> + _PIN(0x190, "MCASP0_ACLKX", 110, 7, "mcasp0_aclkx", "ehrpwm0A", NULL, "spi1_sclk", "mmc0_sdcd", "pr1_pru0_pru_r30_0", "pr1_pru0_pru_r31_0", "gpio3_14"),<br>
> + _PIN(0x194, "MCASP0_FSX", 111, 7, "mcasp0_fsx", "ehrpwm0B", NULL, "spi1_d0", "mmc1_sdcd", "pr1_pru0_pru_r30_1", "pr1_pru0_pru_r31_1", "gpio3_15"),<br>
> + _PIN(0x198, "MCASP0_AXR0", 112, 7, "mcasp0_axr0", "ehrpwm0_tripzone_input", NULL, "spi1_d1", "mmc2_sdcd", "pr1_pru0_pru_r30_2", "pr1_pru0_pru_r31_2", "gpio3_16"),<br>
> + _PIN(0x19c, "MCASP0_AHCLKR", 113, 7, "mcasp0_ahclkr", "ehrpwm0_synci", "mcasp0_axr2", "spi1_cs0", "eCAP2_in_PWM2_out", "pr1_pru0_pru_r30_3", "pr1_pru0_pru_r31_3", "gpio3_17"),<br>
> + _PIN(0x1a0, "MCASP0_ACLKR", 114, 7, "mcasp0_aclkr", "eQEP0A_in", "mcasp0_axr2", "mcasp1_aclkx", "mmc0_sdwp", "pr1_pru0_pru_r30_4", "pr1_pru0_pru_r31_4", "gpio3_18"),<br>
> + _PIN(0x1a4, "MCASP0_FSR", 115, 7, "mcasp0_fsr", "eQEP0B_in", "mcasp0_axr3", "mcasp1_fsx", "EMU2", "pr1_pru0_pru_r30_5", "pr1_pru0_pru_r31_5", "gpio3_19"),<br>
> + _PIN(0x1a8, "MCASP0_AXR1", 116, 7, "mcasp0_axr1", "eQEP0_index", NULL, "mcasp1_axr0", "EMU3", "pr1_pru0_pru_r30_6", "pr1_pru0_pru_r31_6", "gpio3_20"),<br>
> + _PIN(0x1ac, "MCASP0_AHCLKX", 117, 7, "mcasp0_ahclkx", "eQEP0_strobe", "mcasp0_axr3", "mcasp1_axr1", "EMU4", "pr1_pru0_pru_r30_7", "pr1_pru0_pru_r31_7", "gpio3_21"),<br>
> + _PIN(0x1b0, "XDMA_EVENT_INTR0", 19, 7, "xdma_event_intr0", NULL, "timer4", "clkout1", "spi1_cs1", "pr1_pru1_pru_r31_16", "EMU2", "gpio0_19"),<br>
> + _PIN(0x1b4, "XDMA_EVENT_INTR1", 20, 7, "xdma_event_intr1", NULL, "tclkin", "clkout2", "timer7", "pr1_pru0_pru_r31_16", "EMU3", "gpio0_20"),<br>
> +#if 0<br>
> + _PIN(0x1b8, "nresetin_out", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x1bc, "porz", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x1c0, "nnmi", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x1c4, "osc0_in", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x1c8, "osc0_out", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x1cc, "osc0_vss", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x1d0, "tms", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x1d4, "tdi", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x1d8, "tdo", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x1dc, "tck", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x1e0, "ntrst", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> +#endif<br>
> + _PIN(0x1e4, "EMU0", 103, 7, "EMU0", NULL, NULL, NULL, NULL, NULL, NULL, "gpio3_7"),<br>
> + _PIN(0x1e8, "EMU1", 104, 0, "EMU1", NULL, NULL, NULL, NULL, NULL, NULL, "gpio3_8"),<br>
> +#if 0<br>
> + _PIN(0x1ec, "osc1_in", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x1f0, "osc1_out", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x1f4, "osc1_vss", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x1f8, "rtc_porz", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x1fc, "pmic_power_en", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x200, "ext_wakeup", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x204, "enz_kaldo_1p8v", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> +#endif<br>
> + _PIN(0x208, "USB0_DM", 0, 0, "USB0_DM", NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x20c, "USB0_DP", 0, 0, "USB0_DP", NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x210, "USB0_CE", 0, 0, "USB0_CE", NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x214, "USB0_ID", 0, 0, "USB0_ID", NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x218, "USB0_VBUS", 0, 0, "USB0_VBUS", NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x21c, "USB0_DRVVBUS", 18, 7, "USB0_DRVVBUS", NULL, NULL, NULL, NULL, NULL, NULL, "gpio0_18"),<br>
> + _PIN(0x220, "USB1_DM", 0, 0, "USB1_DM", NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x224, "USB1_DP", 0, 0, "USB1_DP", NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x228, "USB1_CE", 0, 0, "USB1_CE", NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x22c, "USB1_ID", 0, 0, "USB1_ID", NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x230, "USB1_VBUS", 0, 0, "USB1_VBUS", NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x234, "USB1_DRVVBUS", 109, 7, "USB1_DRVVBUS", NULL, NULL, NULL, NULL, NULL, NULL, "gpio3_13"),<br>
> +#if 0<br>
> + _PIN(0x238, "ddr_resetn", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x23c, "ddr_csn0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x240, "ddr_cke", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x244, "ddr_ck", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x248, "ddr_nck", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x24c, "ddr_casn", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x250, "ddr_rasn", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x254, "ddr_wen", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x258, "ddr_ba0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x25c, "ddr_ba1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x260, "ddr_ba2", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x264, "ddr_a0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x268, "ddr_a1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x26c, "ddr_a2", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x270, "ddr_a3", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x274, "ddr_a4", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x278, "ddr_a5", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x27c, "ddr_a6", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x280, "ddr_a7", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x284, "ddr_a8", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x288, "ddr_a9", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x28c, "ddr_a10", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x290, "ddr_a11", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x294, "ddr_a12", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x298, "ddr_a13", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x29c, "ddr_a14", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2a0, "ddr_a15", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2a4, "ddr_odt", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2a8, "ddr_d0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2ac, "ddr_d1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2b0, "ddr_d2", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2b4, "ddr_d3", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2b8, "ddr_d4", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2bc, "ddr_d5", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2c0, "ddr_d6", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2c4, "ddr_d7", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2c8, "ddr_d8", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2cc, "ddr_d9", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2d0, "ddr_d10", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2d4, "ddr_d11", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2d8, "ddr_d12", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2dc, "ddr_d13", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2e0, "ddr_d14", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2e4, "ddr_d15", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2e8, "ddr_dqm0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2ec, "ddr_dqm1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2f0, "ddr_dqs0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2f4, "ddr_dqsn0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2f8, "ddr_dqs1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x2fc, "ddr_dqsn1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x300, "ddr_vref", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x304, "ddr_vtp", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x308, "ddr_strben0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x30c, "ddr_strben1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x32c, "ain0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x328, "ain1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x324, "ain2", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x320, "ain3", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x31c, "ain4", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x318, "ain5", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x314, "ain6", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x310, "ain7", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x330, "vrefp", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x334, "vrefn", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x338, "avdd", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x33c, "avss", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x340, "iforce", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x344, "vsense", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> + _PIN(0x348, "testout", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),<br>
> +#endif<br>
> + { .ballname = NULL },<br>
> +};<br>
> +<br>
> +const struct ti_pinmux_device ti_am335x_pinmux_dev = {<br>
> + .padconf_muxmode_mask = 0x7,<br>
> + .padconf_sate_mask = 0x78,<br>
> + .padstate = ti_padstate_devmap,<br>
> + .padconf = ti_padconf_devmap,<br>
> +};<br>
> diff --git a/freebsd/sys/arm/ti/am335x/am335x_scm_padconf.h b/freebsd/sys/arm/ti/am335x/am335x_scm_padconf.h<br>
> new file mode 100644<br>
> index 00000000..b1fa22ba<br>
> --- /dev/null<br>
> +++ b/freebsd/sys/arm/ti/am335x/am335x_scm_padconf.h<br>
> @@ -0,0 +1,47 @@<br>
> +/*-<br>
> + * Copyright (c) 2012 Damjan Marion <dmarion@FreeBSD.org><br>
> + * All rights reserved.<br>
> + *<br>
> + * Redistribution and use in source and binary forms, with or without<br>
> + * modification, are permitted provided that the following conditions<br>
> + * are met:<br>
> + * 1. Redistributions of source code must retain the above copyright<br>
> + * notice, this list of conditions and the following disclaimer.<br>
> + * 2. Redistributions in binary form must reproduce the above copyright<br>
> + * notice, this list of conditions and the following disclaimer in the<br>
> + * documentation and/or other materials provided with the distribution.<br>
> + *<br>
> + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND<br>
> + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE<br>
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE<br>
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE<br>
> + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL<br>
> + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS<br>
> + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)<br>
> + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT<br>
> + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY<br>
> + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF<br>
> + * SUCH DAMAGE.<br>
> + *<br>
> + * $FreeBSD$<br>
> + */<br>
> +<br>
> +#ifndef AM335X_SCM_PADCONF_H<br>
> +#define AM335X_SCM_PADCONF_H<br>
> +<br>
> +#define SLEWCTRL (0x01 << 6) /* faster(0) or slower(1) slew rate. */<br>
> +#define RXACTIVE (0x01 << 5) /* Input enable value for the Pad */<br>
> +#define PULLTYPESEL (0x01 << 4) /* Pad pullup/pulldown type selection */<br>
> +#define PULLUDEN (0x01 << 3) /* Pullup/pulldown disabled */<br>
> +<br>
> +#define PADCONF_OUTPUT (PULLUDEN)<br>
> +#define PADCONF_OUTPUT_PULLUP (PULLTYPESEL)<br>
> +#define PADCONF_OUTPUT_PULLDOWN (0)<br>
> +#define PADCONF_INPUT (RXACTIVE | PULLUDEN)<br>
> +#define PADCONF_INPUT_PULLUP (RXACTIVE | PULLTYPESEL)<br>
> +#define PADCONF_INPUT_PULLDOWN (RXACTIVE)<br>
> +#define PADCONF_INPUT_PULLUP_SLOW (PADCONF_INPUT_PULLUP | SLEWCTRL)<br>
> +<br>
> +extern const struct ti_pinmux_device ti_am335x_pinmux_dev;<br>
> +<br>
> +#endif /* AM335X_SCM_PADCONF_H */<br>
> diff --git a/freebsd/sys/arm/ti/omap4/omap4_scm_padconf.h b/freebsd/sys/arm/ti/omap4/omap4_scm_padconf.h<br>
> new file mode 100644<br>
> index 00000000..adee0a79<br>
> --- /dev/null<br>
> +++ b/freebsd/sys/arm/ti/omap4/omap4_scm_padconf.h<br>
> @@ -0,0 +1,83 @@<br>
> +/*-<br>
> + * Copyright (c) 2011<br>
> + * Ben Gray <<a href="mailto:ben.r.gray@gmail.com" target="_blank">ben.r.gray@gmail.com</a>>.<br>
> + * All rights reserved.<br>
> + *<br>
> + * Redistribution and use in source and binary forms, with or without<br>
> + * modification, are permitted provided that the following conditions<br>
> + * are met:<br>
> + * 1. Redistributions of source code must retain the above copyright<br>
> + * notice, this list of conditions and the following disclaimer.<br>
> + * 2. Redistributions in binary form must reproduce the above copyright<br>
> + * notice, this list of conditions and the following disclaimer in the<br>
> + * documentation and/or other materials provided with the distribution.<br>
> + * 3. The name of the company nor the name of the author may be used to<br>
> + * endorse or promote products derived from this software without specific<br>
> + * prior written permission.<br>
> + *<br>
> + * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR<br>
> + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES<br>
> + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.<br>
> + * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,<br>
> + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,<br>
> + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;<br>
> + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,<br>
> + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR<br>
> + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF<br>
> + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.<br>
> + *<br>
> + * $FreeBSD$<br>
> + */<br>
> +<br>
> +#ifndef OMAP4_SCM_PADCONF_H<br>
> +#define OMAP4_SCM_PADCONF_H<br>
> +<br>
> +#define CONTROL_PADCONF_WAKEUP_EVENT (1UL << 15)<br>
> +#define CONTROL_PADCONF_WAKEUP_ENABLE (1UL << 14)<br>
> +#define CONTROL_PADCONF_OFF_PULL_UP (1UL << 13)<br>
> +#define CONTROL_PADCONF_OFF_PULL_ENABLE (1UL << 12)<br>
> +#define CONTROL_PADCONF_OFF_OUT_HIGH (1UL << 11)<br>
> +#define CONTROL_PADCONF_OFF_OUT_ENABLE (1UL << 10)<br>
> +#define CONTROL_PADCONF_OFF_ENABLE (1UL << 9)<br>
> +#define CONTROL_PADCONF_INPUT_ENABLE (1UL << 8)<br>
> +#define CONTROL_PADCONF_PULL_UP (1UL << 4)<br>
> +#define CONTROL_PADCONF_PULL_ENABLE (1UL << 3)<br>
> +#define CONTROL_PADCONF_MUXMODE_MASK (0x7)<br>
> +<br>
> +#define CONTROL_PADCONF_SATE_MASK ( CONTROL_PADCONF_WAKEUP_EVENT \<br>
> + | CONTROL_PADCONF_WAKEUP_ENABLE \<br>
> + | CONTROL_PADCONF_OFF_PULL_UP \<br>
> + | CONTROL_PADCONF_OFF_PULL_ENABLE \<br>
> + | CONTROL_PADCONF_OFF_OUT_HIGH \<br>
> + | CONTROL_PADCONF_OFF_OUT_ENABLE \<br>
> + | CONTROL_PADCONF_OFF_ENABLE \<br>
> + | CONTROL_PADCONF_INPUT_ENABLE \<br>
> + | CONTROL_PADCONF_PULL_UP \<br>
> + | CONTROL_PADCONF_PULL_ENABLE )<br>
> +<br>
> +/* Active pin states */<br>
> +#define PADCONF_PIN_OUTPUT 0<br>
> +#define PADCONF_PIN_INPUT CONTROL_PADCONF_INPUT_ENABLE<br>
> +#define PADCONF_PIN_INPUT_PULLUP ( CONTROL_PADCONF_INPUT_ENABLE \<br>
> + | CONTROL_PADCONF_PULL_ENABLE \<br>
> + | CONTROL_PADCONF_PULL_UP)<br>
> +#define PADCONF_PIN_INPUT_PULLDOWN ( CONTROL_PADCONF_INPUT_ENABLE \<br>
> + | CONTROL_PADCONF_PULL_ENABLE )<br>
> +<br>
> +/* Off mode states */<br>
> +#define PADCONF_PIN_OFF_NONE 0<br>
> +#define PADCONF_PIN_OFF_OUTPUT_HIGH ( CONTROL_PADCONF_OFF_ENABLE \<br>
> + | CONTROL_PADCONF_OFF_OUT_ENABLE \<br>
> + | CONTROL_PADCONF_OFF_OUT_HIGH)<br>
> +#define PADCONF_PIN_OFF_OUTPUT_LOW ( CONTROL_PADCONF_OFF_ENABLE \<br>
> + | CONTROL_PADCONF_OFF_OUT_ENABLE)<br>
> +#define PADCONF_PIN_OFF_INPUT_PULLUP ( CONTROL_PADCONF_OFF_ENABLE \<br>
> + | CONTROL_PADCONF_OFF_PULL_ENABLE \<br>
> + | CONTROL_PADCONF_OFF_PULL_UP)<br>
> +#define PADCONF_PIN_OFF_INPUT_PULLDOWN ( CONTROL_PADCONF_OFF_ENABLE \<br>
> + | CONTROL_PADCONF_OFF_PULL_ENABLE)<br>
> +#define PADCONF_PIN_OFF_WAKEUPENABLE CONTROL_PADCONF_WAKEUP_ENABLE<br>
> +<br>
> +extern const struct ti_pinmux_device omap4_pinmux_dev;<br>
> +<br>
> +#endif /* OMAP4_SCM_PADCONF_H */<br>
> diff --git a/freebsd/sys/arm/ti/ti_pinmux.c b/freebsd/sys/arm/ti/ti_pinmux.c<br>
> new file mode 100644<br>
> index 00000000..af47d074<br>
> --- /dev/null<br>
> +++ b/freebsd/sys/arm/ti/ti_pinmux.c<br>
> @@ -0,0 +1,463 @@<br>
> +#include <machine/rtems-bsd-kernel-space.h><br>
> +<br>
> +/*<br>
> + * Copyright (c) 2010<br>
> + * Ben Gray <<a href="mailto:ben.r.gray@gmail.com" target="_blank">ben.r.gray@gmail.com</a>>.<br>
> + * All rights reserved.<br>
> + *<br>
> + * Redistribution and use in source and binary forms, with or without<br>
> + * modification, are permitted provided that the following conditions<br>
> + * are met:<br>
> + * 1. Redistributions of source code must retain the above copyright<br>
> + * notice, this list of conditions and the following disclaimer.<br>
> + * 2. Redistributions in binary form must reproduce the above copyright<br>
> + * notice, this list of conditions and the following disclaimer in the<br>
> + * documentation and/or other materials provided with the distribution.<br>
> + * 3. All advertising materials mentioning features or use of this software<br>
> + * must display the following acknowledgement:<br>
> + * This product includes software developed by Ben Gray.<br>
> + * 4. The name of the company nor the name of the author may be used to<br>
> + * endorse or promote products derived from this software without specific<br>
> + * prior written permission.<br>
> + *<br>
> + * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR<br>
> + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES<br>
> + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.<br>
> + * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,<br>
> + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,<br>
> + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;<br>
> + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,<br>
> + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR<br>
> + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF<br>
> + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.<br>
> + */<br>
> +<br>
> +/**<br>
> + * Exposes pinmux module to pinctrl-compatible interface<br>
> + */<br>
> +#include <sys/cdefs.h><br>
> +__FBSDID("$FreeBSD$");<br>
> +<br>
> +#include <sys/param.h><br>
> +#include <sys/systm.h><br>
> +#include <sys/kernel.h><br>
> +#include <sys/module.h><br>
> +#include <sys/bus.h><br>
> +#include <rtems/bsd/sys/resource.h><br>
> +#include <sys/rman.h><br>
> +#include <sys/lock.h><br>
> +#include <sys/mutex.h><br>
> +<br>
> +#include <machine/bus.h><br>
> +#include <machine/resource.h><br>
> +<br>
> +#include <dev/ofw/openfirm.h><br>
> +#include <dev/ofw/ofw_bus.h><br>
> +#include <dev/ofw/ofw_bus_subr.h><br>
> +#include <dev/fdt/fdt_pinctrl.h><br>
> +<br>
> +#include <arm/ti/omap4/omap4_scm_padconf.h><br>
> +#include <arm/ti/am335x/am335x_scm_padconf.h><br>
> +#include <arm/ti/ti_cpuid.h><br>
> +#include "ti_pinmux.h"<br>
> +<br>
> +struct pincfg {<br>
> + uint32_t reg;<br>
> + uint32_t conf;<br>
> +};<br>
> +<br>
> +static struct resource_spec ti_pinmux_res_spec[] = {<br>
> + { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Control memory window */<br>
> + { -1, 0 }<br>
> +};<br>
> +<br>
> +static struct ti_pinmux_softc *ti_pinmux_sc;<br>
> +<br>
> +#define ti_pinmux_read_2(sc, reg) \<br>
> + bus_space_read_2((sc)->sc_bst, (sc)->sc_bsh, (reg))<br>
> +#define ti_pinmux_write_2(sc, reg, val) \<br>
> + bus_space_write_2((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))<br>
> +#define ti_pinmux_read_4(sc, reg) \<br>
> + bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))<br>
> +#define ti_pinmux_write_4(sc, reg, val) \<br>
> + bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))<br>
> +<br>
> +<br>
> +/**<br>
> + * ti_padconf_devmap - Array of pins, should be defined one per SoC<br>
> + *<br>
> + * This array is typically defined in one of the targeted *_scm_pinumx.c<br>
> + * files and is specific to the given SoC platform. Each entry in the array<br>
> + * corresponds to an individual pin.<br>
> + */<br>
> +static const struct ti_pinmux_device *ti_pinmux_dev;<br>
> +<br>
> +<br>
> +/**<br>
> + * ti_pinmux_padconf_from_name - searches the list of pads and returns entry<br>
> + * with matching ball name.<br>
> + * @ballname: the name of the ball<br>
> + *<br>
> + * RETURNS:<br>
> + * A pointer to the matching padconf or NULL if the ball wasn't found.<br>
> + */<br>
> +static const struct ti_pinmux_padconf*<br>
> +ti_pinmux_padconf_from_name(const char *ballname)<br>
> +{<br>
> + const struct ti_pinmux_padconf *padconf;<br>
> +<br>
> + padconf = ti_pinmux_dev->padconf;<br>
> + while (padconf->ballname != NULL) {<br>
> + if (strcmp(ballname, padconf->ballname) == 0)<br>
> + return(padconf);<br>
> + padconf++;<br>
> + }<br>
> +<br>
> + return (NULL);<br>
> +}<br>
> +<br>
> +/**<br>
> + * ti_pinmux_padconf_set_internal - sets the muxmode and state for a pad/pin<br>
> + * @padconf: pointer to the pad structure<br>
> + * @muxmode: the name of the mode to use for the pin, i.e. "uart1_rx"<br>
> + * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_???<br>
> + *<br>
> + *<br>
> + * LOCKING:<br>
> + * Internally locks it's own context.<br>
> + *<br>
> + * RETURNS:<br>
> + * 0 on success.<br>
> + * EINVAL if pin requested is outside valid range or already in use.<br>
> + */<br>
> +static int<br>
> +ti_pinmux_padconf_set_internal(struct ti_pinmux_softc *sc,<br>
> + const struct ti_pinmux_padconf *padconf,<br>
> + const char *muxmode, unsigned int state)<br>
> +{<br>
> + unsigned int mode;<br>
> + uint16_t reg_val;<br>
> +<br>
> + /* populate the new value for the PADCONF register */<br>
> + reg_val = (uint16_t)(state & ti_pinmux_dev->padconf_sate_mask);<br>
> +<br>
> + /* find the new mode requested */<br>
> + for (mode = 0; mode < 8; mode++) {<br>
> + if ((padconf->muxmodes[mode] != NULL) &&<br>
> + (strcmp(padconf->muxmodes[mode], muxmode) == 0)) {<br>
> + break;<br>
> + }<br>
> + }<br>
> +<br>
> + /* couldn't find the mux mode */<br>
> + if (mode >= 8) {<br>
> + printf("Invalid mode \"%s\"\n", muxmode);<br>
> + return (EINVAL);<br>
> + }<br>
> +<br>
> + /* set the mux mode */<br>
> + reg_val |= (uint16_t)(mode & ti_pinmux_dev->padconf_muxmode_mask);<br>
> +<br>
> + if (bootverbose)<br>
> + device_printf(sc->sc_dev, "setting internal %x for %s\n",<br>
> + reg_val, muxmode);<br>
> + /* write the register value (16-bit writes) */<br>
> + ti_pinmux_write_2(sc, padconf->reg_off, reg_val);<br>
> +<br>
> + return (0);<br>
> +}<br>
> +<br>
> +/**<br>
> + * ti_pinmux_padconf_set - sets the muxmode and state for a pad/pin<br>
> + * @padname: the name of the pad, i.e. "c12"<br>
> + * @muxmode: the name of the mode to use for the pin, i.e. "uart1_rx"<br>
> + * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_???<br>
> + *<br>
> + *<br>
> + * LOCKING:<br>
> + * Internally locks it's own context.<br>
> + *<br>
> + * RETURNS:<br>
> + * 0 on success.<br>
> + * EINVAL if pin requested is outside valid range or already in use.<br>
> + */<br>
> +int<br>
> +ti_pinmux_padconf_set(const char *padname, const char *muxmode, unsigned int state)<br>
> +{<br>
> + const struct ti_pinmux_padconf *padconf;<br>
> +<br>
> + if (!ti_pinmux_sc)<br>
> + return (ENXIO);<br>
> +<br>
> + /* find the pin in the devmap */<br>
> + padconf = ti_pinmux_padconf_from_name(padname);<br>
> + if (padconf == NULL)<br>
> + return (EINVAL);<br>
> +<br>
> + return (ti_pinmux_padconf_set_internal(ti_pinmux_sc, padconf, muxmode, state));<br>
> +}<br>
> +<br>
> +/**<br>
> + * ti_pinmux_padconf_get - gets the muxmode and state for a pad/pin<br>
> + * @padname: the name of the pad, i.e. "c12"<br>
> + * @muxmode: upon return will contain the name of the muxmode of the pin<br>
> + * @state: upon return will contain the state of the pad/pin<br>
> + *<br>
> + *<br>
> + * LOCKING:<br>
> + * Internally locks it's own context.<br>
> + *<br>
> + * RETURNS:<br>
> + * 0 on success.<br>
> + * EINVAL if pin requested is outside valid range or already in use.<br>
> + */<br>
> +int<br>
> +ti_pinmux_padconf_get(const char *padname, const char **muxmode,<br>
> + unsigned int *state)<br>
> +{<br>
> + const struct ti_pinmux_padconf *padconf;<br>
> + uint16_t reg_val;<br>
> +<br>
> + if (!ti_pinmux_sc)<br>
> + return (ENXIO);<br>
> +<br>
> + /* find the pin in the devmap */<br>
> + padconf = ti_pinmux_padconf_from_name(padname);<br>
> + if (padconf == NULL)<br>
> + return (EINVAL);<br>
> +<br>
> + /* read the register value (16-bit reads) */<br>
> + reg_val = ti_pinmux_read_2(ti_pinmux_sc, padconf->reg_off);<br>
> +<br>
> + /* save the state */<br>
> + if (state)<br>
> + *state = (reg_val & ti_pinmux_dev->padconf_sate_mask);<br>
> +<br>
> + /* save the mode */<br>
> + if (muxmode)<br>
> + *muxmode = padconf->muxmodes[(reg_val & ti_pinmux_dev->padconf_muxmode_mask)];<br>
> +<br>
> + return (0);<br>
> +}<br>
> +<br>
> +/**<br>
> + * ti_pinmux_padconf_set_gpiomode - converts a pad to GPIO mode.<br>
> + * @gpio: the GPIO pin number (0-195)<br>
> + * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_???<br>
> + *<br>
> + *<br>
> + *<br>
> + * LOCKING:<br>
> + * Internally locks it's own context.<br>
> + *<br>
> + * RETURNS:<br>
> + * 0 on success.<br>
> + * EINVAL if pin requested is outside valid range or already in use.<br>
> + */<br>
> +int<br>
> +ti_pinmux_padconf_set_gpiomode(uint32_t gpio, unsigned int state)<br>
> +{<br>
> + const struct ti_pinmux_padconf *padconf;<br>
> + uint16_t reg_val;<br>
> +<br>
> + if (!ti_pinmux_sc)<br>
> + return (ENXIO);<br>
> +<br>
> + /* find the gpio pin in the padconf array */<br>
> + padconf = ti_pinmux_dev->padconf;<br>
> + while (padconf->ballname != NULL) {<br>
> + if (padconf->gpio_pin == gpio)<br>
> + break;<br>
> + padconf++;<br>
> + }<br>
> + if (padconf->ballname == NULL)<br>
> + return (EINVAL);<br>
> +<br>
> + /* populate the new value for the PADCONF register */<br>
> + reg_val = (uint16_t)(state & ti_pinmux_dev->padconf_sate_mask);<br>
> +<br>
> + /* set the mux mode */<br>
> + reg_val |= (uint16_t)(padconf->gpio_mode & ti_pinmux_dev->padconf_muxmode_mask);<br>
> +<br>
> + /* write the register value (16-bit writes) */<br>
> + ti_pinmux_write_2(ti_pinmux_sc, padconf->reg_off, reg_val);<br>
> +<br>
> + return (0);<br>
> +}<br>
> +<br>
> +/**<br>
> + * ti_pinmux_padconf_get_gpiomode - gets the current GPIO mode of the pin<br>
> + * @gpio: the GPIO pin number (0-195)<br>
> + * @state: upon return will contain the state<br>
> + *<br>
> + *<br>
> + *<br>
> + * LOCKING:<br>
> + * Internally locks it's own context.<br>
> + *<br>
> + * RETURNS:<br>
> + * 0 on success.<br>
> + * EINVAL if pin requested is outside valid range or not configured as GPIO.<br>
> + */<br>
> +int<br>
> +ti_pinmux_padconf_get_gpiomode(uint32_t gpio, unsigned int *state)<br>
> +{<br>
> + const struct ti_pinmux_padconf *padconf;<br>
> + uint16_t reg_val;<br>
> +<br>
> + if (!ti_pinmux_sc)<br>
> + return (ENXIO);<br>
> +<br>
> + /* find the gpio pin in the padconf array */<br>
> + padconf = ti_pinmux_dev->padconf;<br>
> + while (padconf->ballname != NULL) {<br>
> + if (padconf->gpio_pin == gpio)<br>
> + break;<br>
> + padconf++;<br>
> + }<br>
> + if (padconf->ballname == NULL)<br>
> + return (EINVAL);<br>
> +<br>
> + /* read the current register settings */<br>
> + reg_val = ti_pinmux_read_2(ti_pinmux_sc, padconf->reg_off);<br>
> +<br>
> + /* check to make sure the pins is configured as GPIO in the first state */<br>
> + if ((reg_val & ti_pinmux_dev->padconf_muxmode_mask) != padconf->gpio_mode)<br>
> + return (EINVAL);<br>
> +<br>
> + /* read and store the reset of the state, i.e. pull-up, pull-down, etc */<br>
> + if (state)<br>
> + *state = (reg_val & ti_pinmux_dev->padconf_sate_mask);<br>
> +<br>
> + return (0);<br>
> +}<br>
> +<br>
> +static int<br>
> +ti_pinmux_configure_pins(device_t dev, phandle_t cfgxref)<br>
> +{<br>
> + struct pincfg *cfgtuples, *cfg;<br>
> + phandle_t cfgnode;<br>
> + int i, ntuples;<br>
> + static struct ti_pinmux_softc *sc;<br>
> +<br>
> + sc = device_get_softc(dev);<br>
> + cfgnode = OF_node_from_xref(cfgxref);<br>
> + ntuples = OF_getencprop_alloc_multi(cfgnode, "pinctrl-single,pins",<br>
> + sizeof(*cfgtuples), (void **)&cfgtuples);<br>
> +<br>
> + if (ntuples < 0)<br>
> + return (ENOENT);<br>
> +<br>
> + if (ntuples == 0)<br>
> + return (0); /* Empty property is not an error. */<br>
> +<br>
> + for (i = 0, cfg = cfgtuples; i < ntuples; i++, cfg++) {<br>
> + if (bootverbose) {<br>
> + char name[32];<br>
> + OF_getprop(cfgnode, "name", &name, sizeof(name));<br>
> + printf("%16s: muxreg 0x%04x muxval 0x%02x\n",<br>
> + name, cfg->reg, cfg->conf);<br>
> + }<br>
> +<br>
> + /* write the register value (16-bit writes) */<br>
> + ti_pinmux_write_2(sc, cfg->reg, cfg->conf);<br>
> + }<br>
> +<br>
> + OF_prop_free(cfgtuples);<br>
> +<br>
> + return (0);<br>
> +}<br>
> +<br>
> +/*<br>
> + * Device part of OMAP SCM driver<br>
> + */<br>
> +<br>
> +static int<br>
> +ti_pinmux_probe(device_t dev)<br>
> +{<br>
> + if (!ofw_bus_status_okay(dev))<br>
> + return (ENXIO);<br>
> +<br>
> + if (!ofw_bus_is_compatible(dev, "pinctrl-single"))<br>
> + return (ENXIO);<br>
> +<br>
> + if (ti_pinmux_sc) {<br>
> + printf("%s: multiple pinctrl modules in device tree data, ignoring\n",<br>
> + __func__);<br>
> + return (EEXIST);<br>
> + }<br>
> + switch (ti_chip()) {<br>
> +#ifdef SOC_OMAP4<br>
> + case CHIP_OMAP_4:<br>
> + ti_pinmux_dev = &omap4_pinmux_dev;<br>
> + break;<br>
> +#endif<br>
> +#ifdef SOC_TI_AM335X<br>
> + case CHIP_AM335X:<br>
> + ti_pinmux_dev = &ti_am335x_pinmux_dev;<br>
> + break;<br>
> +#endif<br>
> + default:<br>
> + printf("Unknown CPU in pinmux\n");<br>
> + return (ENXIO);<br>
> + }<br>
> +<br>
> +<br>
> + device_set_desc(dev, "TI Pinmux Module");<br>
> + return (BUS_PROBE_DEFAULT);<br>
> +}<br>
> +<br>
> +/**<br>
> + * ti_pinmux_attach - attaches the pinmux to the simplebus<br>
> + * @dev: new device<br>
> + *<br>
> + * RETURNS<br>
> + * Zero on success or ENXIO if an error occuried.<br>
> + */<br>
> +static int<br>
> +ti_pinmux_attach(device_t dev)<br>
> +{<br>
> + struct ti_pinmux_softc *sc = device_get_softc(dev);<br>
> +<br>
> +#if 0<br>
> + if (ti_pinmux_sc)<br>
> + return (ENXIO);<br>
> +#endif<br>
> +<br>
> + sc->sc_dev = dev;<br>
> +<br>
> + if (bus_alloc_resources(dev, ti_pinmux_res_spec, sc->sc_res)) {<br>
> + device_printf(dev, "could not allocate resources\n");<br>
> + return (ENXIO);<br>
> + }<br>
> +<br>
> + sc->sc_bst = rman_get_bustag(sc->sc_res[0]);<br>
> + sc->sc_bsh = rman_get_bushandle(sc->sc_res[0]);<br>
> +<br>
> + if (ti_pinmux_sc == NULL)<br>
> + ti_pinmux_sc = sc;<br>
> +<br>
> + fdt_pinctrl_register(dev, "pinctrl-single,pins");<br>
> + fdt_pinctrl_configure_tree(dev);<br>
> +<br>
> + return (0);<br>
> +}<br>
> +<br>
> +static device_method_t ti_pinmux_methods[] = {<br>
> + DEVMETHOD(device_probe, ti_pinmux_probe),<br>
> + DEVMETHOD(device_attach, ti_pinmux_attach),<br>
> +<br>
> + /* fdt_pinctrl interface */<br>
> + DEVMETHOD(fdt_pinctrl_configure, ti_pinmux_configure_pins),<br>
> + { 0, 0 }<br>
> +};<br>
> +<br>
> +static driver_t ti_pinmux_driver = {<br>
> + "ti_pinmux",<br>
> + ti_pinmux_methods,<br>
> + sizeof(struct ti_pinmux_softc),<br>
> +};<br>
> +<br>
> +static devclass_t ti_pinmux_devclass;<br>
> +<br>
> +DRIVER_MODULE(ti_pinmux, simplebus, ti_pinmux_driver, ti_pinmux_devclass, 0, 0);<br>
> diff --git a/freebsd/sys/arm/ti/ti_pinmux.h b/freebsd/sys/arm/ti/ti_pinmux.h<br>
> new file mode 100644<br>
> index 00000000..c299c494<br>
> --- /dev/null<br>
> +++ b/freebsd/sys/arm/ti/ti_pinmux.h<br>
> @@ -0,0 +1,80 @@<br>
> +/*<br>
> + * Copyright (c) 2010<br>
> + * Ben Gray <<a href="mailto:ben.r.gray@gmail.com" target="_blank">ben.r.gray@gmail.com</a>>.<br>
> + * All rights reserved.<br>
> + *<br>
> + * Redistribution and use in source and binary forms, with or without<br>
> + * modification, are permitted provided that the following conditions<br>
> + * are met:<br>
> + * 1. Redistributions of source code must retain the above copyright<br>
> + * notice, this list of conditions and the following disclaimer.<br>
> + * 2. Redistributions in binary form must reproduce the above copyright<br>
> + * notice, this list of conditions and the following disclaimer in the<br>
> + * documentation and/or other materials provided with the distribution.<br>
> + * 3. All advertising materials mentioning features or use of this software<br>
> + * must display the following acknowledgement:<br>
> + * This product includes software developed by Ben Gray.<br>
> + * 4. The name of the company nor the name of the author may be used to<br>
> + * endorse or promote products derived from this software without specific<br>
> + * prior written permission.<br>
> + *<br>
> + * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR<br>
> + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES<br>
> + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.<br>
> + * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,<br>
> + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,<br>
> + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;<br>
> + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,<br>
> + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR<br>
> + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF<br>
> + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.<br>
> + *<br>
> + * $FreeBSD$<br>
> + */<br>
> +<br>
> +<br>
> +/**<br>
> + * Functions to configure the PIN multiplexing on the chip.<br>
> + *<br>
> + * This is different from the GPIO module in that it is used to configure the<br>
> + * pins between modules not just GPIO input output.<br>
> + *<br>
> + */<br>
> +#ifndef _TI_PINMUX_H_<br>
> +#define _TI_PINMUX_H_<br>
> +<br>
> +struct ti_pinmux_padconf {<br>
> + uint16_t reg_off;<br>
> + uint16_t gpio_pin;<br>
> + uint16_t gpio_mode;<br>
> + const char *ballname;<br>
> + const char *muxmodes[8];<br>
> +};<br>
> +<br>
> +struct ti_pinmux_padstate {<br>
> + const char *state;<br>
> + uint16_t reg;<br>
> +};<br>
> +<br>
> +struct ti_pinmux_device {<br>
> + uint16_t padconf_muxmode_mask;<br>
> + uint16_t padconf_sate_mask;<br>
> + const struct ti_pinmux_padstate *padstate;<br>
> + const struct ti_pinmux_padconf *padconf;<br>
> +};<br>
> +<br>
> +struct ti_pinmux_softc {<br>
> + device_t sc_dev;<br>
> + struct resource * sc_res[4];<br>
> + bus_space_tag_t sc_bst;<br>
> + bus_space_handle_t sc_bsh;<br>
> +};<br>
> +<br>
> +int ti_pinmux_padconf_set(const char *padname, const char *muxmode, <br>
> + unsigned int state);<br>
> +int ti_pinmux_padconf_get(const char *padname, const char **muxmode,<br>
> + unsigned int *state);<br>
> +int ti_pinmux_padconf_set_gpiomode(uint32_t gpio, unsigned int state);<br>
> +int ti_pinmux_padconf_get_gpiomode(uint32_t gpio, unsigned int *state);<br>
> +<br>
> +#endif /* _TI_SCM_H_ */<br>
> diff --git a/freebsd/sys/dev/fdt/fdt_pinctrl.c b/freebsd/sys/dev/fdt/fdt_pinctrl.c<br>
> new file mode 100644<br>
> index 00000000..c2e0c612<br>
> --- /dev/null<br>
> +++ b/freebsd/sys/dev/fdt/fdt_pinctrl.c<br>
> @@ -0,0 +1,160 @@<br>
> +#include <machine/rtems-bsd-kernel-space.h><br>
> +<br>
> +/*-<br>
> + * Copyright (c) 2014 Ian Lepore <<a href="mailto:ian@freebsd.org" target="_blank">ian@freebsd.org</a>><br>
> + * All rights reserved.<br>
> + *<br>
> + * Redistribution and use in source and binary forms, with or without<br>
> + * modification, are permitted provided that the following conditions<br>
> + * are met:<br>
> + * 1. Redistributions of source code must retain the above copyright<br>
> + * notice, this list of conditions and the following disclaimer.<br>
> + * 2. Redistributions in binary form must reproduce the above copyright<br>
> + * notice, this list of conditions and the following disclaimer in the<br>
> + * documentation and/or other materials provided with the distribution.<br>
> + *<br>
> + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND<br>
> + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE<br>
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE<br>
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE<br>
> + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL<br>
> + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS<br>
> + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)<br>
> + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT<br>
> + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY<br>
> + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF<br>
> + * SUCH DAMAGE.<br>
> + *<br>
> + * $FreeBSD$<br>
> + */<br>
> +<br>
> +#include <sys/cdefs.h><br>
> +#include <sys/param.h><br>
> +<br>
> +#include <dev/ofw/ofw_bus.h><br>
> +#include <dev/ofw/ofw_bus_subr.h><br>
> +<br>
> +#include <rtems/bsd/local/fdt_pinctrl_if.h><br>
> +<br>
> +#include <dev/fdt/fdt_common.h><br>
> +#include <dev/fdt/fdt_pinctrl.h><br>
> +<br>
> +int<br>
> +fdt_pinctrl_configure(device_t client, u_int index)<br>
> +{<br>
> + device_t pinctrl;<br>
> + phandle_t *configs;<br>
> + int i, nconfigs;<br>
> + char name[16];<br>
> +<br>
> + snprintf(name, sizeof(name), "pinctrl-%u", index);<br>
> + nconfigs = OF_getencprop_alloc_multi(ofw_bus_get_node(client), name,<br>
> + sizeof(*configs), (void **)&configs);<br>
> + if (nconfigs < 0)<br>
> + return (ENOENT);<br>
> + if (nconfigs == 0)<br>
> + return (0); /* Empty property is documented as valid. */<br>
> + for (i = 0; i < nconfigs; i++) {<br>
> + if ((pinctrl = OF_device_from_xref(configs[i])) != NULL)<br>
> + FDT_PINCTRL_CONFIGURE(pinctrl, configs[i]);<br>
> + }<br>
> + OF_prop_free(configs);<br>
> + return (0);<br>
> +}<br>
> +<br>
> +int<br>
> +fdt_pinctrl_configure_by_name(device_t client, const char * name)<br>
> +{<br>
> + char * names;<br>
> + int i, offset, nameslen;<br>
> +<br>
> + nameslen = OF_getprop_alloc(ofw_bus_get_node(client), "pinctrl-names",<br>
> + (void **)&names);<br>
> + if (nameslen <= 0)<br>
> + return (ENOENT);<br>
> + for (i = 0, offset = 0; offset < nameslen; i++) {<br>
> + if (strcmp(name, &names[offset]) == 0)<br>
> + break;<br>
> + offset += strlen(&names[offset]) + 1;<br>
> + }<br>
> + OF_prop_free(names);<br>
> + if (offset < nameslen)<br>
> + return (fdt_pinctrl_configure(client, i));<br>
> + else<br>
> + return (ENOENT);<br>
> +}<br>
> +<br>
> +static int<br>
> +pinctrl_register_children(device_t pinctrl, phandle_t parent,<br>
> + const char *pinprop)<br>
> +{<br>
> + phandle_t node;<br>
> +<br>
> + /*<br>
> + * Recursively descend from parent, looking for nodes that have the<br>
> + * given property, and associate the pinctrl device_t with each one.<br>
> + */<br>
> + for (node = OF_child(parent); node != 0; node = OF_peer(node)) {<br>
> + pinctrl_register_children(pinctrl, node, pinprop);<br>
> + if (pinprop == NULL || OF_hasprop(node, pinprop)) {<br>
> + OF_device_register_xref(OF_xref_from_node(node),<br>
> + pinctrl);<br>
> + }<br>
> + }<br>
> + return (0);<br>
> +}<br>
> +<br>
> +int<br>
> +fdt_pinctrl_register(device_t pinctrl, const char *pinprop)<br>
> +{<br>
> + phandle_t node;<br>
> + int ret;<br>
> +<br>
> + TSENTER();<br>
> + node = ofw_bus_get_node(pinctrl);<br>
> + OF_device_register_xref(OF_xref_from_node(node), pinctrl);<br>
> + ret = pinctrl_register_children(pinctrl, node, pinprop);<br>
> + TSEXIT();<br>
> +<br>
> + return (ret);<br>
> +}<br>
> +<br>
> +static int<br>
> +pinctrl_configure_children(device_t pinctrl, phandle_t parent)<br>
> +{<br>
> + phandle_t node, *configs;<br>
> + int i, nconfigs;<br>
> +<br>
> + TSENTER();<br>
> +<br>
> + for (node = OF_child(parent); node != 0; node = OF_peer(node)) {<br>
> + if (!ofw_bus_node_status_okay(node))<br>
> + continue;<br>
> + pinctrl_configure_children(pinctrl, node);<br>
> + nconfigs = OF_getencprop_alloc_multi(node, "pinctrl-0",<br>
> + sizeof(*configs), (void **)&configs);<br>
> + if (nconfigs <= 0)<br>
> + continue;<br>
> + if (bootverbose) {<br>
> + char name[32];<br>
> + OF_getprop(node, "name", &name, sizeof(name));<br>
> + printf("Processing %d pin-config node(s) in pinctrl-0 for %s\n",<br>
> + nconfigs, name);<br>
> + }<br>
> + for (i = 0; i < nconfigs; i++) {<br>
> + if (OF_device_from_xref(configs[i]) == pinctrl)<br>
> + FDT_PINCTRL_CONFIGURE(pinctrl, configs[i]);<br>
> + }<br>
> + OF_prop_free(configs);<br>
> + }<br>
> + TSEXIT();<br>
> + return (0);<br>
> +}<br>
> +<br>
> +int<br>
> +fdt_pinctrl_configure_tree(device_t pinctrl)<br>
> +{<br>
> +<br>
> + return (pinctrl_configure_children(pinctrl, OF_peer(0)));<br>
> +}<br>
> +<br>
> <br>
</blockquote></div></div>