<div dir="ltr"><div dir="ltr"><br></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Wed, Aug 14, 2019 at 8:56 PM Hesham Almatary <<a href="mailto:heshamelmatary@gmail.com">heshamelmatary@gmail.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On Wed, 14 Aug 2019 at 16:18, Vaibhav Gupta <<a href="mailto:vaibhavgupta40@gmail.com" target="_blank">vaibhavgupta40@gmail.com</a>> wrote:<br>
><br>
><br>
><br>
> On Wed, Aug 14, 2019, 8:09 PM Joel Sherrill <<a href="mailto:joel@rtems.org" target="_blank">joel@rtems.org</a>> wrote:<br>
>><br>
>> On Wed, Aug 14, 2019 at 9:35 AM Vaibhav Gupta <<a href="mailto:vaibhavgupta40@gmail.com" target="_blank">vaibhavgupta40@gmail.com</a>> wrote:<br>
>> ><br>
>> > You are also getting same error :(<br>
>> > I thought problem is with my system/laptop and was trying to correct things.<br>
>> > Should we take the discussion to newlib?<br>
>><br>
>> I would like Jiri and Hesham to chime in on the next step. I don't<br>
>> know the RISC-V<br>
>> well enough to say if this is a bug in risc-v fenv or not.<br>
><br>
> Okay<br>
<br>
Can you try to build a BSP with FPU instructions? rv32imafdc? and test<br>
again? I assume this will eventually do FPU calculations that will<br>
emit FPU instructions in the case of rv32imafdc or softfloat in the<br>
case of rv32imac.<br></blockquote><div>Okay I will try this direction too then. <br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
<br>
>><br>
>><br>
>> Keep plugging at another architecture.<br>
><br>
> On that!<br>
>><br>
>><br>
>> --joel<br>
>><br>
>> ><br>
>> > Vaibhav Gupta<br>
>> ><br>
>> > On Wed, Aug 14, 2019 at 7:51 PM Joel Sherrill <<a href="mailto:joel@rtems.org" target="_blank">joel@rtems.org</a>> wrote:<br>
>> >><br>
>> >><br>
>> >> I ran it on sis built from the git repository. Unfortunately, the output doesn't match that I got on Linux.<br>
>> >><br>
>> >> =============================<br>
>> >> $ ~/sis-riscv/install/bin/sis -riscv -gdb<br>
>> >><br>
>> >> SIS - SPARC/RISCV instruction simulator 2.17, copyright Jiri Gaisler 2019<br>
>> >> Bug-reports to <a href="mailto:jiri@gaisler.se" target="_blank">jiri@gaisler.se</a><br>
>> >><br>
>> >> RISCV emulation enabled, 1 cpus online, delta 50 clocks<br>
>> >><br>
>> >> gdb: listening on port 1234 connected<br>
>> >> X40000000,0:#72<br>
>> >><br>
>> >><br>
>> >> *** BEGIN OF TEST PSXFENV 01 ***<br>
>> >> *** TEST VERSION: 5.0.0.a4d7e4cee77d16b0e34ef543f0804e7eb2954137<br>
>> >> *** TEST STATE: EXPECTED-PASS<br>
>> >> *** TEST BUILD: RTEMS_POSIX_API<br>
>> >> *** TEST TOOLS: 9.1.0 20190503 (RTEMS 5, RSB be90fb89678206e469f2f9189eb290cec49fd827, Newlib 6661a67)<br>
>> >><br>
>> >> Divide by zero and confirm fetestexcept().<br>
>> >><br>
>> >> 8<br>
>> >> 0<br>
>> >> 1<br>
>> >><br>
>> >> *** END OF TEST PSXFENV 01 ***<br>
>> >><br>
>> >><br>
>> >> *** FATAL ***<br>
>> >> fatal source: 5 (RTEMS_FATAL_SOURCE_EXIT)<br>
>> >> fatal code: 0 (0x00000000)<br>
>> >> RTEMS version: 5.0.0.a4d7e4cee77d16b0e34ef543f0804e7eb2954137<br>
>> >> RTEMS tools: 9.1.0 20190503 (RTEMS 5, RSB be90fb89678206e469f2f9189eb290cec49fd827, Newlib 6661a67)<br>
>> >> executing thread ID: 0x08a010001<br>
>> >> executing thread name: UI1<br>
>> >> =============================<br>
>> >> On Wed, Aug 14, 2019 at 7:55 AM Vaibhav Gupta <<a href="mailto:vaibhavgupta40@gmail.com" target="_blank">vaibhavgupta40@gmail.com</a>> wrote:<br>
>> >>><br>
>> >>><br>
>> >>><br>
>> >>> On Wed, Aug 14, 2019 at 6:22 PM Hesham Almatary <<a href="mailto:heshamelmatary@gmail.com" target="_blank">heshamelmatary@gmail.com</a>> wrote:<br>
>> >>>><br>
>> >>>> On Sun, 11 Aug 2019 at 16:49, Vaibhav Gupta <<a href="mailto:vaibhavgupta40@gmail.com" target="_blank">vaibhavgupta40@gmail.com</a>> wrote:<br>
>> >>>> ><br>
>> >>>> > Configure command I used to build BSP:<br>
>> >>>> > ==============================================<br>
>> >>>> > $ /home/varodek/development/rtems/kernel/rtems/configure --prefix=/home/varodek/development/rtems/5 --enable-maintainer-mode --target=riscv-rtems5 --enable-rtemsbsp=rv32imac --enable-tests --enable-posix --disable-networking --enable-cxx RISCV_ENABLE_HTIF_SUPPORT=1<br>
>> >>>> > ==============================================<br>
>> >>>> > .<br>
>> >>>> RISCV_ENABLE_HTIF_SUPPORT=1 should only be used if you're going to run<br>
>> >>>> on a Spike platform. I see you're using virt below<br>
>> >>><br>
>> >>> Yah this was the time I was doing all kind of experiments to run the hello world thing.<br>
>> >>> I have disabled HTIF now.<br>
>> >>>><br>
>> >>>><br>
>> >>>> > .<br>
>> >>>> > .<br>
>> >>>> > .<br>
>> >>>> > Qemu command I used to run test:<br>
>> >>>> > ==============================================<br>
>> >>>> > $ qemu-system-riscv32 -no-reboot -nographic -machine virt -m 256M -kernel psxfenv01.exe<br>
>> >>>> > ==============================================<br>
>> >>>> > .<br>
>> >>>> > .<br>
>> >>>> > .<br>
>> >>>> > .<br>
>> >>>> > Makefile.am<br>
>> >>>> > ==============================================<br>
>> >>>> > + if TEST_psxfenv01<br>
>> >>>> > + psx_tests += psxfenv01<br>
>> >>>> > + psxfenv01_SOURCES = psxfenv01/init.c<br>
>> >>>> > + psxfenv01_CPPFLAGS = $(AM_CPPFLAGS) $(TEST_FLAGS_psxfenv01) \<br>
>> >>>> > + $(support_includes)<br>
>> >>>> > + psxfenv01_LDADD = -lm $(LDADD)<br>
>> >>>> > + endif<br>
>> >>>> > +<br>
>> >>>> > ==============================================<br>
>> >>>> ><br>
>> >>>> > On Sun, Aug 11, 2019 at 8:36 PM Vaibhav Gupta <<a href="mailto:vaibhavgupta40@gmail.com" target="_blank">vaibhavgupta40@gmail.com</a>> wrote:<br>
>> >>>> >><br>
>> >>>> >> My code of testsuite:<br>
>> >>>> >> ===============================================<br>
>> >>>> >> /* Test 'FE_DIVBYZERO' */<br>
>> >>>> >> puts( "\nDivide by zero and confirm fetestexcept()." );<br>
>> >>>> >> a = 0.0;<br>
>> >>>> >> b = 1.0;<br>
>> >>>> >> c = b/a;<br>
>> >>>> >> printf("\n%d",FE_DIVBYZERO);<br>
>> >>>> >> fegetexceptflag(&excepts,FE_ALL_EXCEPT);<br>
>> >>>> >> printf("\n%d",excepts);<br>
>> >>>> >> r = feraiseexcept(FE_DIVBYZERO);<br>
>> >>>> >> printf("\n%d\n",r);<br>
>> >>>> >> rtems_test_assert( fetestexcept( FE_DIVBYZERO ) );<br>
>> >>>> >> ==============================================<br>
>> >>>> >> OUTPUT<br>
>> >>>> >> ==============================================<br>
>> >>>> >> Divide by zero and confirm fetestexcept().<br>
>> >>>> >><br>
>> >>>> >> 8<br>
>> >>>> >> 0<br>
>> >>>> >> 1<br>
>> >>>> >> /home/varodek/development/rtems/kernel/rtems/c/src/../../testsuites/psxtests/psxfenv01/init.c: 84 fetestexcept( FE_DIVBYZERO )<br>
>> >>>> >> ==============================================<br>
>> >>>> >> EXPECTED OUTPUT<br>
>> >>>> >> ==============================================<br>
>> >>>> >> Divide by zero and confirm fetestexcept().<br>
>> >>>> >><br>
>> >>>> >> 8<br>
>> >>>> >> 8<br>
>> >>>> >> 0<br>
>> >>>> >> ==============================================<br>
>> >>>> >> - fetestexcept( FE_DIVBYZERO ), should return a non-zero value as division-by-zero was performed.<br>
>> >>>> >> .<br>
>> >>>> >> - feraiseexcept(FE_DIVBYZERO); is also not working. It should return zero when successful<br>
>> >>>> >> .<br>
>> >>>> >> ==============================================<br>
>> >>>> >><br>
>> >>>> >> Thank You<br>
>> >>>> >> Vaibhav Gupta<br>
>> >>>> >><br>
>> >>>> > _______________________________________________<br>
>> >>>> > devel mailing list<br>
>> >>>> > <a href="mailto:devel@rtems.org" target="_blank">devel@rtems.org</a><br>
>> >>>> > <a href="http://lists.rtems.org/mailman/listinfo/devel" rel="noreferrer" target="_blank">http://lists.rtems.org/mailman/listinfo/devel</a><br>
>> >>>><br>
>> >>>> --<br>
>> >>>> Hesham<br>
>> >>><br>
>> >>> _______________________________________________<br>
>> >>> devel mailing list<br>
>> >>> <a href="mailto:devel@rtems.org" target="_blank">devel@rtems.org</a><br>
>> >>> <a href="http://lists.rtems.org/mailman/listinfo/devel" rel="noreferrer" target="_blank">http://lists.rtems.org/mailman/listinfo/devel</a><br>
<br>
<br>
<br>
-- <br>
Hesham<br>
</blockquote></div></div>