<div dir="ltr"><div dir="ltr"><br></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, Mar 16, 2020 at 11:05 AM Sebastian Huber <<a href="mailto:sebastian.huber@embedded-brains.de">sebastian.huber@embedded-brains.de</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
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<p>On 15/03/2020 17:52, suyash singh wrote:<br>
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<div dir="ltr">Hello,
<div>Out of
<div><a href="http://clang.llvm.org/docs/AddressSanitizer.html" target="_blank">AddressSanitizer</a><span>, </span><a href="http://clang.llvm.org/docs/ThreadSanitizer.html" target="_blank">ThreadSanitizer</a><span>, </span><a href="http://clang.llvm.org/docs/MemorySanitizer.html" target="_blank">MemorySanitizer</a><span>, and </span><a href="http://clang.llvm.org/docs/DataFlowSanitizer.html" target="_blank">DataFlowSanitizer</a><span>.</span> </div>
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<div>Are all of them useful as RTEMS-tools to integrate? Any
other sanitizers suggested?</div>
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<div>Asking as part of my proposed gsoc project,</div>
<div><a href="https://docs.google.com/document/d/1OerM8Iix7PbDUCyb_J_KEzcMgLbvdqxd4FnK_BqI7XI/edit?usp=sharing" target="_blank">https://docs.google.com/document/d/1OerM8Iix7PbDUCyb_J_KEzcMgLbvdqxd4FnK_BqI7XI/edit?usp=sharing</a></div>
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I am not sure of these sanitizers can be used in RTEMS at all. We
don't have virtual memory. Firstly, it would be necessary to check
for each sanitizer if it uses virtual memory. If yes, then is this
absolutely necessary or just convenient? Also the sanitizers are not
available on all LLVM architectures. We have to evaluate if the
architectures-specific adoptions can be used in RTEMS.<br></div></blockquote><div><br></div><div>+1<br></div><div><br></div><div>Another area is the compiler stack protection techniques. I have no idea if those are applicable to RTEMS but they would be useful if they can work.</div><div><br></div><div>Ignoring other constraints from embedded systems, any possible technique to use with RTEMS must be evaluated against the constraints imposed by having a single address space, no VM, and single process model.</div><div><br></div><div>You need to check if any of these will work before this project has a chance.</div><div><br></div><div>I would be willing to entertain a project for an appropriate solution that is limited to say ARM, x86, and RISC-V. </div><div><br></div><div>--joel</div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div>
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