<div dir="ltr">seems fine to me. is this stuff documented somewhere (at least for this BSP)?</div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Fri, Dec 4, 2020 at 2:07 AM Christian Mauderer <<a href="mailto:christian.mauderer@embedded-brains.de">christian.mauderer@embedded-brains.de</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">This allows simpler creation of own dts files for custom boards.<br>
<br>
Update #4180<br>
---<br>
bsps/arm/imxrt/dts/imxrt1050-evkb.dts | 287 +-----------------<br>
bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi | 309 ++++++++++++++++++++<br>
spec/build/bsps/arm/imxrt/bspimxrt.yml | 1 +<br>
3 files changed, 312 insertions(+), 285 deletions(-)<br>
create mode 100644 bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi<br>
<br>
diff --git a/bsps/arm/imxrt/dts/imxrt1050-evkb.dts b/bsps/arm/imxrt/dts/imxrt1050-evkb.dts<br>
index 968ca1dbdc..8b2c571bba 100644<br>
--- a/bsps/arm/imxrt/dts/imxrt1050-evkb.dts<br>
+++ b/bsps/arm/imxrt/dts/imxrt1050-evkb.dts<br>
@@ -34,293 +34,10 @@<br>
* rtems-bin2c -C -N imxrt_dtb "${BSP_DIR}/dts/imxrt1050-evkb.dtb" "${BSP_DIR}/dts/imxrt1050-evkb.c"<br>
*/<br>
<br>
-#include <imxrt/imxrt1050-pinfunc.h><br>
-<br>
/dts-v1/;<br>
<br>
-/ {<br>
- #address-cells = <1>;<br>
- #size-cells = <1>;<br>
-<br>
- chosen: chosen {};<br>
-<br>
- aliases {<br>
- gpio0 = &gpio1;<br>
- gpio1 = &gpio2;<br>
- gpio2 = &gpio3;<br>
- gpio3 = &gpio4;<br>
- gpio4 = &gpio5;<br>
- };<br>
-<br>
- nvic: interrupt-controller@e000e100 {<br>
- compatible = "arm,armv7m-nvic";<br>
- interrupt-controller;<br>
- #interrupt-cells = <1>;<br>
- reg = <0xe000e100 0xc00>;<br>
- };<br>
-<br>
- systick: timer@e000e010 {<br>
- compatible = "arm,armv7m-systick";<br>
- reg = <0xe000e010 0x10>;<br>
- status = "disabled";<br>
- };<br>
-<br>
- soc {<br>
- compatible = "simple-bus";<br>
- #address-cells = <1>;<br>
- #size-cells = <1>;<br>
- interrupt-parent = <&nvic>;<br>
- ranges;<br>
-<br>
- aips-bus@40000000 {<br>
- compatible = "fsl,aips-bus", "simple-bus";<br>
- #address-cells = <1>;<br>
- #size-cells = <1>;<br>
- reg = <0x40000000 0x00100000>;<br>
- ranges;<br>
-<br>
- gpio5: gpio@400c0000 {<br>
- compatible = "fsl,imxrt-gpio",<br>
- "fsl,imx6ul-gpio", "fsl,imx35-gpio";<br>
- reg = <0x400c0000 0x4000>;<br>
- interrupts = <88>, <89>;<br>
- gpio-controller;<br>
- #gpio-cells = <2>;<br>
- interrupt-controller;<br>
- #interrupt-cells = <2>;<br>
- };<br>
- };<br>
-<br>
- aips-bus@40100000 {<br>
- compatible = "fsl,aips-bus", "simple-bus";<br>
- #address-cells = <1>;<br>
- #size-cells = <1>;<br>
- reg = <0x40100000 0x00100000>;<br>
- ranges;<br>
-<br>
- gpio4: gpio@401c4000 {<br>
- compatible = "fsl,imxrt-gpio",<br>
- "fsl,imx6ul-gpio", "fsl,imx35-gpio";<br>
- reg = <0x401c4000 0x4000>;<br>
- interrupts = <86>, <87>;<br>
- gpio-controller;<br>
- #gpio-cells = <2>;<br>
- interrupt-controller;<br>
- #interrupt-cells = <2>;<br>
- };<br>
-<br>
- gpio3: gpio@401c0000 {<br>
- compatible = "fsl,imxrt-gpio",<br>
- "fsl,imx6ul-gpio", "fsl,imx35-gpio";<br>
- reg = <0x401c0000 0x4000>;<br>
- interrupts = <84>, <85>;<br>
- gpio-controller;<br>
- #gpio-cells = <2>;<br>
- interrupt-controller;<br>
- #interrupt-cells = <2>;<br>
- };<br>
-<br>
- gpio2: gpio@401bc000 {<br>
- compatible = "fsl,imxrt-gpio",<br>
- "fsl,imx6ul-gpio", "fsl,imx35-gpio";<br>
- reg = <0x401bc000 0x4000>;<br>
- interrupts = <82>, <83>;<br>
- gpio-controller;<br>
- #gpio-cells = <2>;<br>
- interrupt-controller;<br>
- #interrupt-cells = <2>;<br>
- };<br>
-<br>
- gpio1: gpio@401b8000 {<br>
- compatible = "fsl,imxrt-gpio",<br>
- "fsl,imx6ul-gpio", "fsl,imx35-gpio";<br>
- reg = <0x401b8000 0x4000>;<br>
- interrupts = <80>, <81>, <72>, <73>, <74>,<br>
- <75>, <76>, <77>, <78>, <79>;<br>
- gpio-controller;<br>
- #gpio-cells = <2>;<br>
- interrupt-controller;<br>
- #interrupt-cells = <2>;<br>
- };<br>
-<br>
- lpuart1: uart@40184000 {<br>
- compatible = "nxp,imxrt-lpuart";<br>
- reg = <0x40184000 0x4000>;<br>
- interrupts = <20>;<br>
- status = "disabled";<br>
- rtems,path = "/dev/ttyS1";<br>
- };<br>
-<br>
- lpuart2: uart@40188000 {<br>
- compatible = "nxp,imxrt-lpuart";<br>
- reg = <0x40188000 0x4000>;<br>
- interrupts = <21>;<br>
- status = "disabled";<br>
- rtems,path = "/dev/ttyS2";<br>
- };<br>
-<br>
- lpuart3: uart@4018c000 {<br>
- compatible = "nxp,imxrt-lpuart";<br>
- reg = <0x4018c000 0x4000>;<br>
- interrupts = <22>;<br>
- status = "disabled";<br>
- rtems,path = "/dev/ttyS3";<br>
- };<br>
-<br>
- lpuart4: uart@40190000 {<br>
- compatible = "nxp,imxrt-lpuart";<br>
- reg = <0x40190000 0x4000>;<br>
- interrupts = <23>;<br>
- status = "disabled";<br>
- rtems,path = "/dev/ttyS4";<br>
- };<br>
-<br>
- lpuart5: uart@40194000 {<br>
- compatible = "nxp,imxrt-lpuart";<br>
- reg = <0x40194000 0x4000>;<br>
- interrupts = <24>;<br>
- status = "disabled";<br>
- rtems,path = "/dev/ttyS5";<br>
- };<br>
-<br>
- lpuart6: uart@40198000 {<br>
- compatible = "nxp,imxrt-lpuart";<br>
- reg = <0x40198000 0x4000>;<br>
- interrupts = <25>;<br>
- status = "disabled";<br>
- rtems,path = "/dev/ttyS6";<br>
- };<br>
-<br>
- lpuart7: uart@4019c000 {<br>
- compatible = "nxp,imxrt-lpuart";<br>
- reg = <0x4019c000 0x4000>;<br>
- interrupts = <26>;<br>
- status = "disabled";<br>
- rtems,path = "/dev/ttyS7";<br>
- };<br>
-<br>
- lpuart8: uart@401a0000 {<br>
- compatible = "nxp,imxrt-lpuart";<br>
- reg = <0x401a0000 0x4000>;<br>
- interrupts = <27>;<br>
- status = "disabled";<br>
- rtems,path = "/dev/ttyS8";<br>
- };<br>
-<br>
- iomuxc: pinctrl@401f8000 {<br>
- compatible = "nxp,imxrt1050-iomuxc";<br>
- reg = <0x401f8000 0x4000>;<br>
- };<br>
- };<br>
-<br>
- aips-bus@40200000 {<br>
- compatible = "fsl,aips-bus", "simple-bus";<br>
- #address-cells = <1>;<br>
- #size-cells = <1>;<br>
- reg = <0x40200000 0x00100000>;<br>
- ranges;<br>
-<br>
- fec1: ethernet@402d8000 {<br>
- compatible = "fsl,imxrt-fec", "fsl,imx6ul-fec";<br>
- reg = <0x402d8000 0x4000>;<br>
- interrupt-names = "int0", "pps";<br>
- interrupts = <114>, <115>;<br>
- fsl,num-tx-queues = <1>;<br>
- fsl,num-rx-queues = <1>;<br>
- phy-mode = "rmii";<br>
- status = "disabled";<br>
- };<br>
- };<br>
-<br>
- aips-bus@40300000 {<br>
- compatible = "fsl,aips-bus", "simple-bus";<br>
- #address-cells = <1>;<br>
- #size-cells = <1>;<br>
- reg = <0x40300000 0x00100000>;<br>
- ranges;<br>
-<br>
- lpspi1: lpspi@40394000 {<br>
- #address-cells = <1>;<br>
- #size-cells = <0>;<br>
- compatible = "nxp,imxrt-lpspi";<br>
- reg = <0x40394000 0x4000>;<br>
- interrupts = <32>;<br>
- status = "disabled";<br>
- rtems,path = "/dev/spi1";<br>
- };<br>
-<br>
- lpspi2: lpspi@40398000 {<br>
- #address-cells = <1>;<br>
- #size-cells = <0>;<br>
- compatible = "nxp,imxrt-lpspi";<br>
- reg = <0x40398000 0x4000>;<br>
- interrupts = <33>;<br>
- status = "disabled";<br>
- rtems,path = "/dev/spi2";<br>
- };<br>
-<br>
- lpspi3: lpspi@4039c000 {<br>
- #address-cells = <1>;<br>
- #size-cells = <0>;<br>
- compatible = "nxp,imxrt-lpspi";<br>
- reg = <0x4039c000 0x4000>;<br>
- interrupts = <34>;<br>
- status = "disabled";<br>
- rtems,path = "/dev/spi3";<br>
- };<br>
-<br>
- lpspi4: lpspi@403a0000 {<br>
- #address-cells = <1>;<br>
- #size-cells = <0>;<br>
- compatible = "nxp,imxrt-lpspi";<br>
- reg = <0x403a0000 0x4000>;<br>
- interrupts = <35>;<br>
- status = "disabled";<br>
- rtems,path = "/dev/spi4";<br>
- };<br>
-<br>
- lpi2c1: lpi2c@403f0000 {<br>
- #address-cells = <1>;<br>
- #size-cells = <0>;<br>
- compatible = "nxp,imxrt-lpi2c";<br>
- reg = <0x403f0000 0x4000>;<br>
- interrupts = <28>;<br>
- status = "disabled";<br>
- rtems,path = "/dev/i2c1";<br>
- };<br>
-<br>
- lpi2c2: lpi2c@403f4000 {<br>
- #address-cells = <1>;<br>
- #size-cells = <0>;<br>
- compatible = "nxp,imxrt-lpi2c";<br>
- reg = <0x403f4000 0x4000>;<br>
- interrupts = <29>;<br>
- status = "disabled";<br>
- rtems,path = "/dev/i2c2";<br>
- };<br>
-<br>
- lpi2c3: lpi2c@403f8000 {<br>
- #address-cells = <1>;<br>
- #size-cells = <0>;<br>
- compatible = "nxp,imxrt-lpi2c";<br>
- reg = <0x403f8000 0x4000>;<br>
- interrupts = <30>;<br>
- status = "disabled";<br>
- rtems,path = "/dev/i2c3";<br>
- };<br>
-<br>
- lpi2c4: lpi2c@403fc000 {<br>
- #address-cells = <1>;<br>
- #size-cells = <0>;<br>
- compatible = "nxp,imxrt-lpi2c";<br>
- reg = <0x403fc000 0x4000>;<br>
- interrupts = <31>;<br>
- status = "disabled";<br>
- rtems,path = "/dev/i2c4";<br>
- };<br>
- };<br>
- };<br>
-};<br>
+#include <imxrt/imxrt1050-pinfunc.h><br>
+#include <imxrt/imxrt1050.dtsi><br>
<br>
&lpuart1 {<br>
pinctrl-0 = <&pinctrl_lpuart1>;<br>
diff --git a/bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi b/bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi<br>
new file mode 100644<br>
index 0000000000..ea55eff723<br>
--- /dev/null<br>
+++ b/bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi<br>
@@ -0,0 +1,309 @@<br>
+/* SPDX-License-Identifier: BSD-2-Clause */<br>
+<br>
+/*<br>
+ * Copyright (C) 2020 embedded brains GmbH (<a href="http://www.embedded-brains.de" rel="noreferrer" target="_blank">http://www.embedded-brains.de</a>)<br>
+ * Redistribution and use in source and binary forms, with or without<br>
+ * modification, are permitted provided that the following conditions<br>
+ * are met:<br>
+ * 1. Redistributions of source code must retain the above copyright<br>
+ * notice, this list of conditions and the following disclaimer.<br>
+ * 2. Redistributions in binary form must reproduce the above copyright<br>
+ * notice, this list of conditions and the following disclaimer in the<br>
+ * documentation and/or other materials provided with the distribution.<br>
+ * <br>
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"<br>
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE<br>
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE<br>
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE<br>
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR<br>
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF<br>
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS<br>
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN<br>
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)<br>
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE<br>
+ * POSSIBILITY OF SUCH DAMAGE.<br>
+ */<br>
+<br>
+/ {<br>
+ #address-cells = <1>;<br>
+ #size-cells = <1>;<br>
+<br>
+ chosen: chosen {};<br>
+<br>
+ aliases {<br>
+ gpio0 = &gpio1;<br>
+ gpio1 = &gpio2;<br>
+ gpio2 = &gpio3;<br>
+ gpio3 = &gpio4;<br>
+ gpio4 = &gpio5;<br>
+ };<br>
+<br>
+ nvic: interrupt-controller@e000e100 {<br>
+ compatible = "arm,armv7m-nvic";<br>
+ interrupt-controller;<br>
+ #interrupt-cells = <1>;<br>
+ reg = <0xe000e100 0xc00>;<br>
+ };<br>
+<br>
+ systick: timer@e000e010 {<br>
+ compatible = "arm,armv7m-systick";<br>
+ reg = <0xe000e010 0x10>;<br>
+ status = "disabled";<br>
+ };<br>
+<br>
+ soc {<br>
+ compatible = "simple-bus";<br>
+ #address-cells = <1>;<br>
+ #size-cells = <1>;<br>
+ interrupt-parent = <&nvic>;<br>
+ ranges;<br>
+<br>
+ aips-bus@40000000 {<br>
+ compatible = "fsl,aips-bus", "simple-bus";<br>
+ #address-cells = <1>;<br>
+ #size-cells = <1>;<br>
+ reg = <0x40000000 0x00100000>;<br>
+ ranges;<br>
+<br>
+ gpio5: gpio@400c0000 {<br>
+ compatible = "fsl,imxrt-gpio",<br>
+ "fsl,imx6ul-gpio", "fsl,imx35-gpio";<br>
+ reg = <0x400c0000 0x4000>;<br>
+ interrupts = <88>, <89>;<br>
+ gpio-controller;<br>
+ #gpio-cells = <2>;<br>
+ interrupt-controller;<br>
+ #interrupt-cells = <2>;<br>
+ };<br>
+ };<br>
+<br>
+ aips-bus@40100000 {<br>
+ compatible = "fsl,aips-bus", "simple-bus";<br>
+ #address-cells = <1>;<br>
+ #size-cells = <1>;<br>
+ reg = <0x40100000 0x00100000>;<br>
+ ranges;<br>
+<br>
+ gpio4: gpio@401c4000 {<br>
+ compatible = "fsl,imxrt-gpio",<br>
+ "fsl,imx6ul-gpio", "fsl,imx35-gpio";<br>
+ reg = <0x401c4000 0x4000>;<br>
+ interrupts = <86>, <87>;<br>
+ gpio-controller;<br>
+ #gpio-cells = <2>;<br>
+ interrupt-controller;<br>
+ #interrupt-cells = <2>;<br>
+ };<br>
+<br>
+ gpio3: gpio@401c0000 {<br>
+ compatible = "fsl,imxrt-gpio",<br>
+ "fsl,imx6ul-gpio", "fsl,imx35-gpio";<br>
+ reg = <0x401c0000 0x4000>;<br>
+ interrupts = <84>, <85>;<br>
+ gpio-controller;<br>
+ #gpio-cells = <2>;<br>
+ interrupt-controller;<br>
+ #interrupt-cells = <2>;<br>
+ };<br>
+<br>
+ gpio2: gpio@401bc000 {<br>
+ compatible = "fsl,imxrt-gpio",<br>
+ "fsl,imx6ul-gpio", "fsl,imx35-gpio";<br>
+ reg = <0x401bc000 0x4000>;<br>
+ interrupts = <82>, <83>;<br>
+ gpio-controller;<br>
+ #gpio-cells = <2>;<br>
+ interrupt-controller;<br>
+ #interrupt-cells = <2>;<br>
+ };<br>
+<br>
+ gpio1: gpio@401b8000 {<br>
+ compatible = "fsl,imxrt-gpio",<br>
+ "fsl,imx6ul-gpio", "fsl,imx35-gpio";<br>
+ reg = <0x401b8000 0x4000>;<br>
+ interrupts = <80>, <81>, <72>, <73>, <74>,<br>
+ <75>, <76>, <77>, <78>, <79>;<br>
+ gpio-controller;<br>
+ #gpio-cells = <2>;<br>
+ interrupt-controller;<br>
+ #interrupt-cells = <2>;<br>
+ };<br>
+<br>
+ lpuart1: uart@40184000 {<br>
+ compatible = "nxp,imxrt-lpuart";<br>
+ reg = <0x40184000 0x4000>;<br>
+ interrupts = <20>;<br>
+ status = "disabled";<br>
+ rtems,path = "/dev/ttyS1";<br>
+ };<br>
+<br>
+ lpuart2: uart@40188000 {<br>
+ compatible = "nxp,imxrt-lpuart";<br>
+ reg = <0x40188000 0x4000>;<br>
+ interrupts = <21>;<br>
+ status = "disabled";<br>
+ rtems,path = "/dev/ttyS2";<br>
+ };<br>
+<br>
+ lpuart3: uart@4018c000 {<br>
+ compatible = "nxp,imxrt-lpuart";<br>
+ reg = <0x4018c000 0x4000>;<br>
+ interrupts = <22>;<br>
+ status = "disabled";<br>
+ rtems,path = "/dev/ttyS3";<br>
+ };<br>
+<br>
+ lpuart4: uart@40190000 {<br>
+ compatible = "nxp,imxrt-lpuart";<br>
+ reg = <0x40190000 0x4000>;<br>
+ interrupts = <23>;<br>
+ status = "disabled";<br>
+ rtems,path = "/dev/ttyS4";<br>
+ };<br>
+<br>
+ lpuart5: uart@40194000 {<br>
+ compatible = "nxp,imxrt-lpuart";<br>
+ reg = <0x40194000 0x4000>;<br>
+ interrupts = <24>;<br>
+ status = "disabled";<br>
+ rtems,path = "/dev/ttyS5";<br>
+ };<br>
+<br>
+ lpuart6: uart@40198000 {<br>
+ compatible = "nxp,imxrt-lpuart";<br>
+ reg = <0x40198000 0x4000>;<br>
+ interrupts = <25>;<br>
+ status = "disabled";<br>
+ rtems,path = "/dev/ttyS6";<br>
+ };<br>
+<br>
+ lpuart7: uart@4019c000 {<br>
+ compatible = "nxp,imxrt-lpuart";<br>
+ reg = <0x4019c000 0x4000>;<br>
+ interrupts = <26>;<br>
+ status = "disabled";<br>
+ rtems,path = "/dev/ttyS7";<br>
+ };<br>
+<br>
+ lpuart8: uart@401a0000 {<br>
+ compatible = "nxp,imxrt-lpuart";<br>
+ reg = <0x401a0000 0x4000>;<br>
+ interrupts = <27>;<br>
+ status = "disabled";<br>
+ rtems,path = "/dev/ttyS8";<br>
+ };<br>
+<br>
+ iomuxc: pinctrl@401f8000 {<br>
+ compatible = "nxp,imxrt1050-iomuxc";<br>
+ reg = <0x401f8000 0x4000>;<br>
+ };<br>
+ };<br>
+<br>
+ aips-bus@40200000 {<br>
+ compatible = "fsl,aips-bus", "simple-bus";<br>
+ #address-cells = <1>;<br>
+ #size-cells = <1>;<br>
+ reg = <0x40200000 0x00100000>;<br>
+ ranges;<br>
+<br>
+ fec1: ethernet@402d8000 {<br>
+ compatible = "fsl,imxrt-fec", "fsl,imx6ul-fec";<br>
+ reg = <0x402d8000 0x4000>;<br>
+ interrupt-names = "int0", "pps";<br>
+ interrupts = <114>, <115>;<br>
+ fsl,num-tx-queues = <1>;<br>
+ fsl,num-rx-queues = <1>;<br>
+ phy-mode = "rmii";<br>
+ status = "disabled";<br>
+ };<br>
+ };<br>
+<br>
+ aips-bus@40300000 {<br>
+ compatible = "fsl,aips-bus", "simple-bus";<br>
+ #address-cells = <1>;<br>
+ #size-cells = <1>;<br>
+ reg = <0x40300000 0x00100000>;<br>
+ ranges;<br>
+<br>
+ lpspi1: lpspi@40394000 {<br>
+ #address-cells = <1>;<br>
+ #size-cells = <0>;<br>
+ compatible = "nxp,imxrt-lpspi";<br>
+ reg = <0x40394000 0x4000>;<br>
+ interrupts = <32>;<br>
+ status = "disabled";<br>
+ rtems,path = "/dev/spi1";<br>
+ };<br>
+<br>
+ lpspi2: lpspi@40398000 {<br>
+ #address-cells = <1>;<br>
+ #size-cells = <0>;<br>
+ compatible = "nxp,imxrt-lpspi";<br>
+ reg = <0x40398000 0x4000>;<br>
+ interrupts = <33>;<br>
+ status = "disabled";<br>
+ rtems,path = "/dev/spi2";<br>
+ };<br>
+<br>
+ lpspi3: lpspi@4039c000 {<br>
+ #address-cells = <1>;<br>
+ #size-cells = <0>;<br>
+ compatible = "nxp,imxrt-lpspi";<br>
+ reg = <0x4039c000 0x4000>;<br>
+ interrupts = <34>;<br>
+ status = "disabled";<br>
+ rtems,path = "/dev/spi3";<br>
+ };<br>
+<br>
+ lpspi4: lpspi@403a0000 {<br>
+ #address-cells = <1>;<br>
+ #size-cells = <0>;<br>
+ compatible = "nxp,imxrt-lpspi";<br>
+ reg = <0x403a0000 0x4000>;<br>
+ interrupts = <35>;<br>
+ status = "disabled";<br>
+ rtems,path = "/dev/spi4";<br>
+ };<br>
+<br>
+ lpi2c1: lpi2c@403f0000 {<br>
+ #address-cells = <1>;<br>
+ #size-cells = <0>;<br>
+ compatible = "nxp,imxrt-lpi2c";<br>
+ reg = <0x403f0000 0x4000>;<br>
+ interrupts = <28>;<br>
+ status = "disabled";<br>
+ rtems,path = "/dev/i2c1";<br>
+ };<br>
+<br>
+ lpi2c2: lpi2c@403f4000 {<br>
+ #address-cells = <1>;<br>
+ #size-cells = <0>;<br>
+ compatible = "nxp,imxrt-lpi2c";<br>
+ reg = <0x403f4000 0x4000>;<br>
+ interrupts = <29>;<br>
+ status = "disabled";<br>
+ rtems,path = "/dev/i2c2";<br>
+ };<br>
+<br>
+ lpi2c3: lpi2c@403f8000 {<br>
+ #address-cells = <1>;<br>
+ #size-cells = <0>;<br>
+ compatible = "nxp,imxrt-lpi2c";<br>
+ reg = <0x403f8000 0x4000>;<br>
+ interrupts = <30>;<br>
+ status = "disabled";<br>
+ rtems,path = "/dev/i2c3";<br>
+ };<br>
+<br>
+ lpi2c4: lpi2c@403fc000 {<br>
+ #address-cells = <1>;<br>
+ #size-cells = <0>;<br>
+ compatible = "nxp,imxrt-lpi2c";<br>
+ reg = <0x403fc000 0x4000>;<br>
+ interrupts = <31>;<br>
+ status = "disabled";<br>
+ rtems,path = "/dev/i2c4";<br>
+ };<br>
+ };<br>
+ };<br>
+};<br>
diff --git a/spec/build/bsps/arm/imxrt/bspimxrt.yml b/spec/build/bsps/arm/imxrt/bspimxrt.yml<br>
index cc9659dee0..85c51e04a8 100644<br>
--- a/spec/build/bsps/arm/imxrt/bspimxrt.yml<br>
+++ b/spec/build/bsps/arm/imxrt/bspimxrt.yml<br>
@@ -95,6 +95,7 @@ install:<br>
- bsps/arm/imxrt/include/bsp/irq.h<br>
- destination: ${BSP_INCLUDEDIR}/imxrt<br>
source:<br>
+ - bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi<br>
- bsps/arm/imxrt/include/imxrt/imxrt1050-pinfunc.h<br>
- bsps/arm/imxrt/include/imxrt/memory.h<br>
- bsps/arm/imxrt/include/imxrt/mpu-config.h<br>
-- <br>
2.26.2<br>
<br>
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</blockquote></div>