<div dir="ltr">
<div>The change with 
void HAL_ETH_MspInit(ETH_HandleTypeDef *heth) was just that most <br></div><div>other function definitions I saw were on one line so I assumed this was a little formatting mistake. I can discard the change if this was intentional. <br><br>I can add #ifndef __rtems__ for the section with the legacy defines as well.<br></div><div></div><div>Kind Regards<br></div><div>Robin<br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, 29 Mar 2021 at 17:52, Gedare Bloom <<a href="mailto:gedare@rtems.org">gedare@rtems.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On Mon, Mar 29, 2021 at 6:17 AM Robin Mueller <<a href="mailto:robin.mueller.m@gmail.com" target="_blank">robin.mueller.m@gmail.com</a>> wrote:<br>
><br>
> This patch adds support for the STM32H743ZI-Nucleo board<br>
> variation. This currently works by setting the STM32H743ZI_NUCLEO<br>
> flag in the config.ini flag<br>
><br>
> It also adds basic lwIP support which can be enabled<br>
> with the flag STM32H7_ADD_LWIP. This enables certain functionalities<br>
> required for lwIP to work properly<br>
><br>
> This patch also changes the default implementation<br>
> of HAL_GetTick to return the system tick by forwarding the call<br>
> to the respective RTEMS function.<br>
><br>
> ---<br>
>  bsps/arm/stm32h7/console/console-usart3-cfg.c | 21 ++++++++++++++++<br>
>  bsps/arm/stm32h7/hal/stm32h7xx_hal_eth.c      | 16 ++++++++-----<br>
>  .../stm32h7/include/Legacy/stm32_hal_legacy.h |  4 +++-<br>
>  bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h | 11 ++++++++-<br>
>  bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h |  1 +<br>
>  bsps/arm/stm32h7/start/bspstart.c             |  2 +-<br>
>  bsps/arm/stm32h7/start/stm32h7-hal-eth.c      |  3 +--<br>
>  spec/build/bsps/arm/stm32h7/bspstm32h7.yml    |  4 ++++<br>
>  spec/build/bsps/arm/stm32h7/opth743nucleo.yml | 13 ++++++++++<br>
>  spec/build/bsps/arm/stm32h7/optlwip.yml       | 24 +++++++++++++++++++<br>
>  10 files changed, 88 insertions(+), 11 deletions(-)<br>
>  create mode 100644 spec/build/bsps/arm/stm32h7/opth743nucleo.yml<br>
>  create mode 100644 spec/build/bsps/arm/stm32h7/optlwip.yml<br>
><br>
> diff --git a/bsps/arm/stm32h7/console/console-usart3-cfg.c b/bsps/arm/stm32h7/console/console-usart3-cfg.c<br>
> index b40f6da5aa..dc552610e1 100644<br>
> --- a/bsps/arm/stm32h7/console/console-usart3-cfg.c<br>
> +++ b/bsps/arm/stm32h7/console/console-usart3-cfg.c<br>
> @@ -25,12 +25,32 @@<br>
>   * POSSIBILITY OF SUCH DAMAGE.<br>
>   */<br>
><br>
> +#ifdef __rtems__<br>
> +#include <bspopts.h><br>
> +#endif<br>
> +<br>
>  #ifdef HAVE_CONFIG_H<br>
>  #include "config.h"<br>
>  #endif<br>
><br>
>  #include <stm32h7/hal.h><br>
><br>
> +#if STM32H743ZI_NUCLEO == 1<br>
> +const stm32h7_uart_config stm32h7_usart3_config = {<br>
> +  .gpio = {<br>
> +    .regs = GPIOD,<br>
> +    .config = {<br>
> +      .Pin = GPIO_PIN_8 | GPIO_PIN_9,<br>
> +      .Mode = GPIO_MODE_AF_PP,<br>
> +      .Pull = GPIO_NOPULL,<br>
> +      .Speed = GPIO_SPEED_FREQ_LOW,<br>
> +      .Alternate = GPIO_AF7_USART3<br>
> +    }<br>
> +  },<br>
> +  .irq = USART3_IRQn,<br>
> +  .device_index = 2<br>
> +};<br>
> +#else<br>
>  const stm32h7_uart_config stm32h7_usart3_config = {<br>
>    .gpio = {<br>
>      .regs = GPIOB,<br>
> @@ -45,3 +65,4 @@ const stm32h7_uart_config stm32h7_usart3_config = {<br>
>    .irq = USART3_IRQn,<br>
>    .device_index = 2<br>
>  };<br>
> +#endif /*  STM32H743ZI_NUCLEO == 1 */<br>
> diff --git a/bsps/arm/stm32h7/hal/stm32h7xx_hal_eth.c b/bsps/arm/stm32h7/hal/stm32h7xx_hal_eth.c<br>
> index 4f2634df5b..6c3590bce8 100644<br>
> --- a/bsps/arm/stm32h7/hal/stm32h7xx_hal_eth.c<br>
> +++ b/bsps/arm/stm32h7/hal/stm32h7xx_hal_eth.c<br>
> @@ -146,6 +146,10 @@<br>
>  /* Includes ------------------------------------------------------------------*/<br>
>  #include "stm32h7xx_hal.h"<br>
><br>
> +#ifdef __rtems__<br>
> +#include <bspopts.h><br>
> +#endif<br>
> +<br>
>  /** @addtogroup STM32H7xx_HAL_Driver<br>
>    * @{<br>
>    */<br>
> @@ -361,10 +365,10 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)<br>
>    /*------------------ MAC, MTL and DMA default Configuration ----------------*/<br>
>    ETH_MACDMAConfig(heth);<br>
><br>
> -#ifndef __rtems__<br>
> +#if STM32H7_ADD_LWIP == 1<br>
<br>
Someone else may be able to address whether we need to disable this<br>
stuff for 'non-lwip' builds of stm32. There is an ongoing effort to<br>
collect lwip drivers and lwip build as a library after building rtems,<br>
so maybe this will move eventually to the lwip driver repo when that<br>
gets into production.<br>
<br>
>    /* SET DSL to 64 bit */<br>
>    MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_DSL, ETH_DMACCR_DSL_64BIT);<br>
> -#endif /* __rtems__ */<br>
> +#endif<br>
><br>
>    /* Set Receive Buffers Length (must be a multiple of 4) */<br>
>    if ((heth->Init.RxBuffLen % 0x4U) != 0x0U)<br>
> @@ -2647,7 +2651,7 @@ static void ETH_MAC_MDIO_ClkConfig(ETH_HandleTypeDef *heth)<br>
>    */<br>
>  static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth)<br>
>  {<br>
> -#ifndef __rtems__<br>
> +#if STM32H7_ADD_LWIP == 1<br>
>    ETH_DMADescTypeDef *dmatxdesc;<br>
>    uint32_t i;<br>
><br>
> @@ -2674,7 +2678,7 @@ static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth)<br>
><br>
>    /* Set Transmit Descriptor Tail pointer */<br>
>    WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t) heth->Init.TxDesc);<br>
> -#endif /* __rtems__ */<br>
> +#endif /* STM32H7_ADD_LWIP == 1 */<br>
>  }<br>
><br>
>  /**<br>
> @@ -2686,7 +2690,7 @@ static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth)<br>
>    */<br>
>  static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth)<br>
>  {<br>
> -#ifndef __rtems__<br>
> +#if STM32H7_ADD_LWIP == 1<br>
>    ETH_DMADescTypeDef *dmarxdesc;<br>
>    uint32_t i;<br>
><br>
> @@ -2719,7 +2723,7 @@ static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth)<br>
><br>
>    /* Set Receive Descriptor Tail pointer Address */<br>
>    WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (((uint32_t)(ETH_RX_DESC_CNT - 1))*sizeof(ETH_DMADescTypeDef)))));<br>
> -#endif /* __rtems__ */<br>
> +#endif /* STM32H7_ADD_LWIP == 1 */<br>
>  }<br>
><br>
>  /**<br>
> diff --git a/bsps/arm/stm32h7/include/Legacy/stm32_hal_legacy.h b/bsps/arm/stm32h7/include/Legacy/stm32_hal_legacy.h<br>
> index c311c1618e..c4fa5d7151 100644<br>
> --- a/bsps/arm/stm32h7/include/Legacy/stm32_hal_legacy.h<br>
> +++ b/bsps/arm/stm32h7/include/Legacy/stm32_hal_legacy.h<br>
> @@ -420,7 +420,9 @@<br>
>  #define TYPEPROGRAMDATA_FASTBYTE      FLASH_TYPEPROGRAMDATA_FASTBYTE<br>
>  #define TYPEPROGRAMDATA_FASTHALFWORD  FLASH_TYPEPROGRAMDATA_FASTHALFWORD<br>
>  #define TYPEPROGRAMDATA_FASTWORD      FLASH_TYPEPROGRAMDATA_FASTWORD<br>
<br>
Can you instead use:<br>
#ifndef __rtems___<br>
> -#define PAGESIZE                      FLASH_PAGE_SIZE<br>
> +/* Commented out for the RTEMS BSP because there can be nameclashes with another<br>
> +similar defininition in limits.h */<br>
> +//#define PAGESIZE                      FLASH_PAGE_SIZE<br>
#endif<br>
<br>
>  #define TYPEPROGRAM_FASTBYTE          FLASH_TYPEPROGRAM_BYTE<br>
>  #define TYPEPROGRAM_FASTHALFWORD      FLASH_TYPEPROGRAM_HALFWORD<br>
>  #define TYPEPROGRAM_FASTWORD          FLASH_TYPEPROGRAM_WORD<br>
> diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h b/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h<br>
> index d423e4f782..b608188b4f 100644<br>
> --- a/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h<br>
> +++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h<br>
> @@ -21,6 +21,9 @@<br>
>  #ifndef __STM32H7xx_HAL_CONF_H<br>
>  #define __STM32H7xx_HAL_CONF_H<br>
><br>
> +#ifdef __rtems__<br>
> +#include <bspopts.h><br>
> +#endif /* __rtems__ */<br>
>  #ifdef __cplusplus<br>
>   extern "C" {<br>
>  #endif<br>
> @@ -103,7 +106,13 @@<br>
>    *        (when HSE is used as system clock source, directly or through the PLL).<br>
>    */<br>
>  #if !defined  (HSE_VALUE)<br>
> -#define HSE_VALUE    ((uint32_t)25000000) /*!< Value of the External oscillator in Hz : FPGA case fixed to 60MHZ */<br>
> +  #if STM32H743ZI_NUCLEO == 1<br>
> +    /*!< External oscillator clock for the STM32H743ZI Nucleo */<br>
> +    #define HSE_VALUE    ((uint32_t)8000000)<br>
> +  #else<br>
> +    /*!< Value of the External oscillator in Hz : FPGA case fixed to 60MHZ */<br>
> +    #define HSE_VALUE    ((uint32_t)25000000)<br>
> +  #endif /* STM32H743ZI_NUCLEO == 1 */<br>
>  #endif /* HSE_VALUE */<br>
><br>
>  #if !defined  (HSE_STARTUP_TIMEOUT)<br>
> diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h b/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h<br>
> index e9fecc4aa0..b171f7dac7 100644<br>
> --- a/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h<br>
> +++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h<br>
> @@ -27,6 +27,7 @@ extern "C" {<br>
><br>
>  /* Includes ------------------------------------------------------------------*/<br>
>  #include "stm32h7xx_hal_def.h"<br>
> +#include "stm32h7xx_hal_dma.h"<br>
><br>
>  /** @addtogroup STM32H7xx_HAL_Driver<br>
>    * @{<br>
> diff --git a/bsps/arm/stm32h7/start/bspstart.c b/bsps/arm/stm32h7/start/bspstart.c<br>
> index 2fc8133cca..d942fbdcb3 100644<br>
> --- a/bsps/arm/stm32h7/start/bspstart.c<br>
> +++ b/bsps/arm/stm32h7/start/bspstart.c<br>
> @@ -34,7 +34,7 @@<br>
><br>
>  uint32_t HAL_GetTick(void)<br>
>  {<br>
> -  return 0;<br>
> +  return rtems_clock_get_ticks_since_boot();<br>
>  }<br>
><br>
>  uint32_t stm32h7_systick_frequency(void)<br>
> diff --git a/bsps/arm/stm32h7/start/stm32h7-hal-eth.c b/bsps/arm/stm32h7/start/stm32h7-hal-eth.c<br>
> index 46475f4316..36363f84a5 100644<br>
> --- a/bsps/arm/stm32h7/start/stm32h7-hal-eth.c<br>
> +++ b/bsps/arm/stm32h7/start/stm32h7-hal-eth.c<br>
> @@ -64,8 +64,7 @@ static const stm32h7_gpio_config gpioa = {<br>
>    }<br>
>  };<br>
><br>
> -void<br>
> -HAL_ETH_MspInit(ETH_HandleTypeDef *heth)<br>
> +void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)<br>
why this change?<br>
<br>
>  {<br>
>    stm32h7_clk_enable(STM32H7_MODULE_ETH1MAC);<br>
>    stm32h7_clk_enable(STM32H7_MODULE_ETH1TX);<br>
> diff --git a/spec/build/bsps/arm/stm32h7/bspstm32h7.yml b/spec/build/bsps/arm/stm32h7/bspstm32h7.yml<br>
> index 80e13472c8..89b5a3c00d 100644<br>
> --- a/spec/build/bsps/arm/stm32h7/bspstm32h7.yml<br>
> +++ b/spec/build/bsps/arm/stm32h7/bspstm32h7.yml<br>
> @@ -247,6 +247,10 @@ links:<br>
>    uid: ../../optconsolebaud<br>
>  - role: build-dependency<br>
>    uid: ../../optconsoleirq<br>
> +- role: build-dependency<br>
> +  uid: opth743nucleo<br>
> +- role: build-dependency<br>
> +  uid: optlwip<br>
>  - role: build-dependency<br>
>    uid: ../grp<br>
>  - role: build-dependency<br>
> diff --git a/spec/build/bsps/arm/stm32h7/opth743nucleo.yml b/spec/build/bsps/arm/stm32h7/opth743nucleo.yml<br>
> new file mode 100644<br>
> index 0000000000..2c4176bf00<br>
> --- /dev/null<br>
> +++ b/spec/build/bsps/arm/stm32h7/opth743nucleo.yml<br>
> @@ -0,0 +1,13 @@<br>
> +actions:<br>
> +- get-boolean: null<br>
> +- define-condition: null<br>
> +build-type: option<br>
> +default: false<br>
> +default-by-variant: []<br>
> +enabled-by: true<br>
> +format: '{}'<br>
> +links: []<br>
> +name: STM32H743ZI_NUCLEO<br>
> +description: |<br>
> +  Nucleo board. Use 8 MHz HSE external clock and different pins for the UART console.<br>
> +type: build<br>
> diff --git a/spec/build/bsps/arm/stm32h7/optlwip.yml b/spec/build/bsps/arm/stm32h7/optlwip.yml<br>
> new file mode 100644<br>
> index 0000000000..04613a3bb6<br>
> --- /dev/null<br>
> +++ b/spec/build/bsps/arm/stm32h7/optlwip.yml<br>
> @@ -0,0 +1,24 @@<br>
> +actions:<br>
> +- get-boolean: null<br>
> +- env-assign: null<br>
> +- define-condition: null<br>
> +build-type: option<br>
> +default: false<br>
> +default-by-variant: []<br>
> +enabled-by: true<br>
> +format: '{}'<br>
> +links: []<br>
> +name: STM32H7_ADD_LWIP<br>
> +description: |<br>
> +  This changes the code to allow lwIP to work properly based on the STM32 lwIP example.<br>
> +  The user must take care of the following steps in the application:<br>
> +   1. The lwIP DMA descriptors have to be placed into the .bsp_no_cache section instead<br>
> +      of custom sections<br>
> +   2. The sections need to be aligned to 32 bytes (0x20) boundaries<br>
> +  This can be achieved by appending<br>
> +    __attribute__((section(.bsp_no_cache),__aligned__(0x20)));<br>
> +  to the descriptor definitions.<br>
> +type: build<br>
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause<br>
> +copyrights:<br>
> +- Copyright (C) 2020 Robin Mueller<br>
> --<br>
> 2.23.0.windows.1<br>
><br>
> _______________________________________________<br>
> devel mailing list<br>
> <a href="mailto:devel@rtems.org" target="_blank">devel@rtems.org</a><br>
> <a href="http://lists.rtems.org/mailman/listinfo/devel" rel="noreferrer" target="_blank">http://lists.rtems.org/mailman/listinfo/devel</a><br>
</blockquote></div>