<html>
<head>
<meta http-equiv="content-type" content="text/html; charset=UTF-8">
</head>
<body>
Forgot copy the list.<br>
<div class="moz-forward-container"><br>
<div class="moz-cite-prefix">On 5/21/21 7:02 AM, Richi Dubey
wrote:<br>
</div>
<blockquote type="cite"
cite="mid:CAAQOZwwmm5+DaBgPTrPjqTJOLUO+LRiX6eje=_FFFr9EUejN_A@mail.gmail.com">
<meta http-equiv="content-type" content="text/html;
charset=UTF-8">
<div dir="ltr">Hi,
<div><br>
</div>
<div>A test fails at the assert(sc==RTEMS_SUCCESSFUL) after a
call to rtems_task_set_affinity.</div>
<div><br>
</div>
<div>So, following the <a
href="https://devel.rtems.org/wiki/Debugging/sis"
moz-do-not-send="true">docs</a>, I figured out where the
break point should be set:</div>
<div><br>
</div>
<div>---------------------------------------------------</div>
<div><br>
</div>
$ ~/quick-start/rtems/6/bin/sparc-rtems6-sis -leon3 -m 4
~/sis-quick-start/src/rtems/build/sparc/leon3/testsuites/smptests/smpschedstrongapa01.exe<br>
<br>
SIS - SPARC/RISCV instruction simulator 2.26, copyright Jiri
Gaisler 2020<br>
Bug-reports to <a href="mailto:jiri@gaisler.se"
moz-do-not-send="true">jiri@gaisler.se</a><br>
<br>
LEON3 emulation enabled, 4 cpus online, delta 50 clocks<br>
<br>
Loaded
/home/richi/sis-quick-start/src/rtems/build/sparc/leon3/testsuites/smptests/smpschedstrongapa01.exe,
entry 0x40000000<br>
cpu0> hi 10<br>
trace history length = 10<br>
cpu0> run<br>
Waking CPU 1<br>
Waking CPU 2<br>
Waking CPU 3<br>
assertion "sc == RTEMS_SUCCESSFUL" failed: file
"../../../testsuites/smptests/smpschedstrongapa01/init.c",
line 264, function: Init<br>
cpu 0 in error mode (tt = 0x80)<br>
423950 4000f9e0: 91d02000 ta 0x0<br>
cpu0> hi<br>
423922 40019d40: 90100018 mov %i0, %o0<br>
423923 4000f9e4: 82102001 mov 1, %g1<br>
423924 4000f9e8: 84100008 mov %o0, %g2<br>
423925 4000f9ec: 86100009 mov %o1, %g3<br>
423926 4000f9f0: 91d02000 ta 0x0<br>
423928 40000800: a1480000 mov %psr, %l0<br>
423929 40000804: 2910003e sethi %hi(0x4000f800), %l4<br>
423930 40000808: 81c521e0 jmp %l4 + 0x1e0<br>
423932 4000080c: a6102080 mov 128, %l3<br>
423933 4000f9e0: 91d02000 ta 0x0<br>
cpu0> reg<br>
<br>
INS LOCALS OUTS GLOBALS<br>
0: 00000007 F3001FC6 00000007 00000000<br>
1: 4002F008 4000F9F0 00000000 00000001<br>
2: 40029CF8 4000F9F4 4002F008 00000007<br>
3: 0000000A 00000080 40020400 4002F008<br>
4: 00000073 4000F800 0000000E 00000000<br>
5: 40029C00 00000000 00000004 00000000<br>
6: 4002EEE0 4002A250 4002EE78 4002CD00<br>
7: 40019D3C 4002CD00 4000EC80 00000000<br>
<br>
psr: F3001FC6 wim: 00000008 tbr: 40000800 y: 00000000<br>
<br>
pc: 4000F9E0 = 91D02000 ta 0x0<br>
npc: 4000F9E4 = 82102001 mov 1, %g1<br>
IU in error mode<br>
<br>
cpu0> quit
<div>---------------------------------------------------</div>
<div>So the breakpoint has to be set at the second last
instruction at address 0x4000080c</div>
</div>
</blockquote>
<p>This is the wrong assumption. The program does not halt where
the assertion fails, it prints the error message and exits the
normal way. To stop execution right where the assertion is made,
you should add a breakpoint at the line number:</p>
<p>bre init.c:264<br>
</p>
<p>Also, make sure you compile RTEMS without optimization, or
single-stepping and debugging will be hard. I usually do this by
removing all optimization flags in the OPTIMIZATION_FLAGS
variable in the bsp .ini file before configuring with waf. <br>
</p>
<p><br>
</p>
<blockquote type="cite"
cite="mid:CAAQOZwwmm5+DaBgPTrPjqTJOLUO+LRiX6eje=_FFFr9EUejN_A@mail.gmail.com">
<div dir="ltr">
<div><br>
</div>
<div>But when I try to debug this with gdb keeping the sis as
remote target, it does not work:</div>
<div><br>
</div>
<div>-------------------------</div>
<div>$ ~/quick-start/rtems/6/bin/sparc-rtems6-gdb
~/sis-quick-start/src/rtems/build/sparc/leon3/testsuites/smptests/smpschedstrongapa01.exe<br>
GNU gdb (GDB) 10.1.90.20210409-git<br>
Copyright (C) 2021 Free Software Foundation, Inc.<br>
License GPLv3+: GNU GPL version 3 or later <<a
href="http://gnu.org/licenses/gpl.html"
moz-do-not-send="true">http://gnu.org/licenses/gpl.html</a>><br>
This is free software: you are free to change and
redistribute it.<br>
There is NO WARRANTY, to the extent permitted by law.<br>
Type "show copying" and "show warranty" for details.<br>
This GDB was configured as "--host=x86_64-linux-gnu
--target=sparc-rtems6".<br>
Type "show configuration" for configuration details.<br>
For bug reporting instructions, please see:<br>
<<a href="https://www.gnu.org/software/gdb/bugs/"
moz-do-not-send="true">https://www.gnu.org/software/gdb/bugs/</a>>.<br>
Find the GDB manual and other documentation resources online
at:<br>
<<a
href="http://www.gnu.org/software/gdb/documentation/"
moz-do-not-send="true">http://www.gnu.org/software/gdb/documentation/</a>>.<br>
<br>
For help, type "help".<br>
Type "apropos word" to search for commands related to
"word"...<br>
Reading symbols from
/home/richi/sis-quick-start/src/rtems/build/sparc/leon3/testsuites/smptests/smpschedstrongapa01.exe...<br>
(gdb) tar sim -leon3<br>
Undefined target command: "sim -leon3". Try "help target".<br>
(gdb) target extended-remote localhost:1234<br>
Remote debugging using localhost:1234<br>
0x00000000 in ?? ()<br>
(gdb) load<br>
Loading section .text, size 0x218f0 lma 0x40000000<br>
Loading section .rtemsroset, size 0x90 lma 0x400218f0<br>
Loading section .data, size 0x530 lma 0x40029980<br>
Start address 0x40000000, load size 138928<br>
Transfer rate: 3083 KB/sec, 271 bytes/write.<br>
(gdb) bre 0x4000080c<br>
</div>
</div>
</blockquote>
<p>To break at a hex address in gdb, you need a pointer:</p>
<p>bre *0x4000080c</p>
<p><br>
</p>
<blockquote type="cite"
cite="mid:CAAQOZwwmm5+DaBgPTrPjqTJOLUO+LRiX6eje=_FFFr9EUejN_A@mail.gmail.com">
<div dir="ltr">
<div>Function "0x4000080c" not defined.<br>
Make breakpoint pending on future shared library load? (y or
[n]) y<br>
Breakpoint 1 (0x4000080c) pending.<br>
(gdb) run<br>
The program being debugged has been started already.<br>
Start it from the beginning? (y or n) y<br>
Starting program:
/home/richi/sis-quick-start/src/rtems/build/sparc/leon3/testsuites/smptests/smpschedstrongapa01.exe
<br>
<br>
Program received signal SIGTERM, Terminated.<br>
syscall () at ../../../cpukit/score/cpu/sparc/syscall.S:44<br>
44 ta 0 ! syscall 1, halt with %g1,%g2,%g3 info<br>
(gdb) <br>
<div><br>
</div>
<div>-------------------- </div>
<div><br>
</div>
<div>And the output on the other terminal is:</div>
<div><br>
</div>
<div>------------------------------------<br>
</div>
$ ~/quick-start/rtems/6/bin/sparc-rtems6-sis -leon3 -m 4
-gdb<br>
<br>
SIS - SPARC/RISCV instruction simulator 2.26, copyright
Jiri Gaisler 2020<br>
Bug-reports to <a href="mailto:jiri@gaisler.se"
moz-do-not-send="true">jiri@gaisler.se</a><br>
<br>
LEON3 emulation enabled, 4 cpus online, delta 50 clocks<br>
<br>
gdb: listening on port 1234 connected<br>
X40000000,0:#72<br>
Waking CPU 1<br>
Waking CPU 2<br>
Waking CPU 3<br>
assertion "sc == RTEMS_SUCCESSFUL" failed: file
"../../../testsuites/smptests/smpschedstrongapa01/init.c",
line 264, function: Init<br>
<div>------------------------------------ </div>
</div>
<div><br>
</div>
<div>So, is there a way I can debug this? Can I use si or ni,
cause it is not working here when I tried it after 'load'.
Also can I not set breakpoints at functions and then step
continue till the function comes?</div>
<div><br>
</div>
<div>Please advise.</div>
<div>Thanks.</div>
</div>
</blockquote>
</div>
</body>
</html>