<div dir="ltr">Hi Jiri,<div><br></div><div>Thanks for the suggestion. It works. However, it looks like it just simulates the instruction. I am looking for a cycle-accurate simulator and can provide the performance information on each core. Do you know any?</div><div><br></div><div>Best,</div><div>Duc Anh</div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Fri, 11 Jun 2021 at 22:10, Jiri Gaisler <<a href="mailto:jiri@gaisler.se">jiri@gaisler.se</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
  
    
  
  <div>
    <p><br>
    </p>
    <div>On 6/11/21 12:37 PM, Đức Anh wrote:<br>
    </div>
    <blockquote type="cite">
      
      <div dir="ltr">Hi Sebastian,
        <div><br>
        </div>
        <div>Thank you. I didn't notice that.</div>
        <div><br>
        </div>
        <div>I recompile with SMP enabled, and the application doesn't
          run successfully in the TSIM-LEON3 simulator. Below is the
          error message:</div>
        <div><br>
        </div>
        <blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Initializing
          and starting from 0x40000000<br>
           <br>
            CPU 0 in error mode (tt=0x80, trap instruction)<br>
            (In trap table for tt=0x02, illegal instruction)<br>
                70150  40000020  91d02000   ta        0                
                 start + 0x20</blockquote>
        <div><br>
        </div>
        <div>The thing is, the same code will work if I compile with SMP
          disabled. When the SMP is enabled, the simulator will crash
          like above, even with the simple hello world application.</div>
        <div><br>
        </div>
        <div>Have anyone here run into a similar issue? Or do you know
          any other leon3 (or sparc) simulator that I can try?</div>
      </div>
    </blockquote>
    <p><br>
    </p>
    <p>You can try with sis:</p>
    <p>sparc-rtem6-sis -leon3 -m 4 hello.exe</p>
    <p>Should work without problems. For SMP, you need the '-m 4' switch
      to enable 4 cores ...</p>
    <p>Jiri.<br>
    </p>
    <p><br>
    </p>
    <blockquote type="cite">
      <div dir="ltr">
        <div><br>
        </div>
        <div>Best regards,</div>
        <div>Duc Anh</div>
      </div>
      <br>
      <div class="gmail_quote">
        <div dir="ltr" class="gmail_attr">On Wed, 9 Jun 2021 at 18:46,
          Sebastian Huber <<a href="mailto:sebastian.huber@embedded-brains.de" target="_blank">sebastian.huber@embedded-brains.de</a>>
          wrote:<br>
        </div>
        <blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On
          09/06/2021 18:39, Đức Anh wrote:<br>
          > - Is there a way to enable SMP for SPARC/LEON3 in RTEMS
          6?<br>
          <br>
          Just set "RTEMS_SMP = True" in your config.ini:<br>
          <br>
          <a href="https://docs.rtems.org/branches/master/user/bld/index.html#migration-from-autoconf-automake" rel="noreferrer" target="_blank">https://docs.rtems.org/branches/master/user/bld/index.html#migration-from-autoconf-automake</a><br>
          <br>
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      </div>
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