<div dir="ltr">Looks ok. Push it.</div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, Aug 22, 2022 at 1:54 AM <<a href="mailto:chrisj@rtems.org">chrisj@rtems.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">From: Chris Johns <<a href="mailto:chrisj@rtems.org" target="_blank">chrisj@rtems.org</a>><br>
<br>
- Versal has IO mapped to the upper 64bit address space and<br>
  needs full 64bit addresses.<br>
<br>
- Add xilinx_versal_aiedge for custom hardware<br>
<br>
- Make the hardware settings the defaults and qemu as variants<br>
<br>
Closes #4693<br>
---<br>
 spec/build/bsps/aarch64/xilinx-versal/abi.yml | 10 +--<br>
 .../{bspqemuilp32.yml => bspaiedge.yml}       |  8 +-<br>
 .../{bspqemulp64.yml => bspqemu.yml}          |  4 +-<br>
 .../{bspvck190lp64.yml => bspvck190.yml}      |  2 +-<br>
 .../{bspvck190ilp32.yml => grp_aiedge.yml}    | 16 ++--<br>
 .../aarch64/xilinx-versal/linkcmds_ilp32.yml  | 74 -------------------<br>
 .../bsps/aarch64/xilinx-versal/optclkuart.yml |  9 +--<br>
 .../bsps/aarch64/xilinx-versal/optloadoff.yml |  7 +-<br>
 .../bsps/aarch64/xilinx-versal/optramori.yml  |  7 +-<br>
 .../bsps/aarch64/xilinx-versal/tstaiedge.yml  | 15 ++++<br>
 10 files changed, 42 insertions(+), 110 deletions(-)<br>
 rename spec/build/bsps/aarch64/xilinx-versal/{bspqemuilp32.yml => bspaiedge.yml} (67%)<br>
 rename spec/build/bsps/aarch64/xilinx-versal/{bspqemulp64.yml => bspqemu.yml} (82%)<br>
 rename spec/build/bsps/aarch64/xilinx-versal/{bspvck190lp64.yml => bspvck190.yml} (91%)<br>
 rename spec/build/bsps/aarch64/xilinx-versal/{bspvck190ilp32.yml => grp_aiedge.yml} (51%)<br>
 delete mode 100644 spec/build/bsps/aarch64/xilinx-versal/linkcmds_ilp32.yml<br>
 create mode 100644 spec/build/bsps/aarch64/xilinx-versal/tstaiedge.yml<br>
<br>
diff --git a/spec/build/bsps/aarch64/xilinx-versal/abi.yml b/spec/build/bsps/aarch64/xilinx-versal/abi.yml<br>
index 90bfca9f76..b52df18fb3 100644<br>
--- a/spec/build/bsps/aarch64/xilinx-versal/abi.yml<br>
+++ b/spec/build/bsps/aarch64/xilinx-versal/abi.yml<br>
@@ -5,16 +5,10 @@ actions:<br>
 - env-append: null<br>
 build-type: option<br>
 copyrights:<br>
-- Copyright (C) 2021 Gedare Bloom <br>
+- Copyright (C) 2021 Gedare Bloom<br>
 default:<br>
 - -mcpu=cortex-a72<br>
-default-by-variant:<br>
-- value:<br>
-  - -mcpu=cortex-a72<br>
-  - -mabi=ilp32<br>
-  variants:<br>
-  - aarch64/xilinx_versal_ilp32_qemu<br>
-  - aarch64/xilinx_versal_ilp32_vck190<br>
+default-by-variant: []<br>
 description: |<br>
   ABI flags<br>
 enabled-by: true<br>
diff --git a/spec/build/bsps/aarch64/xilinx-versal/bspqemuilp32.yml b/spec/build/bsps/aarch64/xilinx-versal/bspaiedge.yml<br>
similarity index 67%<br>
rename from spec/build/bsps/aarch64/xilinx-versal/bspqemuilp32.yml<br>
rename to spec/build/bsps/aarch64/xilinx-versal/bspaiedge.yml<br>
index cdad919b1c..f8c9011143 100644<br>
--- a/spec/build/bsps/aarch64/xilinx-versal/bspqemuilp32.yml<br>
+++ b/spec/build/bsps/aarch64/xilinx-versal/bspaiedge.yml<br>
@@ -1,10 +1,10 @@<br>
 SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause<br>
 arch: aarch64<br>
-bsp: xilinx_versal_ilp32_qemu<br>
+bsp: xilinx_versal_aiedge<br>
 build-type: bsp<br>
 cflags: []<br>
 copyrights:<br>
-- Copyright (C) 2021 Gedare Bloom <br>
+- Copyright (C) 2022 Chris Johns <chris@contemporary.software><br>
 cppflags: []<br>
 enabled-by: true<br>
 family: xilinx-versal<br>
@@ -12,8 +12,8 @@ includes: []<br>
 install: []<br>
 links:<br>
 - role: build-dependency<br>
-  uid: grp_qemu<br>
+  uid: grp_aiedge<br>
 - role: build-dependency<br>
-  uid: linkcmds_ilp32<br>
+  uid: linkcmds_lp64<br>
 source: []<br>
 type: build<br>
diff --git a/spec/build/bsps/aarch64/xilinx-versal/bspqemulp64.yml b/spec/build/bsps/aarch64/xilinx-versal/bspqemu.yml<br>
similarity index 82%<br>
rename from spec/build/bsps/aarch64/xilinx-versal/bspqemulp64.yml<br>
rename to spec/build/bsps/aarch64/xilinx-versal/bspqemu.yml<br>
index bd8dab6a6e..f7f167dbfb 100644<br>
--- a/spec/build/bsps/aarch64/xilinx-versal/bspqemulp64.yml<br>
+++ b/spec/build/bsps/aarch64/xilinx-versal/bspqemu.yml<br>
@@ -1,10 +1,10 @@<br>
 SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause<br>
 arch: aarch64<br>
-bsp: xilinx_versal_lp64_qemu<br>
+bsp: xilinx_versal_qemu<br>
 build-type: bsp<br>
 cflags: []<br>
 copyrights:<br>
-- Copyright (C) 2021 Gedare Bloom <br>
+- Copyright (C) 2021 Gedare Bloom<br>
 cppflags: []<br>
 enabled-by: true<br>
 family: xilinx-versal<br>
diff --git a/spec/build/bsps/aarch64/xilinx-versal/bspvck190lp64.yml b/spec/build/bsps/aarch64/xilinx-versal/bspvck190.yml<br>
similarity index 91%<br>
rename from spec/build/bsps/aarch64/xilinx-versal/bspvck190lp64.yml<br>
rename to spec/build/bsps/aarch64/xilinx-versal/bspvck190.yml<br>
index b33a10f8f0..bc2bbc1c5d 100644<br>
--- a/spec/build/bsps/aarch64/xilinx-versal/bspvck190lp64.yml<br>
+++ b/spec/build/bsps/aarch64/xilinx-versal/bspvck190.yml<br>
@@ -1,6 +1,6 @@<br>
 SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause<br>
 arch: aarch64<br>
-bsp: xilinx_versal_lp64_vck190<br>
+bsp: xilinx_versal_vck190<br>
 build-type: bsp<br>
 cflags: []<br>
 copyrights:<br>
diff --git a/spec/build/bsps/aarch64/xilinx-versal/bspvck190ilp32.yml b/spec/build/bsps/aarch64/xilinx-versal/grp_aiedge.yml<br>
similarity index 51%<br>
rename from spec/build/bsps/aarch64/xilinx-versal/bspvck190ilp32.yml<br>
rename to spec/build/bsps/aarch64/xilinx-versal/grp_aiedge.yml<br>
index 741b28c6e8..680584f36c 100644<br>
--- a/spec/build/bsps/aarch64/xilinx-versal/bspvck190ilp32.yml<br>
+++ b/spec/build/bsps/aarch64/xilinx-versal/grp_aiedge.yml<br>
@@ -1,19 +1,19 @@<br>
 SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause<br>
-arch: aarch64<br>
-bsp: xilinx_versal_ilp32_vck190<br>
-build-type: bsp<br>
+build-type: group<br>
 cflags: []<br>
 copyrights:<br>
-- Copyright (C) 2021 Gedare Bloom <<a href="mailto:gedare@rtems.org" target="_blank">gedare@rtems.org</a>><br>
+- Copyright (C) 2022 Chris Johns <chris@contemporary.software><br>
 cppflags: []<br>
+cxxflags: []<br>
 enabled-by: true<br>
-family: xilinx-versal<br>
 includes: []<br>
 install: []<br>
+ldflags: []<br>
 links:<br>
 - role: build-dependency<br>
-  uid: grp_vck190<br>
+  uid: grp<br>
 - role: build-dependency<br>
-  uid: linkcmds_ilp32<br>
-source: []<br>
+  uid: tstaiedge<br>
 type: build<br>
+use-after: []<br>
+use-before: []<br>
diff --git a/spec/build/bsps/aarch64/xilinx-versal/linkcmds_ilp32.yml b/spec/build/bsps/aarch64/xilinx-versal/linkcmds_ilp32.yml<br>
deleted file mode 100644<br>
index 2d7a922495..0000000000<br>
--- a/spec/build/bsps/aarch64/xilinx-versal/linkcmds_ilp32.yml<br>
+++ /dev/null<br>
@@ -1,74 +0,0 @@<br>
-SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause<br>
-build-type: config-file<br>
-content: |<br>
-  /* SPDX-License-Identifier: BSD-2-Clause */<br>
-<br>
-  /*<br>
-   * Copyright (C) 2021 Gedare Bloom <<a href="mailto:gedare@rtems.org" target="_blank">gedare@rtems.org</a>> <br>
-   *<br>
-   * Redistribution and use in source and binary forms, with or without<br>
-   * modification, are permitted provided that the following conditions<br>
-   * are met:<br>
-   * 1. Redistributions of source code must retain the above copyright<br>
-   *    notice, this list of conditions and the following disclaimer.<br>
-   * 2. Redistributions in binary form must reproduce the above copyright<br>
-   *    notice, this list of conditions and the following disclaimer in the<br>
-   *    documentation and/or other materials provided with the distribution.<br>
-   *<br>
-   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"<br>
-   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE<br>
-   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE<br>
-   * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE<br>
-   * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR<br>
-   * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF<br>
-   * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS<br>
-   * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN<br>
-   * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)<br>
-   * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE<br>
-   * POSSIBILITY OF SUCH DAMAGE.<br>
-   */<br>
-<br>
-  MEMORY {<br>
-    RAM       : ORIGIN = ${BSP_XILINX_VERSAL_RAM_BASE} + ${BSP_XILINX_VERSAL_LOAD_OFFSET}, LENGTH = ${BSP_XILINX_VERSAL_RAM_LENGTH} - ${BSP_XILINX_VERSAL_LOAD_OFFSET} - ${BSP_XILINX_VERSAL_NOCACHE_LENGTH} - (0x1000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES})<br>
-    NOCACHE   : ORIGIN = ${BSP_XILINX_VERSAL_RAM_BASE} + ${BSP_XILINX_VERSAL_RAM_LENGTH} - (0x1000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES}) - ${BSP_XILINX_VERSAL_NOCACHE_LENGTH}, LENGTH = ${BSP_XILINX_VERSAL_NOCACHE_LENGTH}<br>
-    RAM_MMU   : ORIGIN = ${BSP_XILINX_VERSAL_RAM_BASE} + ${BSP_XILINX_VERSAL_RAM_LENGTH} - (0x1000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES}), LENGTH = 0x1000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES}<br>
-  }<br>
-<br>
-  REGION_ALIAS ("REGION_START",          RAM);<br>
-  REGION_ALIAS ("REGION_VECTOR",         RAM);<br>
-  REGION_ALIAS ("REGION_TEXT",           RAM);<br>
-  REGION_ALIAS ("REGION_TEXT_LOAD",      RAM);<br>
-  REGION_ALIAS ("REGION_RODATA",         RAM);<br>
-  REGION_ALIAS ("REGION_RODATA_LOAD",    RAM);<br>
-  REGION_ALIAS ("REGION_DATA",           RAM);<br>
-  REGION_ALIAS ("REGION_DATA_LOAD",      RAM);<br>
-  REGION_ALIAS ("REGION_FAST_TEXT",      RAM);<br>
-  REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);<br>
-  REGION_ALIAS ("REGION_FAST_DATA",      RAM);<br>
-  REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);<br>
-  REGION_ALIAS ("REGION_BSS",            RAM);<br>
-  REGION_ALIAS ("REGION_WORK",           RAM);<br>
-  REGION_ALIAS ("REGION_STACK",          RAM);<br>
-  REGION_ALIAS ("REGION_NOCACHE",        NOCACHE);<br>
-  REGION_ALIAS ("REGION_NOCACHE_LOAD",   NOCACHE);<br>
-<br>
-  bsp_stack_exception_size = DEFINED (bsp_stack_exception_size) ? bsp_stack_exception_size : 1024;<br>
-<br>
-  bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;<br>
-<br>
-  bsp_vector_table_in_start_section = 1;<br>
-<br>
-  bsp_translation_table_base = ORIGIN (RAM_MMU);<br>
-  bsp_translation_table_end = ORIGIN (RAM_MMU) + LENGTH (RAM_MMU);<br>
-<br>
-  OUTPUT_FORMAT ("elf32-littleaarch64")<br>
-  OUTPUT_ARCH (aarch64:ilp32)<br>
-<br>
-  INCLUDE linkcmds.base<br>
-copyrights:<br>
-- Copyright (C) 2021 Gedare Bloom <<a href="mailto:gedare@rtems.org" target="_blank">gedare@rtems.org</a>><br>
-enabled-by: true<br>
-install-path: ${BSP_LIBDIR}<br>
-links: []<br>
-target: linkcmds<br>
-type: build<br>
diff --git a/spec/build/bsps/aarch64/xilinx-versal/optclkuart.yml b/spec/build/bsps/aarch64/xilinx-versal/optclkuart.yml<br>
index 4ba449b8fd..fb344019e2 100644<br>
--- a/spec/build/bsps/aarch64/xilinx-versal/optclkuart.yml<br>
+++ b/spec/build/bsps/aarch64/xilinx-versal/optclkuart.yml<br>
@@ -4,13 +4,12 @@ actions:<br>
 - define: null<br>
 build-type: option<br>
 copyrights:<br>
-- Copyright (C) 2021 Gedare Bloom <<a href="mailto:gedare@rtems.org" target="_blank">gedare@rtems.org</a>> <br>
-default: 24000000<br>
+- Copyright (C) 2021 Gedare Bloom <<a href="mailto:gedare@rtems.org" target="_blank">gedare@rtems.org</a>><br>
+default: 100000000<br>
 default-by-variant:<br>
-- value: 100000000<br>
+- value: 24000000<br>
   variants:<br>
-  - aarch64/xilinx_versal_ilp32.*<br>
-  - aarch64/xilinx_versal_lp64.*<br>
+  - aarch64/xilinx_versal_qemu<br>
 description: |<br>
   Versal UART clock frequency in Hz<br>
 enabled-by: true<br>
diff --git a/spec/build/bsps/aarch64/xilinx-versal/optloadoff.yml b/spec/build/bsps/aarch64/xilinx-versal/optloadoff.yml<br>
index 41023dcf3e..577a1451dd 100644<br>
--- a/spec/build/bsps/aarch64/xilinx-versal/optloadoff.yml<br>
+++ b/spec/build/bsps/aarch64/xilinx-versal/optloadoff.yml<br>
@@ -7,12 +7,11 @@ actions:<br>
 build-type: option<br>
 copyrights:<br>
 - Copyright (C) 2021 Gedare Bloom <<a href="mailto:gedare@rtems.org" target="_blank">gedare@rtems.org</a>><br>
-default: 32768<br>
+default: 0x0<br>
 default-by-variant:<br>
-- value: 0x0<br>
+- value: 32768<br>
   variants:<br>
-  - aarch64/xilinx_versal_lp64_vck190<br>
-  - aarch64/xilinx_versal_ilp32_vck190<br>
+  - aarch64/xilinx_versal_qemu<br>
 description: |<br>
   offset of RAM region from memory area base<br>
 enabled-by: true<br>
diff --git a/spec/build/bsps/aarch64/xilinx-versal/optramori.yml b/spec/build/bsps/aarch64/xilinx-versal/optramori.yml<br>
index 8ab8f5bc13..6e94f55b7e 100644<br>
--- a/spec/build/bsps/aarch64/xilinx-versal/optramori.yml<br>
+++ b/spec/build/bsps/aarch64/xilinx-versal/optramori.yml<br>
@@ -7,12 +7,11 @@ actions:<br>
 build-type: option<br>
 copyrights:<br>
 - Copyright (C) 2021 Gedare Bloom <<a href="mailto:gedare@rtems.org" target="_blank">gedare@rtems.org</a>><br>
-default: 0x20000000<br>
+default: 0x10000000<br>
 default-by-variant:<br>
-- value: 0x10000000<br>
+- value: 0x20000000<br>
   variants:<br>
-  - aarch64/xilinx_versal_lp64_vck190<br>
-  - aarch64/xilinx_versal_ilp32_vck190<br>
+  - aarch64/xilinx_versal_qemu<br>
 description: |<br>
   base address of memory area available to the BSP<br>
 enabled-by: true<br>
diff --git a/spec/build/bsps/aarch64/xilinx-versal/tstaiedge.yml b/spec/build/bsps/aarch64/xilinx-versal/tstaiedge.yml<br>
new file mode 100644<br>
index 0000000000..cbc1c7e381<br>
--- /dev/null<br>
+++ b/spec/build/bsps/aarch64/xilinx-versal/tstaiedge.yml<br>
@@ -0,0 +1,15 @@<br>
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause<br>
+actions:<br>
+- set-test-state:<br>
+    # expected to produce a fatal-error when run<br>
+    minimum: exclude<br>
+<br>
+build-type: option<br>
+copyrights:<br>
+- Copyright (C) 2021 Gedare Bloom <<a href="mailto:gedare@rtems.org" target="_blank">gedare@rtems.org</a>><br>
+default: null<br>
+default-by-variant: []<br>
+description: ''<br>
+enabled-by: true<br>
+links: []<br>
+type: build<br>
-- <br>
2.19.1<br>
<br>
_______________________________________________<br>
devel mailing list<br>
<a href="mailto:devel@rtems.org" target="_blank">devel@rtems.org</a><br>
<a href="http://lists.rtems.org/mailman/listinfo/devel" rel="noreferrer" target="_blank">http://lists.rtems.org/mailman/listinfo/devel</a><br>
</blockquote></div>