<div dir="ltr"><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Tue, Feb 28, 2023 at 11:57 PM Padmarao Begari <<a href="mailto:padmarao.begari@microchip.com">padmarao.begari@microchip.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Read the clock frequency from the device tree and use it to<br>
calculate the mdc clock divider for the MII bus if not found<br>
then use default clock divider.<br>
---<br>
freebsd/sys/dev/cadence/if_cgem.c | 39 ++++++++++++++++++++++++++++---<br>
1 file changed, 36 insertions(+), 3 deletions(-)<br>
<br>
diff --git a/freebsd/sys/dev/cadence/if_cgem.c b/freebsd/sys/dev/cadence/if_cgem.c<br>
index 2888a085..363a9717 100644<br>
--- a/freebsd/sys/dev/cadence/if_cgem.c<br>
+++ b/freebsd/sys/dev/cadence/if_cgem.c<br>
@@ -135,6 +135,7 @@ struct cgem_softc {<br>
uint32_t net_cfg_shadow;<br>
int neednullqs;<br>
int phy_contype;<br>
+ uint32_t pclk_rate;<br>
#endif /* __rtems__ */<br>
int ref_clk_num;<br>
#ifndef __rtems__<br>
@@ -1238,6 +1239,27 @@ cgem_get_phyaddr(phandle_t node, int *phy_addr)<br>
return (0);<br>
}<br>
<br>
+static uint32_t cgem_mdc_clk_div(struct cgem_softc *sc)<br>
+{<br>
+ uint32_t config;<br>
+ uint32_t pclk_hz = sc->pclk_rate;<br>
+<br>
+ if (pclk_hz <= 20000000)<br>
+ config = CGEM_NET_CFG_MDC_CLK_DIV_8;<br>
+ else if (pclk_hz <= 40000000)<br>
+ config = CGEM_NET_CFG_MDC_CLK_DIV_16;<br>
+ else if (pclk_hz <= 80000000)<br>
+ config = CGEM_NET_CFG_MDC_CLK_DIV_32;<br>
+ else if (pclk_hz <= 120000000)<br>
+ config = CGEM_NET_CFG_MDC_CLK_DIV_48;<br>
+ else if (pclk_hz <= 160000000)<br>
+ config = CGEM_NET_CFG_MDC_CLK_DIV_64;<br>
+ else<br>
+ config = CGEM_NET_CFG_MDC_CLK_DIV_96;<br>
+<br>
+ return config;<br>
+}<br>
+<br></blockquote><div>Enclose this in a #ifdef __rtems__ guard. I think the suggested style is to always use braces {} with if/else, even if it's a single line.</div><div> <br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
/* Reset hardware. */<br>
static void<br>
cgem_reset(struct cgem_softc *sc)<br>
@@ -1279,12 +1301,16 @@ cgem_reset(struct cgem_softc *sc)<br>
sc->net_cfg_shadow = CGEM_NET_CFG_DBUS_WIDTH_32;<br>
}<br>
<br>
+ if (sc->pclk_rate != 0) {<br>
+ sc->net_cfg_shadow |= cgem_mdc_clk_div(sc);<br>
+ } else {<br>
#ifdef CGEM64<br>
- sc->net_cfg_shadow |= CGEM_NET_CFG_MDC_CLK_DIV_48;<br>
+ sc->net_cfg_shadow |= CGEM_NET_CFG_MDC_CLK_DIV_48;<br>
#else<br>
- sc->net_cfg_shadow |= CGEM_NET_CFG_MDC_CLK_DIV_64;<br>
+ sc->net_cfg_shadow |= CGEM_NET_CFG_MDC_CLK_DIV_64;<br>
#endif<br>
- WR4(sc, CGEM_NET_CFG, sc->net_cfg_shadow);<br>
+ WR4(sc, CGEM_NET_CFG, sc->net_cfg_shadow);<br>
+ }<br>
#endif /* __rtems__ */<br>
<br>
sc->net_ctl_shadow = CGEM_NET_CTRL_MGMT_PORT_EN;<br>
@@ -2038,6 +2064,13 @@ cgem_attach(device_t dev)<br>
#endif /* __rtems__ */<br>
/* Get reference clock number and base divider from fdt. */<br>
node = ofw_bus_get_node(dev);<br>
+#ifdef __rtems__<br>
+ if (OF_getencprop(node, "clock-frequency", &cell, sizeof(cell)) > 0)<br>
+ sc->pclk_rate = cell;<br>
+ else<br>
+ sc->pclk_rate = 0;<br>
+#endif /* __rtems__ */<br>
+<br>
sc->ref_clk_num = 0;<br>
if (OF_getprop(node, "ref-clock-num", &cell, sizeof(cell)) > 0)<br>
sc->ref_clk_num = fdt32_to_cpu(cell);<br>
-- <br>
2.25.1<br>
<br>
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</blockquote></div></div>