<div dir="ltr"><div>Good idea. With the number of changes, do you think one commit for the spec/build options and one for the code is sufficient?</div><div><br></div><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, Mar 13, 2023 at 10:55 AM Gedare Bloom <<a href="mailto:gedare@rtems.org">gedare@rtems.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">I'm not 100% sure it matters, but I think the spec/build commit should<br>
come after the source is added. This is a generally good approach<br>
when integrating code vs build changes, so that you don't try to build<br>
something that doesn't exist.<br>
<br>
On Thu, Mar 9, 2023 at 8:48 PM Alan Cudmore <<a href="mailto:alan.cudmore@gmail.com" target="_blank">alan.cudmore@gmail.com</a>> wrote:<br>
><br>
> This patch includes the spec/build options for the riscv kendrytek210<br>
> BSP variant. It includes options to allow the frdme310arty console<br>
> UART to be used on multiple BSPS, device tree options, memory<br>
> options, and other required options for the variant.<br>
> ---<br>
> spec/build/bsps/optdtb.yml | 4 +++-<br>
> spec/build/bsps/optdtbheaderpath.yml | 2 ++<br>
> spec/build/bsps/optfdtuboot.yml | 3 +++<br>
> spec/build/bsps/riscv/optramsize.yml | 2 ++<br>
> spec/build/bsps/riscv/riscv/abi.yml | 1 +<br>
> .../bsps/riscv/riscv/bspkendrtyek210.yml | 19 ++++++++++++++++++<br>
> spec/build/bsps/riscv/riscv/grp.yml | 4 ++++<br>
> spec/build/bsps/riscv/riscv/obj.yml | 1 +<br>
> .../bsps/riscv/riscv/optkendrytek210.yml | 18 +++++++++++++++++<br>
> spec/build/bsps/riscv/riscv/optns16550max.yml | 4 +++-<br>
> spec/build/bsps/riscv/riscv/optsifiveuart.yml | 20 +++++++++++++++++++<br>
> spec/build/cpukit/optsmp.yml | 1 +<br>
> 12 files changed, 77 insertions(+), 2 deletions(-)<br>
> create mode 100644 spec/build/bsps/riscv/riscv/bspkendrtyek210.yml<br>
> create mode 100644 spec/build/bsps/riscv/riscv/optkendrytek210.yml<br>
> create mode 100644 spec/build/bsps/riscv/riscv/optsifiveuart.yml<br>
><br>
> diff --git a/spec/build/bsps/optdtb.yml b/spec/build/bsps/optdtb.yml<br>
> index 78fed67866..f775dc7750 100644<br>
> --- a/spec/build/bsps/optdtb.yml<br>
> +++ b/spec/build/bsps/optdtb.yml<br>
> @@ -6,7 +6,9 @@ build-type: option<br>
> copyrights:<br>
> - Copyright (C) 2020 embedded brains GmbH (<a href="http://www.embedded-brains.de" rel="noreferrer" target="_blank">http://www.embedded-brains.de</a>)<br>
> default:<br>
> -- enabled-by: riscv/mpfs64imafdc<br>
> +- enabled-by:<br>
> + - riscv/mpfs64imafdc<br>
> + - riscv/kendrytek210<br>
> value: true<br>
> - enabled-by: true<br>
> value: false<br>
> diff --git a/spec/build/bsps/optdtbheaderpath.yml b/spec/build/bsps/optdtbheaderpath.yml<br>
> index 65573c4cb8..944c8e830e 100644<br>
> --- a/spec/build/bsps/optdtbheaderpath.yml<br>
> +++ b/spec/build/bsps/optdtbheaderpath.yml<br>
> @@ -8,6 +8,8 @@ copyrights:<br>
> default:<br>
> - enabled-by: riscv/mpfs64imafdc<br>
> value: bsp/mpfs-dtb.h<br>
> +- enabled-by: riscv/kendrytek210<br>
> + value: bsp/kendryte-k210-dtb.h<br>
> - enabled-by: true<br>
> value: false<br>
> description: |<br>
> diff --git a/spec/build/bsps/optfdtuboot.yml b/spec/build/bsps/optfdtuboot.yml<br>
> index 8c53b8b799..9d91639dc6 100644<br>
> --- a/spec/build/bsps/optfdtuboot.yml<br>
> +++ b/spec/build/bsps/optfdtuboot.yml<br>
> @@ -6,6 +6,9 @@ build-type: option<br>
> copyrights:<br>
> - Copyright (C) 2020 embedded brains GmbH (<a href="http://www.embedded-brains.de" rel="noreferrer" target="_blank">http://www.embedded-brains.de</a>)<br>
> default:<br>
> +- enabled-by:<br>
> + - riscv/kendrytek210<br>
> + value: false<br>
> - enabled-by: true<br>
> value: true<br>
> description: |<br>
> diff --git a/spec/build/bsps/riscv/optramsize.yml b/spec/build/bsps/riscv/optramsize.yml<br>
> index be80c0f462..1fc407d1ea 100644<br>
> --- a/spec/build/bsps/riscv/optramsize.yml<br>
> +++ b/spec/build/bsps/riscv/optramsize.yml<br>
> @@ -15,6 +15,8 @@ default:<br>
> value: 0x10000000<br>
> - enabled-by: riscv/griscv<br>
> value: 0x01000000<br>
> +- enabled-by: riscv/kendrytek210<br>
> + value: 0x00600000<br>
> - enabled-by: true<br>
> value: 0x04000000<br>
> description: ''<br>
> diff --git a/spec/build/bsps/riscv/riscv/abi.yml b/spec/build/bsps/riscv/riscv/abi.yml<br>
> index ab3046ee24..de23bdd795 100644<br>
> --- a/spec/build/bsps/riscv/riscv/abi.yml<br>
> +++ b/spec/build/bsps/riscv/riscv/abi.yml<br>
> @@ -10,6 +10,7 @@ default:<br>
> - enabled-by:<br>
> - riscv/mpfs64imafdc<br>
> - riscv/rv64imafdc<br>
> + - riscv/kendrytek210<br>
> value:<br>
> - -march=rv64imafdc<br>
> - -mabi=lp64d<br>
> diff --git a/spec/build/bsps/riscv/riscv/bspkendrtyek210.yml b/spec/build/bsps/riscv/riscv/bspkendrtyek210.yml<br>
> new file mode 100644<br>
> index 0000000000..91c601979e<br>
> --- /dev/null<br>
> +++ b/spec/build/bsps/riscv/riscv/bspkendrtyek210.yml<br>
> @@ -0,0 +1,19 @@<br>
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause<br>
> +arch: riscv<br>
> +bsp: kendrytek210<br>
> +build-type: bsp<br>
> +cflags: []<br>
> +copyrights:<br>
> +- Copyright (C) 2022 Alan Cudmore<br>
> +cppflags: []<br>
> +enabled-by: true<br>
> +family: riscv<br>
> +includes: []<br>
> +install: []<br>
> +links:<br>
> +- role: build-dependency<br>
> + uid: ../../opto2<br>
> +- role: build-dependency<br>
> + uid: grp<br>
> +source: []<br>
> +type: build<br>
> diff --git a/spec/build/bsps/riscv/riscv/grp.yml b/spec/build/bsps/riscv/riscv/grp.yml<br>
> index 713c15509a..a2ed4a1052 100644<br>
> --- a/spec/build/bsps/riscv/riscv/grp.yml<br>
> +++ b/spec/build/bsps/riscv/riscv/grp.yml<br>
> @@ -50,10 +50,14 @@ links:<br>
> uid: ../../optdtbheaderpath<br>
> - role: build-dependency<br>
> uid: optfrdme310arty<br>
> +- role: build-dependency<br>
> + uid: optkendrytek210<br>
> - role: build-dependency<br>
> uid: opthtif<br>
> - role: build-dependency<br>
> uid: optmpfs<br>
> +- role: build-dependency<br>
> + uid: optsifiveuart<br>
> - role: build-dependency<br>
> uid: optns16550max<br>
> - role: build-dependency<br>
> diff --git a/spec/build/bsps/riscv/riscv/obj.yml b/spec/build/bsps/riscv/riscv/obj.yml<br>
> index 0ddeef828b..d28945fae4 100644<br>
> --- a/spec/build/bsps/riscv/riscv/obj.yml<br>
> +++ b/spec/build/bsps/riscv/riscv/obj.yml<br>
> @@ -16,6 +16,7 @@ install:<br>
> - bsps/riscv/riscv/include/bsp/fe310-uart.h<br>
> - bsps/riscv/riscv/include/bsp/irq.h<br>
> - bsps/riscv/riscv/include/bsp/riscv.h<br>
> + - bsps/riscv/riscv/include/bsp/k210.h<br>
> - destination: ${BSP_INCLUDEDIR}/dev/serial<br>
> source:<br>
> - bsps/riscv/riscv/include/dev/serial/htif.h<br>
> diff --git a/spec/build/bsps/riscv/riscv/optkendrytek210.yml b/spec/build/bsps/riscv/riscv/optkendrytek210.yml<br>
> new file mode 100644<br>
> index 0000000000..09848cf6e7<br>
> --- /dev/null<br>
> +++ b/spec/build/bsps/riscv/riscv/optkendrytek210.yml<br>
> @@ -0,0 +1,18 @@<br>
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause<br>
> +actions:<br>
> +- get-boolean: null<br>
> +- define-condition: null<br>
> +build-type: option<br>
> +copyrights:<br>
> +- Copyright (C) 2022 Alan Cudmore<br>
> +default:<br>
> +- enabled-by: riscv/kendrytek210<br>
> + value: true<br>
> +- enabled-by: true<br>
> + value: false<br>
> +description: |<br>
> + enables support for the Kendryte K210 System on Chip if defined to a non-zero value, otherwise it is disabled (disabled by default)<br>
> +enabled-by: true<br>
> +links: []<br>
> +name: RISCV_ENABLE_KENDRYTE_K210_SUPPORT<br>
> +type: build<br>
> diff --git a/spec/build/bsps/riscv/riscv/optns16550max.yml b/spec/build/bsps/riscv/riscv/optns16550max.yml<br>
> index 423bb5f74f..094a35f81e 100644<br>
> --- a/spec/build/bsps/riscv/riscv/optns16550max.yml<br>
> +++ b/spec/build/bsps/riscv/riscv/optns16550max.yml<br>
> @@ -6,7 +6,9 @@ build-type: option<br>
> copyrights:<br>
> - Copyright (C) 2020 embedded brains GmbH (<a href="http://www.embedded-brains.de" rel="noreferrer" target="_blank">http://www.embedded-brains.de</a>)<br>
> default:<br>
> -- enabled-by: riscv/frdme310arty<br>
> +- enabled-by:<br>
> + - riscv/frdme310arty<br>
> + - riscv/kendrytek210<br>
> value: null<br>
> - enabled-by: riscv/mpfs64imafdc<br>
> value: 1<br>
> diff --git a/spec/build/bsps/riscv/riscv/optsifiveuart.yml b/spec/build/bsps/riscv/riscv/optsifiveuart.yml<br>
> new file mode 100644<br>
> index 0000000000..6ad70755d5<br>
> --- /dev/null<br>
> +++ b/spec/build/bsps/riscv/riscv/optsifiveuart.yml<br>
> @@ -0,0 +1,20 @@<br>
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause<br>
> +actions:<br>
> +- get-boolean: null<br>
> +- define-condition: null<br>
> +build-type: option<br>
> +copyrights:<br>
> +- Copyright (C) 2020 embedded brains GmbH (<a href="http://www.embedded-brains.de" rel="noreferrer" target="_blank">http://www.embedded-brains.de</a>)<br>
> +default:<br>
> +- enabled-by:<br>
> + - riscv/kendrytek210<br>
> + - riscv/frdme310arty<br>
> + value: true<br>
> +- enabled-by: true<br>
> + value: false<br>
> +description: |<br>
> + enables support Sifive UART if defined to a non-zero value, otherwise it is disabled (disabled by default)<br>
> +enabled-by: true<br>
> +links: []<br>
> +name: RISCV_ENABLE_SIFIVE_UART_SUPPORT<br>
> +type: build<br>
> diff --git a/spec/build/cpukit/optsmp.yml b/spec/build/cpukit/optsmp.yml<br>
> index bbe93443ad..78f73e8c1b 100644<br>
> --- a/spec/build/cpukit/optsmp.yml<br>
> +++ b/spec/build/cpukit/optsmp.yml<br>
> @@ -49,6 +49,7 @@ enabled-by:<br>
> - riscv/rv64imafdc<br>
> - riscv/rv64imafdc_medany<br>
> - riscv/rv64imafd_medany<br>
> +- riscv/kendrytek210<br>
> - sparc/erc32<br>
> - sparc/gr712rc<br>
> - sparc/gr740<br>
> --<br>
> 2.25.1<br>
><br>
> _______________________________________________<br>
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</blockquote></div></div>