<meta http-equiv="Content-Type" content="text/html; charset=utf-8"><div dir="ltr"><div>Philip,</div><div>When you get a chance, could you verify that this refactoring meets your expectations as far as functionality? I'm especially interested in whether the timer interrupts behave as you expect them to on hardware. I don't mind getting the Xilinx support code updates committed, but I'd like some feedback on the BSP itself.<br></div><div><br></div><div>Kinsey<br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Thu, Oct 12, 2023 at 12:02 PM Kinsey Moore <<a href="mailto:kinsey.moore@oarcorp.com" target="_blank">kinsey.moore@oarcorp.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Changes from v1 (originally submitted by Philip Kirkpatrick):<br>
Refactoring:<br>
* import Xilinx code before modification<br>
* better use the existing Xilinx support code<br>
Other:<br>
* An additional patch to add cache support (also from Philip) has been<br>
integrated and refactored<br>
<br>
This has been tested on Xilinx's QEMU with Xilinx's device tree<br>
definitions using the following command line options to QEMU:<br>
-no-reboot -nographic -M arm-generic-fdt -serial null -serial mon:stdio \<br>
-device loader,file=<RTEMS exe path>,cpu-num=4 \<br>
-device loader,addr=0xff5e023c,data=0x80088fde,data-len=4 \<br>
-device loader,addr=0xff9a0000,data=0x80000218,data-len=4 \<br>
-hw-dtb <XLNX DTB dir>/LATEST/SINGLE_ARCH/board-zynqmp-zcu102.dtb \<br>
-m 4096 -display none<br>
<br>
hello.exe and ts-validation-cache.exe operated as expected. Ticker<br>
produced output, but the timing and content was incorrect on QEMU.<br>
<br>
<br>
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</blockquote></div>