<meta http-equiv="Content-Type" content="text/html; charset=utf-8"><div dir="ltr"><div>This patch set looks good to me. I'd suggest a different file for the versal unless there's a good name that can easily cover both.</div><div><br></div><div>Kinsey<br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Wed, Mar 27, 2024 at 9:26 PM Chris Johns <<a href="mailto:chrisj@rtems.org">chrisj@rtems.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On 28/3/2024 6:43 am, Sebastian Huber wrote:<br>
> This helps to provide a shared implementation of the kernel I/O support.<br>
> ---<br>
> bsps/aarch64/xilinx-zynqmp/console/console.c | 4 +-<br>
> bsps/aarch64/xilinx-zynqmp/include/bsp.h | 2 +<br>
> bsps/arm/xilinx-zynq/console/console-config.c | 5 +-<br>
> bsps/arm/xilinx-zynq/include/bsp.h | 1 +<br>
> .../console/console-config.c | 4 +-<br>
> bsps/arm/xilinx-zynqmp-rpu/include/bsp.h | 2 +<br>
> .../xilinx-zynqmp/console/console-config.c | 4 +-<br>
> bsps/arm/xilinx-zynqmp/include/bsp.h | 2 +<br>
> bsps/include/dev/serial/zynq-uart-zynq.h | 66 +++++++++++++++++++<br>
> bsps/include/dev/serial/zynq-uart-zynqmp.h | 66 +++++++++++++++++++<br>
> 10 files changed, 148 insertions(+), 8 deletions(-)<br>
> create mode 100644 bsps/include/dev/serial/zynq-uart-zynq.h<br>
> create mode 100644 bsps/include/dev/serial/zynq-uart-zynqmp.h<br>
> <br>
> diff --git a/bsps/aarch64/xilinx-zynqmp/console/console.c b/bsps/aarch64/xilinx-zynqmp/console/console.c<br>
> index 1e5df997e8..ce031a914e 100644<br>
> --- a/bsps/aarch64/xilinx-zynqmp/console/console.c<br>
> +++ b/bsps/aarch64/xilinx-zynqmp/console/console.c<br>
> @@ -188,11 +188,11 @@ RTEMS_SYSINIT_ITEM(<br>
> static zynq_uart_context zynqmp_uart_instances[2] = {<br>
> {<br>
> .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ),<br>
> - .regs = (volatile struct zynq_uart *) 0xff000000,<br>
> + .regs = (volatile zynq_uart *) ZYNQ_UART_0_BASE_ADDR,<br>
> .irq = ZYNQMP_IRQ_UART_0<br>
> }, {<br>
> .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ),<br>
> - .regs = (volatile struct zynq_uart *) 0xff010000,<br>
> + .regs = (volatile zynq_uart *) ZYNQ_UART_1_BASE_ADDR,<br>
> .irq = ZYNQMP_IRQ_UART_1<br>
> }<br>
> };<br>
> diff --git a/bsps/aarch64/xilinx-zynqmp/include/bsp.h b/bsps/aarch64/xilinx-zynqmp/include/bsp.h<br>
> index 0ccca8b196..38a9fad768 100644<br>
> --- a/bsps/aarch64/xilinx-zynqmp/include/bsp.h<br>
> +++ b/bsps/aarch64/xilinx-zynqmp/include/bsp.h<br>
> @@ -55,6 +55,8 @@<br>
> #include <rtems.h><br>
> #include <rtems/termiostypes.h><br>
> <br>
> +#include <dev/serial/zynq-uart-zynqmp.h><br>
> +<br>
> #ifdef __cplusplus<br>
> extern "C" {<br>
> #endif /* __cplusplus */<br>
> diff --git a/bsps/arm/xilinx-zynq/console/console-config.c b/bsps/arm/xilinx-zynq/console/console-config.c<br>
> index d22ceb557d..42e64ee4dd 100644<br>
> --- a/bsps/arm/xilinx-zynq/console/console-config.c<br>
> +++ b/bsps/arm/xilinx-zynq/console/console-config.c<br>
> @@ -35,15 +35,16 @@<br>
> <br>
> #include <bsp/irq.h><br>
> #include <dev/serial/zynq-uart.h><br>
> +#include <dev/serial/zynq-uart-regs.h><br>
> <br>
> zynq_uart_context zynq_uart_instances[2] = {<br>
> {<br>
> .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ),<br>
> - .regs = (volatile struct zynq_uart *) 0xe0000000,<br>
> + .regs = (volatile zynq_uart *) ZYNQ_UART_0_BASE_ADDR,<br>
> .irq = ZYNQ_IRQ_UART_0<br>
> }, {<br>
> .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ),<br>
> - .regs = (volatile struct zynq_uart *) 0xe0001000,<br>
> + .regs = (volatile zynq_uart *) ZYNQ_UART_1_BASE_ADDR,<br>
> .irq = ZYNQ_IRQ_UART_1<br>
> }<br>
> };<br>
> diff --git a/bsps/arm/xilinx-zynq/include/bsp.h b/bsps/arm/xilinx-zynq/include/bsp.h<br>
> index 3311a99b50..5ffd5f573a 100644<br>
> --- a/bsps/arm/xilinx-zynq/include/bsp.h<br>
> +++ b/bsps/arm/xilinx-zynq/include/bsp.h<br>
> @@ -55,6 +55,7 @@<br>
> #include <bsp/default-initial-extension.h><br>
> #include <bsp/start.h><br>
> #include <dev/serial/zynq-uart.h><br>
> +#include <dev/serial/zynq-uart-zynq.h><br>
> <br>
> #ifdef __cplusplus<br>
> extern "C" {<br>
> diff --git a/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c b/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c<br>
> index eacf6ddcce..13eaa269c5 100644<br>
> --- a/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c<br>
> +++ b/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c<br>
> @@ -44,11 +44,11 @@<br>
> static zynq_uart_context zynqmp_uart_instances[2] = {<br>
> {<br>
> .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ),<br>
> - .regs = (volatile struct zynq_uart *) 0xff000000,<br>
> + .regs = (volatile zynq_uart *) ZYNQ_UART_0_BASE_ADDR,<br>
> .irq = ZYNQMP_IRQ_UART_0<br>
> }, {<br>
> .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ),<br>
> - .regs = (volatile struct zynq_uart *) 0xff010000,<br>
> + .regs = (volatile zynq_uart *) ZYNQ_UART_1_BASE_ADDR,<br>
> .irq = ZYNQMP_IRQ_UART_1<br>
> }<br>
> };<br>
> diff --git a/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h b/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h<br>
> index e386bd4b26..d80cedbd0d 100644<br>
> --- a/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h<br>
> +++ b/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h<br>
> @@ -61,6 +61,8 @@<br>
> #include <bsp/start.h><br>
> #include <peripheral_maps/xilinx_zynqmp.h><br>
> <br>
> +#include <dev/serial/zynq-uart-zynqmp.h><br>
> +<br>
> #ifdef __cplusplus<br>
> extern "C" {<br>
> #endif /* __cplusplus */<br>
> diff --git a/bsps/arm/xilinx-zynqmp/console/console-config.c b/bsps/arm/xilinx-zynqmp/console/console-config.c<br>
> index ea148836a5..787ee05dd6 100644<br>
> --- a/bsps/arm/xilinx-zynqmp/console/console-config.c<br>
> +++ b/bsps/arm/xilinx-zynqmp/console/console-config.c<br>
> @@ -44,11 +44,11 @@<br>
> static zynq_uart_context zynqmp_uart_instances[2] = {<br>
> {<br>
> .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ),<br>
> - .regs = (volatile struct zynq_uart *) 0xff000000,<br>
> + .regs = (volatile struct zynq_uart *) ZYNQ_UART_0_BASE_ADDR,<br>
> .irq = ZYNQMP_IRQ_UART_0<br>
> }, {<br>
> .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ),<br>
> - .regs = (volatile struct zynq_uart *) 0xff010000,<br>
> + .regs = (volatile struct zynq_uart *) ZYNQ_UART_1_BASE_ADDR,<br>
> .irq = ZYNQMP_IRQ_UART_1<br>
> }<br>
> };<br>
> diff --git a/bsps/arm/xilinx-zynqmp/include/bsp.h b/bsps/arm/xilinx-zynqmp/include/bsp.h<br>
> index a08a5feee9..cdc37b79a4 100644<br>
> --- a/bsps/arm/xilinx-zynqmp/include/bsp.h<br>
> +++ b/bsps/arm/xilinx-zynqmp/include/bsp.h<br>
> @@ -60,6 +60,8 @@<br>
> #include <bsp/default-initial-extension.h><br>
> #include <bsp/start.h><br>
> <br>
> +#include <dev/serial/zynq-uart-zynqmp.h><br>
> +<br>
> #ifdef __cplusplus<br>
> extern "C" {<br>
> #endif /* __cplusplus */<br>
> diff --git a/bsps/include/dev/serial/zynq-uart-zynq.h b/bsps/include/dev/serial/zynq-uart-zynq.h<br>
> new file mode 100644<br>
> index 0000000000..169037b33a<br>
> --- /dev/null<br>
> +++ b/bsps/include/dev/serial/zynq-uart-zynq.h<br>
> @@ -0,0 +1,66 @@<br>
> +/* SPDX-License-Identifier: BSD-2-Clause */<br>
> +<br>
> +/**<br>
> + * @file<br>
> + *<br>
> + * @ingroup zynq_uart<br>
> + *<br>
> + * @brief This header file provides interfaces with respect to the Zynq<br>
> + * platform.<br>
> + */<br>
> +<br>
> +/*<br>
> + * Copyright (C) 2024 embedded brains GmbH & Co. KG<br>
> + *<br>
> + * Redistribution and use in source and binary forms, with or without<br>
> + * modification, are permitted provided that the following conditions<br>
> + * are met:<br>
> + * 1. Redistributions of source code must retain the above copyright<br>
> + * notice, this list of conditions and the following disclaimer.<br>
> + * 2. Redistributions in binary form must reproduce the above copyright<br>
> + * notice, this list of conditions and the following disclaimer in the<br>
> + * documentation and/or other materials provided with the distribution.<br>
> + *<br>
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"<br>
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE<br>
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE<br>
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE<br>
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR<br>
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF<br>
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS<br>
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN<br>
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)<br>
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE<br>
> + * POSSIBILITY OF SUCH DAMAGE.<br>
> + */<br>
> +<br>
> +#ifndef _DEV_SERIAL_ZYNQ_UART_ZYNQ_H<br>
> +#define _DEV_SERIAL_ZYNQ_UART_ZYNQ_H<br>
> +<br>
> +#ifdef __cplusplus<br>
> +extern "C" {<br>
> +#endif /* __cplusplus */<br>
> +<br>
> +/**<br>
> + * @addtogroup zynq_uart<br>
> + *<br>
> + * @{<br>
> + */<br>
> +<br>
> +/**<br>
> + * @brief This constant defines the Xilinx Zynq UART 0 base address.<br>
> + */<br>
> +#define ZYNQ_UART_0_BASE_ADDR 0xe0000000<br>
> +<br>
> +/**<br>
> + * @brief This constant defines the Xilinx Zynq UART 1 base address.<br>
> + */<br>
> +#define ZYNQ_UART_1_BASE_ADDR 0xe0001000<br>
> +<br>
> +/** @} */<br>
> +<br>
> +#ifdef __cplusplus<br>
> +}<br>
> +#endif /* __cplusplus */<br>
> +<br>
> +#endif /* _DEV_SERIAL_ZYNQ_UART_ZYNQ_H */<br>
> diff --git a/bsps/include/dev/serial/zynq-uart-zynqmp.h b/bsps/include/dev/serial/zynq-uart-zynqmp.h<br>
> new file mode 100644<br>
> index 0000000000..9f29003053<br>
> --- /dev/null<br>
> +++ b/bsps/include/dev/serial/zynq-uart-zynqmp.h<br>
> @@ -0,0 +1,66 @@<br>
> +/* SPDX-License-Identifier: BSD-2-Clause */<br>
> +<br>
> +/**<br>
> + * @file<br>
> + *<br>
> + * @ingroup zynq_uart<br>
> + *<br>
> + * @brief This header file provides interfaces with respect to the Zynq<br>
> + * UltraScale+ MPSoC and RFSoC platforms.<br>
> + */<br>
> +<br>
> +/*<br>
> + * Copyright (C) 2024 embedded brains GmbH & Co. KG<br>
> + *<br>
> + * Redistribution and use in source and binary forms, with or without<br>
> + * modification, are permitted provided that the following conditions<br>
> + * are met:<br>
> + * 1. Redistributions of source code must retain the above copyright<br>
> + * notice, this list of conditions and the following disclaimer.<br>
> + * 2. Redistributions in binary form must reproduce the above copyright<br>
> + * notice, this list of conditions and the following disclaimer in the<br>
> + * documentation and/or other materials provided with the distribution.<br>
> + *<br>
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"<br>
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE<br>
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE<br>
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE<br>
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR<br>
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF<br>
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS<br>
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN<br>
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)<br>
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE<br>
> + * POSSIBILITY OF SUCH DAMAGE.<br>
> + */<br>
> +<br>
> +#ifndef _DEV_SERIAL_ZYNQ_UART_ZYNQMP_H<br>
> +#define _DEV_SERIAL_ZYNQ_UART_ZYNQMP_H<br>
> +<br>
> +#ifdef __cplusplus<br>
> +extern "C" {<br>
> +#endif /* __cplusplus */<br>
> +<br>
> +/**<br>
> + * @addtogroup zynq_uart<br>
> + *<br>
> + * @{<br>
> + */<br>
> +<br>
> +/**<br>
> + * @brief This constant defines the Xilinx Zynq UART 0 base address.<br>
> + */<br>
> +#define ZYNQ_UART_0_BASE_ADDR 0xff000000<br>
> +<br>
> +/**<br>
> + * @brief This constant defines the Xilinx Zynq UART 1 base address.<br>
> + */<br>
> +#define ZYNQ_UART_1_BASE_ADDR 0xff010000<br>
<br>
This is the same as the Versal so is the name of this file OK for use in the<br>
Versal? I do not have a better name?<br>
<br>
Chris<br>
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</blockquote></div>