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<DIV><FONT face=Arial size=2>I am trying to do Bus master DMA from</FONT></DIV>
<DIV><FONT face=Arial size=2>my board to the Host memory.</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>I have noticed that my boards PCI</FONT></DIV>
<DIV><FONT face=Arial size=2>bridge chip, where the dma engines</FONT></DIV>
<DIV><FONT face=Arial size=2>are located, </FONT><FONT face=Arial size=2>does
not specify the PCI device</FONT></DIV>
<DIV><FONT face=Arial size=2>but only the PCI bus when programming
for </FONT></DIV>
<DIV><FONT face=Arial size=2>DMA </FONT><FONT face=Arial size=2>from/to the
host.</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>Is this common? Is it assumed that</FONT></DIV>
<DIV><FONT face=Arial size=2>a DMA initiated from an
RTOS from/to</FONT></DIV>
<DIV><FONT face=Arial size=2>host memory is a default when going</FONT></DIV>
<DIV><FONT face=Arial size=2>to the pci bus? Could I be reading the</FONT></DIV>
<DIV><FONT face=Arial size=2>documentation wrong?</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>I am using the Hurricane </FONT></DIV>
<DIV><FONT face=Arial size=2>with a Vcubed v320USC</FONT></DIV>
<DIV><FONT face=Arial size=2>bridge chip.</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>Thanks</FONT></DIV></BODY></HTML>