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Sounds great. Will this be dropped into CVS? <br>
<br>
I would probably pick up your integration in lieu of my own just to
keep things consistent.<br>
<br>
Brett<br>
<br>
Thomas Doerfler (nt) wrote:
<blockquote cite="mid:472F76A5.9090701@imd-systems.de" type="cite">
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Hi Brett,
thank you for the offer. But now we almost have a/the solution for the
FP context save/restore, so actually we would like to integrate our
solution.
We just want to make sure that we initialize things properly, that's why
I started this thread.
wkr,
Thomas.
Brett Swimley schrieb:
</pre>
<blockquote type="cite">
<pre wrap="">It is a bit different.
I have a patch that saves and restores the FP context for the MCFv4e
that I keep meaning to submit (based on the -mcfv4e compiler option
found in the newer gcc compilers). I will try to put that together.
I will look at the FPU control register initialization. I don't know if
I did that.
On this topic, would it be possible to add the mcfv4e variant to the
list of m68k targets (t-rtems) and include this in the pre-built RPMs?
I added this variant to my version of the compiler, but I don't know if
I got all the soft-float stuff correct.
Brett
Joel Sherrill wrote:
</pre>
<blockquote type="cite">
<pre wrap="">Thomas Doerfler wrote:
</pre>
<blockquote type="cite">
<pre wrap="">Hi,
we are currently adding FPU support for a ColdFire v4e CPU derivate.
After reading, re-reading (and reading again) the relevant files in
cpukit/score/cpu/m68k in the current M68K (with hardware FPU, e.g.
MC68040) CPU Context management, I have not found, where/how the FPU
context is initialized for a newly created thread.
Can somebody please guide me:
- Is the FPU context in an arbitrary state when a new thread is started?
</pre>
</blockquote>
<pre wrap="">If the thread is not an FP task, you would prefer to disable the FPU.
If it is FP enabled, then all that you have to initialize is usually
the control registers.
</pre>
<blockquote type="cite">
<pre wrap="">- Or: Where is the code which defines the initial state of the FPU in a
new thred?
</pre>
</blockquote>
<pre wrap="">score/cpu/m68k/rtems/score/cpu.h and score/cpu/m68k/cpu_asm.S
Is the Coldfire FPU similar to the 68881 or is it more RISC like?
Do you have the same type of fsave/restore instructions?
</pre>
<blockquote type="cite">
<pre wrap="">Any hint appreciated,
Thomas Dörfler.
</pre>
</blockquote>
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<pre wrap=""><!---->
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