This makes use of rtems_interrupt_catch (as you passed 1),so the default ISR dispatcher is used. The default ISR detects whether the interrupt was synchronous or not and modifies %l1 and %l2 accordingly if so.<br><br>Did you run this in a simulator and did a step-by-step? May be clearing the failing status register is not enough and the IU error in the Error status register is also set and you need to clear it as well (in test mode).<br>
<br><div class="gmail_quote">2009/12/2 Leonard Bise <span dir="ltr"><<a href="mailto:leonard.bise@syderal.ch">leonard.bise@syderal.ch</a>></span><br><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">
<br><font size="2" face="sans-serif">Thank you Aleix! But yeah I'm working
on uncorrectable EDAC errors.</font>
<br>
<br><font size="2" face="sans-serif">Also I was wondering, the trap table
is installed using this function, maybe this could be the cause of my problem?</font>
<br>
<br><font color="#820040" size="2" face="Courier New"><b>void</b></font><font size="2" face="Courier New">
OS_install_handler(OS_FUNCPTR handler, uint32 irq) {</font>
<br><font size="2" face="Courier New"> {</font>
<br><font size="2" face="Courier New"> </font><font color="#3f8080" size="2" face="Courier New">/*#[
operation OS_install_handler(OS_FUNCPTR,uint32) */</font>
<br><font size="2" face="Courier New"> set_vector
((</font><font color="#820040" size="2" face="Courier New"><b>const</b></font><font size="2" face="Courier New">
rtems_isr_entry) handler, irq, 1);</font>
<br><font size="2" face="Courier New"> </font><font color="#3f8080" size="2" face="Courier New">/*#]*/</font>
<br><font size="2" face="Courier New"> }</font>
<br><font size="2" face="Courier New">}</font>
<br>
<br>
<br>
<br>
<br>
<table width="100%">
<tbody><tr valign="top">
<td width="40%"><font size="1" face="sans-serif"><b>Aleix Conchillo Flaqué
<<a href="mailto:aconchillo@ice.csic.es" target="_blank">aconchillo@ice.csic.es</a>></b> </font>
<br><font size="1" face="sans-serif">Envoyé par : <a href="mailto:aconchillo@gmail.com" target="_blank">aconchillo@gmail.com</a></font>
<p><font size="1" face="sans-serif">01.12.2009 19:43</font>
</p></td><td width="59%">
<table width="100%">
<tbody><tr valign="top">
<td>
<div align="right"><font size="1" face="sans-serif">A</font></div>
</td><td><font size="1" face="sans-serif">Leonard Bise <<a href="mailto:leonard.bise@syderal.ch" target="_blank">leonard.bise@syderal.ch</a>></font>
</td></tr><tr valign="top">
<td>
<div align="right"><font size="1" face="sans-serif">cc</font></div>
</td><td><font size="1" face="sans-serif"><a href="mailto:rtems-users@rtems.org" target="_blank">rtems-users@rtems.org</a></font>
</td></tr><tr valign="top">
<td>
<div align="right"><font size="1" face="sans-serif">Objet</font></div>
</td><td><font size="1" face="sans-serif">Re: RTEMS LEON2 EDAC Trap Management</font></td></tr></tbody></table>
<br>
<table>
<tbody><tr valign="top">
<td>
</td><td></td></tr></tbody></table>
<br></td></tr></tbody></table>
<br>
<br>
<br><tt><font size="2">Sorry Leonard, I just read your mail too fast. May
be my answer helps<br>
someone else with single errors. :-)<br>
<br>
Cheers,<br>
<br>
Aleix<br>
<br>
On Tue, Dec 1, 2009 at 17:24, Leonard Bise <<a href="mailto:leonard.bise@syderal.ch" target="_blank">leonard.bise@syderal.ch</a>>
wrote:<br>
><br>
> Hi all,<br>
><br>
> I'm working on an RTEMS application running on a LEON2 processor.<br>
> I have some issues in regard to the Double EDAC error trap (0x09)<br>
> management.<br>
><br>
> I'm trying to validate that my application correctly manages EDAC
errors by<br>
> launching my application, breaking then generating an EDAC error and
then<br>
> resuming.<br>
> My application then detects that an error has hapened and launches
the<br>
> correct trap handler.<br>
><br>
> After the trap has been handled, we resume normal execution by executing
the<br>
> rett instruction (return from trap), with the address of the next<br>
> instruction after the one that has been trapped.<br>
> Only that instead of continuing executing after the rett, the same<br>
> instruction that triggered the first error triggers another error
(0x11)<br>
> which should be a correctable EDAC error.<br>
><br>
> This behavior then loops forever (Double EDAC than Single EDAC etc...)
and<br>
> after some time my application resets (I have approximatively 32'000
trap<br>
> triggered for each one before it resets).<br>
><br>
> I've been looking around for help in the LEON "community"
but I could not<br>
> find much help. I know it is not necessarily RTEMS related but a colleague<br>
> of mine which does the exact same thing on another project but only
in C has<br>
> no problem so I'm wondering what might be causing this.<br>
><br>
> For info here is my double edac trap handler.<br>
><br>
> static void BGD_trap_DE_handler(void) {<br>
> {<br>
> /*#[ operation BGD_trap_DE_handler() */<br>
> volatile uint32*
failing_address;<br>
> boolean accepted = FALSE;<br>
><br>
> /* read Failure Address Register */<br>
> asm("TEST_EDAC_DOUBLE_START:nop;");<br>
> failing_address = *FAILAR;<br>
> FIFO_edac_address [FIFO_edac_next] = (uint32)failing_address;<br>
> FIFO_edac_double [FIFO_edac_next] = 1;<br>
> FIFO_edac_nb = (FIFO_edac_nb & 0xF)
+ 1;<br>
> /* Note: in case more than 16 errors occur
during 1 second, the 16<br>
> oldest will be lost. */<br>
> FIFO_edac_next = (FIFO_edac_next+1) &
0xF;<br>
><br>
> /* SYD MOD */<br>
> if ((failing_address < START_EEPROM)
|| (failing_address >=<br>
> 0x80000000))<br>
> {<br>
> BGD_process_d_edac_sram();<br>
> }<br>
> else<br>
> {<br>
> BGD_process_d_edac_eeprom();<br>
> }<br>
> /* reset fail status register */<br>
> *FAILSR = 0;<br>
> *FAILAR = 0;<br>
><br>
> //BDT_abort_request (&accepted);<br>
> /*#]*/<br>
> asm("TEST_EDAC_DOUBLE_END:nop;");<br>
> }<br>
> }<br>
><br>
> Here is a disassembly of the instruction that triggers the Double
EDAC<br>
> Trap, which is correct:<br>
> 1046115464 40001400 cmp %i0, 15
[00000ff1]<br>
> 1046115466 40001404 bgu 0x40001414
[00000000]<br>
> 1046115467 40001408 nop
[00000000]<br>
> 1046115468 40001414 add %fp, -20, %i5
[401e5f34]<br>
> 1046115473 ahb read,
mst=0, size=2 [401e5f34 40053854]<br>
> 1046115474 40001418 ld [%i5], %i2
[40053854]<br>
> 1046115475 4000141c add %fp, -24, %i4
[401e5f30]<br>
> 1046115480 ahb read,
mst=0, size=2 [401e5f30 40100000]<br>
> 1046115481 40001420 ld [%i4], %i1
[40100000]<br>
> 1046115482 40001424 mov %i2, %i3
[40053854]<br>
> 1046115483 40001428 mov %i1, %i0
[40100000]<br>
> 1046115491 ahb read,
mst=0, size=2 [40100000 a6102003]<br>
> 1046115492 4000142c ld [%i0], %i0
[trapped]<br>
><br>
> Here is the second trap triggered, which should not happen:<br>
> 1046117903 4002bdc8 mov %l0, %psr
[000000c4]<br>
> 1046117904 4002bdcc nop
[00000000]<br>
> 1046117905 4002bdd0 nop
[00000000]<br>
> 1046117906 4002bdd4 nop
[00000000]<br>
> 1046117911 ahb read,
mst=0, size=2 [401e5e84 00000000]<br>
> 1046117912 4002bdd8 ld [%g1 + 0x6c], %g1
[00000000]<br>
> 1046117913 4002bddc jmp %l1
[4002bddc]<br>
> 1046117914 4002bde0 rett %l2
[40001430]<br>
> 1046117916 4000142c ld [%i0], %i0
[trapped]<br>
><br>
> I hope someone can help ;)<br>
><br>
> Léonard.<br>
><br>
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<br></blockquote></div><br>