<div dir="ltr"><div><div>Hi,<br><br>>What do you mean with basic interrupt handlers?<br></div>Not using the IRQ exception handler at 0x18, but like so.<br><br>--------------------<br><br>#define VICVectAddr0 REG32(0xFFFFF100) /* Vector Address 0 Register */<br>
#define VICIntEnable REG32(0xFFFFF010) /* Interrupt Enable Register */<br>#define VICIntEnClear REG32(0xFFFFF014) /* Interrupt Enable Clear Register */<br>#define VICIntSelect REG32(0xFFFFF00C) /* Interrupt Select Register */<br>
<br>VICIntEnClear = VIC_BIT(VIC_TIMER0); // Ensure the interrupt is disabled<br>...<br>VICVectAddr0 = (ULONG)tick_handler; // Address of the ISR<br>VICIntSelect &= ~VIC_BIT(VIC_TIMER0); // Timer0 selected as IRQ<br>
VICIntEnable = VIC_BIT(VIC_TIMER0); // Timer0 interrupt enabled<br>VICVectCntl0 = VIC_ENABLE | VIC_TIMER0;<br><br>---------------------------<br><br>>If you want to keep your exception vectors in the flash, then simply use
arm_exc_interrupt >(on 4.10) or _ARMV4_Exception_interrupt (on 4.11) as
the entry point for the interrupt >exception.<br><br></div>Do you mean passing arm_exc_interrupt as the handler into rtems_interrupt_handler_install() ? that still gives an unhandled IRQ exception, probably because there is no handler installed in 0x18.<br>
<br><div><div><br><br></div></div></div><div class="gmail_extra"><br><br><div class="gmail_quote">On 19 April 2013 08:27, Sebastian Huber <span dir="ltr"><<a href="mailto:sebastian.huber@embedded-brains.de" target="_blank">sebastian.huber@embedded-brains.de</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="im">On 04/18/2013 07:39 PM, Matthew J Fletcher wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
I've corrected that, no change. I think the issue is that no handler is getting<br>
registered. I believe you said previously that ISR_Handler() was the single<br>
entry point for all interrupt vectors then it works out what vector its called<br>
on and calls the appropriate handler.<br>
<br>
ARM looks to be the odd one out in that it uses in<br>
/cpukit/score/cpu/arm/arm_sec_<u></u>interrupt.S<br>
<br>
I remember now what problem might be, i had to remove the<br>
_CPU_ISR_install_vector() call which add arm_exc_interrupt because on my<br>
hardware the vector table at 0x0000000 is mapped to on ARM internal flash<br>
(which does contain basic interrupt handlers), not RAM.<br>
</blockquote>
<br></div>
What do you mean with basic interrupt handlers? The interrupt prologue/epilogue in arm_sec_interrupt.S is there for a purpose. If you want to keep your exception vectors in the flash, then simply use arm_exc_interrupt (on 4.10) or _ARMV4_Exception_interrupt (on 4.11) as the entry point for the interrupt exception.<div class="im">
<br>
<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
I've now got a sinking feeling that i cant use rtems on my hardware as is. I<br>
suppose this is a question for Sebastian, but when i rtems_interrupt_handler_<br>
install() can the handler just be 'arm_exc_interrupt', and the argument the<br>
vector number ?<br>
<br>
I've got my fingers crossed for the answer.<br>
</blockquote>
<br></div>
No, this vector is part of the interrupt extension implementation.<br>
<br>
<a href="http://www.rtems.org/onlinedocs/doxygen/cpukit/html/group__rtems__interrupt__extension.html" target="_blank">http://www.rtems.org/<u></u>onlinedocs/doxygen/cpukit/<u></u>html/group__rtems__interrupt__<u></u>extension.html</a><br>
<br>
You may have a look at (with Doxygen comments):<br>
<br>
c/src/lib/libbsp/shared/<u></u>include/irq-config.h<br>
c/src/lib/libbsp/shared/<u></u>include/irq-generic.h<br>
c/src/lib/libbsp/shared/src/<u></u>irq-generic.c<br>
c/src/lib/libbsp/shared/src/<u></u>irq-legacy.c<br>
<br>
I recommend to use the Git master for ARM. The current Git master has release quality.<div class="HOEnZb"><div class="h5"><br>
<br>
-- <br>
Sebastian Huber, embedded brains GmbH<br>
<br>
Address : Dornierstr. 4, D-82178 Puchheim, Germany<br>
Phone : <a href="tel:%2B49%2089%20189%2047%2041-16" value="+4989189474116" target="_blank">+49 89 189 47 41-16</a><br>
Fax : <a href="tel:%2B49%2089%20189%2047%2041-09" value="+4989189474109" target="_blank">+49 89 189 47 41-09</a><br>
E-Mail : <a href="mailto:sebastian.huber@embedded-brains.de" target="_blank">sebastian.huber@embedded-<u></u>brains.de</a><br>
PGP : Public key available on request.<br>
<br>
Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.<br>
</div></div></blockquote></div><br><br clear="all"><br>-- <br><div><br>regards</div><div>---</div><div>Matthew J Fletcher</div><br>
</div>