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<body><p dir="ltr">Then the bsp should user the correct cpu cflags and the isr vectoring code should disable the fpu if possible.</p><div class="quote">On Dec 12, 2013 8:45 AM, Sebastian Huber <sebastian.huber@embedded-brains.de> wrote:<br type="attribution"></div></body>
<font size="2"><div class="PlainText">On 2013-12-12 15:26, Matt Wette wrote:<br>
> But if you don't use FP in ISR you still need to compile the ISR with<br>
> -fsoft-float because the compiler may dirty the FP registers otherwise.<br>
> For example: a = b; where a, b are struct timespec may be implemented in FP<br>
> registers.<br>
<br>
In case the ISR uses operating system services, then this is highly dangerous <br>
since operating system functions are not compiled with -msoft-float in this <br>
case. Also on PowerPC the hard-float and soft-float ABIs are incompatible.<br>
<br>
The distinction between floating-point and non-floating-point tasks is <br>
questionable with modern compilers.<br>
<br>
-- <br>
Sebastian Huber, embedded brains GmbH<br>
<br>
Address : Dornierstr. 4, D-82178 Puchheim, Germany<br>
Phone : +49 89 189 47 41-16<br>
Fax : +49 89 189 47 41-09<br>
E-Mail : sebastian.huber@embedded-brains.de<br>
PGP : Public key available on request.<br>
<br>
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