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<DIV>Hi Gedare,</DIV>
<DIV> </DIV>
<DIV> I will supply the
detailed porting steps if I porting the Nano-X and RTEMS to AT91SAM9G45
MCU successful.</DIV>
<DIV> </DIV>
<DIV> </DIV>
<HR style="WIDTH: 210px; HEIGHT: 1px" align=left color=#b5c4df SIZE=1>
<DIV><SPAN>huangxi_hans</SPAN></DIV>
<DIV> </DIV>
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<DIV><B>发件人：</B> <A href="mailto:gedare@rtems.org">Gedare Bloom</A></DIV>
<DIV><B>发送时间：</B> 2014-04-16 22:19</DIV>
<DIV><B>收件人：</B> <A
href="mailto:huangxi_hans@163.com">huangxi_hans</A></DIV>
<DIV><B>抄送：</B> <A href="mailto:ppisa4lists@pikron.com">Pavel Pisa</A>; <A
href="mailto:rtems-users@rtems.org">rtems-users</A></DIV>
<DIV><B>主题：</B> Re: Re: How to porting Nano-X to RTEMS, graphic drivers
support and PC VESA support.</DIV></DIV></DIV>
<DIV>
<DIV>Thank you both for keeping this on the list. -Gedare</DIV>
<DIV> </DIV>
<DIV>On Wed, Apr 16, 2014 at 9:44 AM, huangxi_hans <huangxi_hans@163.com> wrote:</DIV>
<DIV>> Hello Pavel,</DIV>
<DIV>></DIV>
<DIV>> Thanks!! And your answer is so detailed.</DIV>
<DIV>></DIV>
<DIV>> I will enable the D-cache and I-cache. If I disable the I-cache,</DIV>
<DIV>> the code is running so slowly.</DIV>
<DIV>></DIV>
<DIV>> The framebuffer address is managed by SM502 if I use the SM502</DIV>
<DIV>> with AT91SAM9G45, but the AT91SAM9G45 directly write this address. Because</DIV>
<DIV>> the SM502 connect a SDRAM for framebuffer RAM,this SDRAM only for</DIV>
<DIV>> framebuffer, not use for other task. My step is below:</DIV>
<DIV>></DIV>
<DIV>> 1. Config the SM502 chip in bootloader, and show logo. That's</DIV>
<DIV>> verify the HW design is or not right.</DIV>
<DIV>></DIV>
<DIV>> 2. Porting the RTEMS 4.11 to AT91SAM9G45 ,and running some tasks</DIV>
<DIV>> ,verify the RTEMS is or not OK.</DIV>
<DIV>></DIV>
<DIV>> 3. Show circle and line to LCD through the RTEMS . Verify LCD</DIV>
<DIV>> handle is or not OK in RTEMS.</DIV>
<DIV>></DIV>
<DIV>> 4. Porting the Nano-X to RTEMS and refer to your scr_mx1sl.c.</DIV>
<DIV>> This course may be need some times.</DIV>
<DIV>></DIV>
<DIV>></DIV>
<DIV>> Later, may be have some questions need to trouble you. You're a</DIV>
<DIV>> wonderful teacher.</DIV>
<DIV>></DIV>
<DIV>></DIV>
<DIV>></DIV>
<DIV>></DIV>
<DIV>></DIV>
<DIV>></DIV>
<DIV>></DIV>
<DIV>> ________________________________</DIV>
<DIV>> huangxi_hans</DIV>
<DIV>></DIV>
<DIV>> From: Pavel Pisa</DIV>
<DIV>> Date: 2014-04-16 16:26</DIV>
<DIV>> To: 黄喜</DIV>
<DIV>> CC: rtems-users</DIV>
<DIV>> Subject: Re: How to porting Nano-X to RTEMS, graphic drivers support and PC</DIV>
<DIV>> VESA support.</DIV>
<DIV>> Helo Hans,</DIV>
<DIV>></DIV>
<DIV>></DIV>
<DIV>> On Wednesday 16 of April 2014 03:35:19 黄喜 wrote:</DIV>
<DIV>>> My project is based on ARM with SM502 Silicon Motion</DIV>
<DIV>>> multimedia chip. But the at91sam9g45 connect SM502 through the address bus</DIV>
<DIV>>> ,data bus and chip select signal.It is not through the PCI interface. But</DIV>
<DIV>>> the SM502 support the PCI interface connect to other MCU.For example.</DIV>
<DIV>>> Xscale, MIPS, Hitach etc.</DIV>
<DIV>>></DIV>
<DIV>>> According to above your answer, The CSB336 has not a fb.c file in</DIV>
<DIV>>> RTEMS, the LCD Hardware initialization steps finish in bootloader or</DIV>
<DIV>>> bootblock.So the LCD controller is initialized before run RTEMS, only do</DIV>
<DIV>>> scr_mx1sl.c steps tell Nano-X how to do. The RTEMS doesn't need know any</DIV>
<DIV>>> information about the framebuffer. So has not a framebuffer driver</DIV>
<DIV>>> architecture in CSB336 port. Is right?</DIV>
<DIV>></DIV>
<DIV>> Yes, that is a option. RTEMS usually maps virtual and physical addrespace</DIV>
<DIV>> 1:1</DIV>
<DIV>> so direct access is possible. You need to consider cache. The area</DIV>
<DIV>> representing framebuffer control registers has to be uncached and</DIV>
<DIV>> framebuffer</DIV>
<DIV>> area should be write through (ideally + combine) cached or uncached</DIV>
<DIV>> (slower).</DIV>
<DIV>></DIV>
<DIV>> Look at CSB336 memory mapping as an example.</DIV>
<DIV>></DIV>
<DIV>> http://git.rtems.org/rtems/tree/c/src/lib/libbsp/arm/csb336/startup/memmap.c</DIV>
<DIV>></DIV>
<DIV>> We use framebuffer in main memory for some boards variants (MXS based)</DIV>
<DIV>> and we need to declare it as MMU_CACHE_WTHROUGH.</DIV>
<DIV>></DIV>
<DIV>>> I don't through the PCI interface connect to SM502 chip. I through</DIV>
<DIV>>> the data bus and address bus connect to SM502 chip. And I have some</DIV>
<DIV>>> experience to achieve it about Hardware. And have some demo code to tell</DIV>
<DIV>>> me</DIV>
<DIV>>> how to initialize the SM502 chip through the address bus and data bus, so</DIV>
<DIV>>> I</DIV>
<DIV>>> want to put these initialization code in bootloader, bypass RTEMS</DIV>
<DIV>>> framebuffer architecture,Because I need show logo of company, and copy the</DIV>
<DIV>>> application from norflash to DDR. And then base your scr_mx1sl.c to give</DIV>
<DIV>>> the fixed framebuffer address and LCD configure information to Nano-X. Is</DIV>
<DIV>>> a viable method?</DIV>
<DIV>></DIV>
<DIV>> Yes than my approach is most simple and you can even use allmost directly</DIV>
<DIV>> bare metal support code from RTEMS. Writing simple RTEMS based driver</DIV>
<DIV>> should not be problem as well but you do not gain too much there</DIV>
<DIV>> and if your framebuffer mapping is specific for your HW (i.e. GPU</DIV>
<DIV>> is not part of standard supported board or SoC) then there is not</DIV>
<DIV>> significant reason to try to push it into RTEMS mainline.</DIV>
<DIV>></DIV>
<DIV>> I do CC to mainlinglist because information can be interresting</DIV>
<DIV>> to others as well.</DIV>
<DIV>></DIV>
<DIV>> Best wishes,</DIV>
<DIV>></DIV>
<DIV>> Pavel Pisa</DIV>
<DIV>></DIV>
<DIV>> ==================================================</DIV>
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<DIV>> 182 00 Praha 8 WWW: http://www.pikron.com/</DIV>
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<DIV>></DIV>
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