<div dir="ltr"><div class=""><p>Hi,<br>I'm a RTEMS newbie and I've recently experimented with RTEMS on a microzed board.<br>I
did some basic testing with the provided examples, and I'm now
interested to know more about the support for the Ethernet; this is what
I figured out so far:</p>
<ul><li>the RTEMS page on the xilinx site (<a href="http://www.wiki.xilinx.com/RTEMS" target="_blank" rel="noreferrer">http://www.wiki.xilinx.com/RTEMS</a>) lists "Etherne" among the supported devices - it is wrong and misleading</li><li>there's no support for the Ethernet in the current source tree</li><li>back in 2013, a patch adding support for the Ethernet driver was submitted (<a href="https://lists.rtems.org/pipermail/devel/2013-April/002915.html" target="_blank" rel="noreferrer">https://lists.rtems.org/pipermail/devel/2013-April/002915.html</a>) but not included upstream. I depends on some sources which must be obtained from Xilinx</li><li>current u-boot supports the Eternet device with GPL licensed code</li></ul>
<p>I'm giving a go at resurrecting the patch which must fit the latest
RTEMS sources and the most recent version of the BIST code I've obtained
from Xilinx. I got to the point where I can compile the BSP and a
simple application using the ethernet driver: I got there workarounding
and postponing the problems I stepped into.</p>
<p>the application hangs after doing some device initialization, in particular in the middle of a routine initializing dma.<br>The comments before the offending code say:
/<em> Allocate a 1 MB MMU page aligned to 1 MB boundary for the BDs.</em>/<br> /<em>
</em> The BDs need to be allocated in uncached memory. Hence the 1 MB address<br> <em> range just allocated is made uncached by setting appropriate attributes
</em> in the translation table.<br> */</p>
<p>It turns out that xilinx code relies on a MMUTable declared as "extern u32" and handled in the linker script as follows:</p>
<p>.mmu_tbl (ALIGN(16384)) : {<br> <strong>mmu_tbl_start = .;<br> *(.mmu_tbl)
</strong>mmu_tbl_end = .;<br>} > ps7_ddr_0_S_AXI_BASEADDR</p>
<p>Can I get some help on handling such memory area with current RTEMS linker script?</p>
<p>thanx so much in advance</p>
<p>Davide</p>
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