<div dir="ltr"><div dir="ltr"><div dir="ltr"><div dir="ltr"><div dir="ltr">Hi Jan,<div><br></div><div>RTEMS master currently supports ARM Xilinx Zynq: <a href="https://github.com/RTEMS/rtems/tree/master/bsps/arm/xilinx-zynq">https://github.com/RTEMS/rtems/tree/master/bsps/arm/xilinx-zynq</a>.</div><div>Please have a look at <a href="https://docs.rtems.org/branches/master/cpu-supplement/arm.html">https://docs.rtems.org/branches/master/cpu-supplement/arm.html</a>.</div><div><br></div><div>To understand the BSP framework, refer to <a href="https://docs.rtems.org/branches/master/bsp-howto/index.html">https://docs.rtems.org/branches/master/bsp-howto/index.html</a>.</div><div>Hope it helps.</div><div><br></div><div>Best regards,</div><div>Maxul Lee</div><div><br></div></div></div></div></div></div><br><div class="gmail_quote"><div dir="ltr"><<a href="mailto:Jan.Sommer@dlr.de">Jan.Sommer@dlr.de</a>> 于2018年10月10日周三 上午4:56写道:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Hello,<br>
<br>
we will have access to a Xilinx Zynq ultrascale+ soon.<br>
It has 4xA53 cores. <br>
If I understand it correctly they are based on AArch64 which is currently not supported by RTEMS.<br>
However, running the processors in 32bit mode would be sufficient.<br>
I have some problems determining what is already present in RTEMS for a BSP.<br>
Has by any chance someone already done that?<br>
I only started to look at the RM of the SoC and try to determine which core devices have changes and need new/updated drivers in the shared arm directory.<br>
Any guidance would be greatly appreciated. Is it the right idea to start with the A9-based BSPs and go from there?<br>
<br>
Best regards,<br>
<br>
Jan<br>
<br>
<br>
Deutsches Zentrum für Luft- und Raumfahrt e. V. (DLR)<br>
German Aerospace Center<br>
Simulation and Software Technology | Software for Space Systems and Interactive Visualization | Lilienthalplatz 7 | 38108 Braunschweig | Germany<br>
<br>
Jan Sommer<br>
Telephone +49 531 295-2494 | Telefax 0531 295-2767 | <a href="mailto:jan.sommer@dlr.de" target="_blank">jan.sommer@dlr.de</a><br>
DLR.de/SC<br>
<br>
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