<div dir="ltr"><div>If you are overriding the RTEMS memory map, be sure to map OCM as Device memory. The ROM bootloader accesses it with non-cacheable attributes.<br></div><div><br></div><div><br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Thu, Apr 2, 2020 at 4:19 PM Chris Johns <<a href="mailto:chrisj@rtems.org">chrisj@rtems.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On 2020-04-02 18:45, Fernando DomĂnguez Pousa wrote:<br>
> Hi again,<br>
> <br>
> Finally I could continue my tests on zc706 and the second processor start.<br>
> <br>
> I could add two breakpoints one at _CPU_SMP_Start_processor (0x0041e7b0) and other at _Per_CPU_State_wait_for_non_initial_state (0x0041e7d4) at the end of the function _CPU_SMP_Start_processor. Execution stops and continues in both breakpoints, but I still need to need to start the second processor from xsdb. I attach you a capture of the objdump done at the end of the mail.<br>
<br>
The way the process is started is by a write to an address <br>
(0xfffffff0UL). The second core is parked in code in the ROM monitor <br>
that is in zynq and when kicked it jumps to the address held in the <br>
special location. At power up the address points to a ROM loop that just <br>
loops and power downs. I wonder if xsdb is doing something with the core <br>
that is effecting what happens?<br>
<br>
>> Yes I believe so. I tested the m2003 version.<br>
> Can you share me the compilation flags you use for your tests executables?<br>
<br>
I use the ones RTEMS uses to build the BSP with some changes in the <br>
warning flags. You need to do this to maintain the ABI ...<br>
<br>
<a href="https://docs.rtems.org/branches/master/user/exe/executables.html#machine-flags-and-abi" rel="noreferrer" target="_blank">https://docs.rtems.org/branches/master/user/exe/executables.html#machine-flags-and-abi</a><br>
<br>
> And sorry for this answer, but where can I find the m2003 version? Is it a git tag, branch.. ? I don't see anything similar on GitHub repos.<br>
<br>
Please try the m2004 snapshot. You should have received an email about it.<br>
<br>
>> I wonder if xsdb is doing something. Are you able to set a break point<br>
>> in the code I provided to the link to in zynq_start_bspsmp.c<br>
> Maybe the JTAG hardware could cause this...<br>
<br>
It is not the hardware rather the xsdb software. You may need to tell it <br>
to use the second core and what it needs to do. I know with OpenOCD you <br>
need to tell it you have both cores running.<br>
<br>
Chris<br>
_______________________________________________<br>
users mailing list<br>
<a href="mailto:users@rtems.org" target="_blank">users@rtems.org</a><br>
<a href="http://lists.rtems.org/mailman/listinfo/users" rel="noreferrer" target="_blank">http://lists.rtems.org/mailman/listinfo/users</a></blockquote></div><br clear="all"><br>-- <br><div dir="ltr" class="gmail_signature">Jonathan Brandmeyer<br>Vice President of Software Engineering<br>PlanetiQ</div>