[rtems commit] bsps/arm: Cortex-A9 MPCore start

[Sebastian Huber]

Module:    rtems
Branch:    master
Commit:    b938108b3d909a27aa8cd58fc410719be9220ad6
Changeset: http://git.rtems.org/rtems/commit/?id=b938108b3d909a27aa8cd58fc410719be9220ad6

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Wed Jun  4 10:03:40 2014 +0200

bsps/arm: Cortex-A9 MPCore start

Add arm_a9mpcore_start_enable_smp_in_auxiliary_control().

---

 .../libbsp/arm/shared/include/arm-a9mpcore-start.h |   19 +++++++++++++------
 1 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-start.h b/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-start.h
index a3309ba..155d330 100644
--- a/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-start.h
+++ b/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-start.h
@@ -125,6 +125,18 @@ arm_a9mpcore_start_on_secondary_processor(void)
 
   _SMP_Start_multitasking_on_secondary_processor();
 }
+
+BSP_START_TEXT_SECTION static inline void
+arm_a9mpcore_start_enable_smp_in_auxiliary_control(void)
+{
+  /*
+   * Enable cache coherency support and cache/MMU maintenance broadcasts for
+   * this processor.
+   */
+  uint32_t actlr = arm_cp15_get_auxiliary_control();
+  actlr |= ARM_CORTEX_A9_ACTL_SMP | ARM_CORTEX_A9_ACTL_FW;
+  arm_cp15_set_auxiliary_control(actlr);
+}
 #endif
 
 BSP_START_TEXT_SECTION static inline void arm_a9mpcore_start_hook_0(void)
@@ -136,12 +148,7 @@ BSP_START_TEXT_SECTION static inline void arm_a9mpcore_start_hook_0(void)
   arm_a9mpcore_start_scu_enable(scu);
 
 #ifdef RTEMS_SMP
-  /* Enable cache coherency support for this processor */
-  {
-    uint32_t actlr = arm_cp15_get_auxiliary_control();
-    actlr |= ARM_CORTEX_A9_ACTL_SMP | ARM_CORTEX_A9_ACTL_FW;
-    arm_cp15_set_auxiliary_control(actlr);
-  }
+  arm_a9mpcore_start_enable_smp_in_auxiliary_control();
 #endif
 
   cpu_id = arm_cortex_a9_get_multiprocessor_cpu_id();