[rtems commit] bsps/imxrt: Fix enabling USBPHY in fsl_clock

[Christian Mauderer]

Module:    rtems
Branch:    master
Commit:    91b1c7b0a61a88471b55eb157dc96e4caa4bae63
Changeset: http://git.rtems.org/rtems/commit/?id=91b1c7b0a61a88471b55eb157dc96e4caa4bae63

Author:    Christian Mauderer <christian.mauderer at embedded-brains.de>
Date:      Fri Aug 11 07:37:32 2023 +0200

bsps/imxrt: Fix enabling USBPHY in fsl_clock

The mcux-sdk tries to enable the USBPHY. But it uses the wrong register
for that. This patch fixes the bug.

---

 bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_clock.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_clock.c b/bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_clock.c
index 1e40dc4038..4928b1aad7 100644
--- a/bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_clock.c
+++ b/bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_clock.c
@@ -1735,7 +1735,11 @@ bool CLOCK_EnableUsbhs0PhyPllClock(clock_usb_phy_src_t src, uint32_t freq)
     USBPHY1->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_EN_USB_CLKS_MASK);
 
     USBPHY1->CTRL_CLR = USBPHY_CTRL_CLR_CLKGATE_MASK;
+#ifndef __rtems__
     USBPHY1->PWD_SET  = 0x0;
+#else /* __rtems__ */
+    USBPHY1->PWD = 0x0;
+#endif /* __rtems__ */
 
     while (0UL == (USBPHY1->PLL_SIC & USBPHY_PLL_SIC_PLL_LOCK_MASK))
     {
@@ -1841,7 +1845,11 @@ bool CLOCK_EnableUsbhs1PhyPllClock(clock_usb_phy_src_t src, uint32_t freq)
     USBPHY2->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_EN_USB_CLKS_MASK);
 
     USBPHY2->CTRL_CLR = USBPHY_CTRL_CLR_CLKGATE_MASK;
+#ifndef __rtems__
     USBPHY2->PWD_SET  = 0x0;
+#else /* __rtems__ */
+    USBPHY2->PWD = 0x0;
+#endif /* __rtems__ */
 
     while (0UL == (USBPHY2->PLL_SIC & USBPHY_PLL_SIC_PLL_LOCK_MASK))
     {