[rtems-docs commit] user/zynqmp-rpu: Update boot suggestion

[Joel Sherrill]

Module:    rtems-docs
Branch:    master
Commit:    24cce927edfcd920b47f05880ee21c6d6e42f29a
Changeset: http://git.rtems.org/rtems-docs/commit/?id=24cce927edfcd920b47f05880ee21c6d6e42f29a

Author:    Kinsey Moore <kinsey.moore at oarcorp.com>
Date:      Sun Feb 18 19:39:40 2024 -0600

user/zynqmp-rpu: Update boot suggestion

Change the development suggestion for booting the R5 since the R5 u-boot
is only minimally functional without significant development. This also
adds caveats when booting the R5 cores from the A53.

---

 user/bsps/arm/xilinx-zynqmp-rpu.rst | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/user/bsps/arm/xilinx-zynqmp-rpu.rst b/user/bsps/arm/xilinx-zynqmp-rpu.rst
index 01f9f23..a29cb84 100644
--- a/user/bsps/arm/xilinx-zynqmp-rpu.rst
+++ b/user/bsps/arm/xilinx-zynqmp-rpu.rst
@@ -31,8 +31,18 @@ Boot on ZynqMP Hardware
 
 On the ZynqMP RPU, RTEMS can be started by Cortes-R5 u-boot, Cortex-A53 u-boot,
 via JTAG, or directly as part of BOOT.bin. For quick turnaround during testing,
-it is recommended to use Cortex-R5 u-boot to avoid repeated BOOT.bin generation
-and to ensure that the Cortex-R5 FSBL is run.
+it is recommended to use Cortex-A53 u-boot to avoid repeated BOOT.bin
+generation since the provided Cortex-R5 u-boot is highly limited and has no
+network or MMC/SD access.
+
+Note that if the RPU image is started by the Cortex-A53 u-boot, the BSP
+configuration must be updated to move ZYNQMP_RPU_RAM_INT_0_ORIGIN and
+ZYNQMP_RPU_RAM_INT_1_ORIGIN into DDR since the TCMs are not directly available
+to the Cortex-A53 cores at their Cortex-R5 internal addresses. Alternatively,
+those sections could be copied to the TCMs using their global addresses, but
+this must be done using additional commands within u-boot. If this is not taken
+into account, the Cortex-R5 CPU will fail to boot correctly since execution
+will jump into uninitialized TCM.
 
 Hardware Boot Image Generation
 ------------------------------