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<title>change log for rtems (2010-06-28)</title>
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<font color='#bb2222'><strong>joel</strong></font>
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<tr><td colspan='3' bgcolor='#dddddd'><pre>2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* arm_exc_interrupt.S: Add a per cpu data structure which contains the
information required by RTEMS for each CPU core. This encapsulates
information such as thread executing, heir, idle and dispatch needed.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/arm/ChangeLog.diff?r1=text&tr1=1.121&r2=text&tr2=1.122&diff_format=h">M</a></td><td width='1%'>1.122</td><td width='100%'>cpukit/score/cpu/arm/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/arm/arm_exc_interrupt.S.diff?r1=text&tr1=1.5&r2=text&tr2=1.6&diff_format=h">M</a></td><td width='1%'>1.6</td><td width='100%'>cpukit/score/cpu/arm/arm_exc_interrupt.S</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/cpukit/score/cpu/arm/ChangeLog:1.121 rtems/cpukit/score/cpu/arm/ChangeLog:1.122
--- rtems/cpukit/score/cpu/arm/ChangeLog:1.121 Mon May 10 15:29:13 2010
+++ rtems/cpukit/score/cpu/arm/ChangeLog Mon Jun 28 19:31:02 2010
</font><font color='#997700'>@@ -1,3 +1,10 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * arm_exc_interrupt.S: Add a per cpu data structure which contains the
+ information required by RTEMS for each CPU core. This encapsulates
+ information such as thread executing, heir, idle and dispatch needed.
+
</font> 2010-05-10 Joel Sherrill <joel.sherrilL@OARcorp.com>
* rtems/score/arm.h: Make it a warning not error that the FPU multilib
<font color='#006600'>diff -u rtems/cpukit/score/cpu/arm/arm_exc_interrupt.S:1.5 rtems/cpukit/score/cpu/arm/arm_exc_interrupt.S:1.6
--- rtems/cpukit/score/cpu/arm/arm_exc_interrupt.S:1.5 Thu Apr 8 05:13:46 2010
+++ rtems/cpukit/score/cpu/arm/arm_exc_interrupt.S Mon Jun 28 19:31:02 2010
</font><font color='#997700'>@@ -30,6 +30,7 @@
</font> #endif
#include <rtems/asm.h>
<font color='#000088'>+#include <rtems/score/percpu.h>
</font>
#define EXCHANGE_LR r4
#define EXCHANGE_SPSR r5
<font color='#997700'>@@ -42,9 +43,6 @@
</font> #define CONTEXT_LIST {r0, r1, r2, r3, EXCHANGE_LR, EXCHANGE_SPSR, r12}
#define CONTEXT_SIZE 28
<font color='#880000'>-.extern _ISR_Nest_level
-.extern _ISR_Signals_to_thread_executing
-.extern _ISR_Thread_dispatch
</font> .extern _Thread_Dispatch_disable_level
.extern bsp_interrupt_dispatch
<font color='#997700'>@@ -81,7 +79,7 @@
</font> ldmia r1, EXCHANGE_LIST
/* Get interrupt nest level */
<font color='#880000'>- ldr r0, =_ISR_Nest_level
</font><font color='#000088'>+ ldr r0, =ISR_NEST_LEVEL
</font> ldr r2, [r0]
/* Switch stack if necessary and save original stack pointer */
<font color='#997700'>@@ -105,7 +103,7 @@
</font> bl bsp_interrupt_dispatch
/* Decrement interrupt nest and thread dispatch disable level */
<font color='#880000'>- ldr r0, =_ISR_Nest_level
</font><font color='#000088'>+ ldr r0, =ISR_NEST_LEVEL
</font> ldr r1, =_Thread_Dispatch_disable_level
ldr r2, [r0]
ldr r3, [r1]
<font color='#997700'>@@ -124,13 +122,7 @@
</font> bne thread_dispatch_done
/* Check context switch necessary */
<font color='#880000'>- ldr r0, =_Context_Switch_necessary
- ldrb r1, [r0]
- ldr r0, =_ISR_Signals_to_thread_executing
- cmp r1, #0
- bne do_thread_dispatch
-
- /* Check ISR signals to thread executing */
</font><font color='#000088'>+ ldr r0, =DISPATCH_NEEDED
</font> ldrb r1, [r0]
cmp r1, #0
beq thread_dispatch_done
<font color='#997700'>@@ -142,9 +134,6 @@
</font>
do_thread_dispatch:
<font color='#880000'>- /* Clear ISR signals to thread executing */
- strb r3, [r0]
-
</font> /* Thread dispatch */
bl _Thread_Dispatch
</pre>
<p> </p>
<a name='cs2'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>joel</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* cpu_asm.S, rtems/asm.h, rtems/score/cpu.h: Add a per cpu data
structure which contains the information required by RTEMS for each
CPU core. This encapsulates information such as thread executing,
heir, idle and dispatch needed.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/h8300/ChangeLog.diff?r1=text&tr1=1.94&r2=text&tr2=1.95&diff_format=h">M</a></td><td width='1%'>1.95</td><td width='100%'>cpukit/score/cpu/h8300/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/h8300/cpu_asm.S.diff?r1=text&tr1=1.11&r2=text&tr2=1.12&diff_format=h">M</a></td><td width='1%'>1.12</td><td width='100%'>cpukit/score/cpu/h8300/cpu_asm.S</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/h8300/rtems/asm.h.diff?r1=text&tr1=1.8&r2=text&tr2=1.9&diff_format=h">M</a></td><td width='1%'>1.9</td><td width='100%'>cpukit/score/cpu/h8300/rtems/asm.h</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/h8300/rtems/score/cpu.h.diff?r1=text&tr1=1.39&r2=text&tr2=1.40&diff_format=h">M</a></td><td width='1%'>1.40</td><td width='100%'>cpukit/score/cpu/h8300/rtems/score/cpu.h</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/cpukit/score/cpu/h8300/ChangeLog:1.94 rtems/cpukit/score/cpu/h8300/ChangeLog:1.95
--- rtems/cpukit/score/cpu/h8300/ChangeLog:1.94 Sun Apr 25 10:06:32 2010
+++ rtems/cpukit/score/cpu/h8300/ChangeLog Mon Jun 28 19:31:09 2010
</font><font color='#997700'>@@ -1,3 +1,11 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * cpu_asm.S, rtems/asm.h, rtems/score/cpu.h: Add a per cpu data
+ structure which contains the information required by RTEMS for each
+ CPU core. This encapsulates information such as thread executing,
+ heir, idle and dispatch needed.
+
</font> 2010-04-25 Joel Sherrill <joel.sherrilL@OARcorp.com>
* rtems/score/cpu.h: Remove warning in _CPU_Context_Initialize.
<font color='#006600'>diff -u rtems/cpukit/score/cpu/h8300/cpu_asm.S:1.11 rtems/cpukit/score/cpu/h8300/cpu_asm.S:1.12
--- rtems/cpukit/score/cpu/h8300/cpu_asm.S:1.11 Sat Mar 27 10:01:35 2010
+++ rtems/cpukit/score/cpu/h8300/cpu_asm.S Mon Jun 28 19:31:09 2010
</font><font color='#997700'>@@ -18,6 +18,8 @@
</font> #include "config.h"
#endif
<font color='#000088'>+#include <rtems/asm.h>
+#include <rtems/score/percpu.h>
</font>
;.equ RUNCONTEXT_ARG, er0
;.equ HEIRCONTEXT_ARG, er1
<font color='#997700'>@@ -51,9 +53,9 @@
</font>
.align 2
<font color='#880000'>- .global __CPU_Context_switch
</font><font color='#000088'>+ .global SYM(_CPU_Context_switch)
</font>
<font color='#880000'>-__CPU_Context_switch:
</font><font color='#000088'>+SYM(_CPU_Context_switch):
</font> /* Save Context */
#if defined(__H8300H__) || defined(__H8300S__) || defined(__H8300SX__)
stc.w ccr,@(0:16,er0)
<font color='#997700'>@@ -80,9 +82,9 @@
</font>
.align 2
<font color='#880000'>- .global __CPU_Context_restore
</font><font color='#000088'>+ .global SYM(_CPU_Context_restore)
</font>
<font color='#880000'>-__CPU_Context_restore:
</font><font color='#000088'>+SYM(_CPU_Context_restore):
</font>
#if defined(__H8300H__) || defined(__H8300S__) || defined(__H8300SX__)
mov.l er0,er1
<font color='#997700'>@@ -100,13 +102,11 @@
</font>
*/
.align 2
<font color='#880000'>- .global __ISR_Handler
- .extern __ISR_Nest_level
- .extern __Vector_table
- .extern __Context_switch_necessary
</font><font color='#000088'>+ .global SYM(_ISR_Handler)
+ .extern SYM(_Vector_table)
</font>
<font color='#880000'>-__ISR_Handler:
</font><font color='#000088'>+SYM(_ISR_Handler):
</font> #if defined(__H8300H__) || defined(__H8300S__) || defined(__H8300SX__)
mov.l er1,@-er7
mov.l er2,@-er7
<font color='#997700'>@@ -118,24 +118,24 @@
</font> /* Set IRQ Stack */
orc #0xc0,ccr
mov.l er7,er6 ; save stack pointer
<font color='#880000'>- mov.l @__ISR_Nest_level,er1
</font><font color='#000088'>+ mov.l @ISR_NEST_LEVEL,er1
</font> bne nested
<font color='#880000'>- mov.l @__CPU_Interrupt_stack_high,er7
</font><font color='#000088'>+ mov.l @INTERRUPT_STACK_HIGH,er7
</font>
nested:
mov.l er6,@-er7 ; save sp so pop regardless of nest level
;; Inc system counters
<font color='#880000'>- mov.l @__ISR_Nest_level,er1
</font><font color='#000088'>+ mov.l @ISR_NEST_LEVEL,er1
</font> inc.l #1,er1
<font color='#880000'>- mov.l er1,@__ISR_Nest_level
- mov.l @__Thread_Dispatch_disable_level,er1
</font><font color='#000088'>+ mov.l er1,@ISR_NEST_LEVEL
+ mov.l @SYM(_Thread_Dispatch_disable_level),er1
</font> inc.l #1,er1
<font color='#880000'>- mov.l er1,@__Thread_Dispatch_disable_level
</font><font color='#000088'>+ mov.l er1,@SYM(_Thread_Dispatch_disable_level)
</font>
/* Vector to ISR */
<font color='#880000'>- mov.l @__ISR_Vector_table,er1
</font><font color='#000088'>+ mov.l @SYM(_ISR_Vector_table),er1
</font> mov er0,er2 ; copy vector
shll.l er2
shll.l er2 ; vector = vector * 4 (sizeof(int))
<font color='#997700'>@@ -144,34 +144,28 @@
</font> jsr @er1 ; er0 = arg1 =vector
orc #0xc0,ccr
<font color='#880000'>- mov.l @__ISR_Nest_level,er1
</font><font color='#000088'>+ mov.l @ISR_NEST_LEVEL,er1
</font> dec.l #1,er1
<font color='#880000'>- mov.l er1,@__ISR_Nest_level
- mov.l @__Thread_Dispatch_disable_level,er1
</font><font color='#000088'>+ mov.l er1,@ISR_NEST_LEVEL
+ mov.l @SYM(_Thread_Dispatch_disable_level),er1
</font> dec.l #1,er1
<font color='#880000'>- mov.l er1,@__Thread_Dispatch_disable_level
- bne exit
</font><font color='#000088'>+ mov.l er1,@SYM(_Thread_Dispatch_disable_level)
+ bne exit
</font>
<font color='#880000'>- mov.b @__Context_Switch_necessary,er1
- bne bframe ; If yes then dispatch next task
-<span style="background-color: #FF0000"> </span>
- mov.b @__ISR_Signals_to_thread_executing,er1
- beq exit ; If no signals waiting
</font><font color='#000088'>+ mov.b @DISPATCH_NEEDED,er1
+ beq exit ; If no then exit
</font>
/* Context switch here through ISR_Dispatch */
<font color='#880000'>-<span style="background-color: #FF0000"> </span>
</font> bframe:
<font color='#880000'>- orc #0xc0,ccr
</font><font color='#000088'>+ orc #0xc0,ccr
</font> /* Pop Stack */
<font color='#880000'>- mov @er7+,er6
- mov er6,er7
- mov.l #0,er2
- mov.l er2,@__ISR_Signals_to_thread_executing
</font><font color='#000088'>+ mov @er7+,er6
+ mov er6,er7
</font>
/* Set up IRQ stack frame and dispatch to _ISR_Dispatch */
mov.l #0xc0000000,er2 /* Disable IRQ */
<font color='#880000'>- or.l #_ISR_Dispatch,er2
</font><font color='#000088'>+ or.l #SYM(_ISR_Dispatch),er2
</font> mov.l er2,@-er7
rte
<font color='#997700'>@@ -200,12 +194,12 @@
</font> */
.align 2
<font color='#880000'>- .global _ISR_Dispatch
</font><font color='#000088'>+ .global SYM(_ISR_Dispatch)
</font>
<font color='#880000'>-_ISR_Dispatch:
</font><font color='#000088'>+SYM(_ISR_Dispatch):
</font>
#if defined(__H8300H__) || defined(__H8300S__) || defined(__H8300SX__)
<font color='#880000'>- jsr @__Thread_Dispatch
</font><font color='#000088'>+ jsr @SYM(_Thread_Dispatch)
</font> mov @er7+,er6
mov @er7+,er5
mov @er7+,er4
<font color='#997700'>@@ -218,14 +212,14 @@
</font>
.align 2
<font color='#880000'>- .global __CPU_Context_save_fp
</font><font color='#000088'>+ .global SYM(_CPU_Context_save_fp)
</font>
<font color='#880000'>-__CPU_Context_save_fp:
</font><font color='#000088'>+SYM(_CPU_Context_save_fp):
</font> rts
.align 2
<font color='#880000'>- .global __CPU_Context_restore_fp
</font><font color='#000088'>+ .global SYM(_CPU_Context_restore_fp)
</font>
<font color='#880000'>-__CPU_Context_restore_fp:
</font><font color='#000088'>+SYM(_CPU_Context_restore_fp):
</font> rts
<font color='#006600'>diff -u rtems/cpukit/score/cpu/h8300/rtems/asm.h:1.8 rtems/cpukit/score/cpu/h8300/rtems/asm.h:1.9
--- rtems/cpukit/score/cpu/h8300/rtems/asm.h:1.8 Thu Dec 3 23:22:48 2009
+++ rtems/cpukit/score/cpu/h8300/rtems/asm.h Mon Jun 28 19:31:09 2010
</font><font color='#997700'>@@ -37,7 +37,6 @@
</font> * Indicate we are in an assembly file and get the basic CPU definitions.
*/
<font color='#880000'>-#define ASM
</font> #include <rtems/score/h8300.h>
/*
<font color='#997700'>@@ -116,5 +115,3 @@
</font> #define EXTERN(sym) .globl SYM (sym)
#endif
<font color='#880000'>-
- asm( \".h8300h\" );
</font>
<font color='#006600'>diff -u rtems/cpukit/score/cpu/h8300/rtems/score/cpu.h:1.39 rtems/cpukit/score/cpu/h8300/rtems/score/cpu.h:1.40
--- rtems/cpukit/score/cpu/h8300/rtems/score/cpu.h:1.39 Sun Apr 25 10:06:32 2010
+++ rtems/cpukit/score/cpu/h8300/rtems/score/cpu.h Mon Jun 28 19:31:09 2010
</font><font color='#997700'>@@ -432,26 +432,6 @@
</font> SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
/*
<font color='#880000'>- * On some CPUs, RTEMS supports a software managed interrupt stack.
- * This stack is allocated by the Interrupt Manager and the switch
- * is performed in _ISR_Handler. These variables contain pointers
- * to the lowest and highest addresses in the chunk of memory allocated
- * for the interrupt stack. Since it is unknown whether the stack
- * grows up or down (in general), this give the CPU dependent
- * code the option of picking the version it wants to use.
- *
- * NOTE: These two variables are required if the macro
- * CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE.
- *
- * H8300 Specific Information:
- *
- * XXX
- */
-
-SCORE_EXTERN void *_CPU_Interrupt_stack_low;
-SCORE_EXTERN void *_CPU_Interrupt_stack_high;
-
-/*
</font> * Nothing prevents the porter from declaring more CPU specific variables.
*
* H8300 Specific Information:
</pre>
<p> </p>
<a name='cs3'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>joel</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* irq.c, rtems/score/cpu.h: Add a per cpu data structure which contains
the information required by RTEMS for each CPU core. This
encapsulates information such as thread executing, heir, idle and
dispatch needed.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/lm32/ChangeLog.diff?r1=text&tr1=1.12&r2=text&tr2=1.13&diff_format=h">M</a></td><td width='1%'>1.13</td><td width='100%'>cpukit/score/cpu/lm32/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/lm32/irq.c.diff?r1=text&tr1=1.4&r2=text&tr2=1.5&diff_format=h">M</a></td><td width='1%'>1.5</td><td width='100%'>cpukit/score/cpu/lm32/irq.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/lm32/rtems/score/cpu.h.diff?r1=text&tr1=1.8&r2=text&tr2=1.9&diff_format=h">M</a></td><td width='1%'>1.9</td><td width='100%'>cpukit/score/cpu/lm32/rtems/score/cpu.h</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/nios2/ChangeLog.diff?r1=text&tr1=1.21&r2=text&tr2=1.22&diff_format=h">M</a></td><td width='1%'>1.22</td><td width='100%'>cpukit/score/cpu/nios2/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/nios2/irq.c.diff?r1=text&tr1=1.5&r2=text&tr2=1.6&diff_format=h">M</a></td><td width='1%'>1.6</td><td width='100%'>cpukit/score/cpu/nios2/irq.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/nios2/rtems/score/cpu.h.diff?r1=text&tr1=1.13&r2=text&tr2=1.14&diff_format=h">M</a></td><td width='1%'>1.14</td><td width='100%'>cpukit/score/cpu/nios2/rtems/score/cpu.h</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/cpukit/score/cpu/lm32/ChangeLog:1.12 rtems/cpukit/score/cpu/lm32/ChangeLog:1.13
--- rtems/cpukit/score/cpu/lm32/ChangeLog:1.12 Sat May 29 00:19:12 2010
+++ rtems/cpukit/score/cpu/lm32/ChangeLog Mon Jun 28 19:31:12 2010
</font><font color='#997700'>@@ -1,3 +1,11 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * irq.c, rtems/score/cpu.h: Add a per cpu data structure which contains
+ the information required by RTEMS for each CPU core. This
+ encapsulates information such as thread executing, heir, idle and
+ dispatch needed.
+
</font> 2010-05-29 Ralf Corsépius <ralf.corsepius@rtems.org>
* irq.c: Change _exception_stack_frame into void*.
<font color='#006600'>diff -u rtems/cpukit/score/cpu/lm32/irq.c:1.4 rtems/cpukit/score/cpu/lm32/irq.c:1.5
--- rtems/cpukit/score/cpu/lm32/irq.c:1.4 Sat May 29 00:19:13 2010
+++ rtems/cpukit/score/cpu/lm32/irq.c Mon Jun 28 19:31:12 2010
</font><font color='#997700'>@@ -19,8 +19,9 @@
</font>
#include <rtems/system.h>
#include <rtems/score/cpu.h>
<font color='#880000'>-#include <rtems/score/isr.h>
</font> #include <rtems/score/thread.h>
<font color='#000088'>+#include <rtems/score/isr.h>
+#include <rtems/score/percpu.h>
</font>
/*
* This routine provides the RTEMS interrupt management.
<font color='#997700'>@@ -77,13 +78,7 @@
</font> if ( _ISR_Nest_level )
return;
<font color='#880000'>- if ( _Thread_Dispatch_disable_level ) {
- _ISR_Signals_to_thread_executing = FALSE;
- return;
- }
-
- if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) {
- _ISR_Signals_to_thread_executing = FALSE;
</font><font color='#000088'>+ if ( _Context_Switch_necessary ) {
</font>
/* save off our stack frame so the context switcher can get to it */
_exception_stack_frame = ifr;
<font color='#006600'>diff -u rtems/cpukit/score/cpu/lm32/rtems/score/cpu.h:1.8 rtems/cpukit/score/cpu/lm32/rtems/score/cpu.h:1.9
--- rtems/cpukit/score/cpu/lm32/rtems/score/cpu.h:1.8 Sun Apr 25 09:58:27 2010
+++ rtems/cpukit/score/cpu/lm32/rtems/score/cpu.h Mon Jun 28 19:31:12 2010
</font><font color='#997700'>@@ -560,20 +560,6 @@
</font> * XXX document implementation including references if appropriate
*/
<font color='#880000'>-/**
- * @ingroup CPUInterrupt
- * This variable points to the lowest physical address of the interrupt
- * stack.
- */
-SCORE_EXTERN void *_CPU_Interrupt_stack_low;
-
-/**
- * @ingroup CPUInterrupt
- * This variable points to the lowest physical address of the interrupt
- * stack.
- */
-SCORE_EXTERN void *_CPU_Interrupt_stack_high;
-
</font> /*
* Nothing prevents the porter from declaring more CPU specific variables.
*
<font color='#006600'>diff -u rtems/cpukit/score/cpu/nios2/ChangeLog:1.21 rtems/cpukit/score/cpu/nios2/ChangeLog:1.22
--- rtems/cpukit/score/cpu/nios2/ChangeLog:1.21 Sat Mar 27 10:02:21 2010
+++ rtems/cpukit/score/cpu/nios2/ChangeLog Mon Jun 28 19:31:46 2010
</font><font color='#997700'>@@ -1,3 +1,11 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * irq.c, rtems/score/cpu.h: Add a per cpu data structure which contains
+ the information required by RTEMS for each CPU core. This
+ encapsulates information such as thread executing, heir, idle and
+ dispatch needed.
+
</font> 2010-03-27 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu.c, cpu_asm.S, irq.c: Add include of config.h
<font color='#006600'>diff -u rtems/cpukit/score/cpu/nios2/irq.c:1.5 rtems/cpukit/score/cpu/nios2/irq.c:1.6
--- rtems/cpukit/score/cpu/nios2/irq.c:1.5 Sat Mar 27 10:02:21 2010
+++ rtems/cpukit/score/cpu/nios2/irq.c Mon Jun 28 19:31:47 2010
</font><font color='#997700'>@@ -64,28 +64,21 @@
</font>
_ISR_Nest_level--;
<font color='#880000'>- if( _ISR_Nest_level == 0)
- {
</font><font color='#000088'>+ if( _ISR_Nest_level == 0) {
</font> #if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
stack_ptr = _old_stack_ptr;
#endif
if( _Thread_Dispatch_disable_level == 0 )
{
<font color='#880000'>- if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing )
- {
- _ISR_Signals_to_thread_executing = FALSE;
</font><font color='#000088'>+ if ( _Context_Switch_necessary ) {
</font> _CPU_ISR_Enable( level );
_Thread_Dispatch();
/* may have switched to another task and not return here immed. */
_CPU_ISR_Disable( level ); /* Keep _pairs_ of Enable/Disable */
}
}
<font color='#880000'>- else
- {
- _ISR_Signals_to_thread_executing = FALSE;
- };
- };
</font><font color='#000088'>+ }
</font>
_CPU_ISR_Enable( level );
}
<font color='#006600'>diff -u rtems/cpukit/score/cpu/nios2/rtems/score/cpu.h:1.13 rtems/cpukit/score/cpu/nios2/rtems/score/cpu.h:1.14
--- rtems/cpukit/score/cpu/nios2/rtems/score/cpu.h:1.13 Wed Dec 2 03:48:25 2009
+++ rtems/cpukit/score/cpu/nios2/rtems/score/cpu.h Mon Jun 28 19:31:47 2010
</font><font color='#997700'>@@ -590,20 +590,6 @@
</font> * XXX document implementation including references if appropriate
*/
<font color='#880000'>-/**
- * @ingroup CPUInterrupt
- * This variable points to the lowest physical address of the interrupt
- * stack.
- */
-SCORE_EXTERN void *_CPU_Interrupt_stack_low;
-
-/**
- * @ingroup CPUInterrupt
- * This variable points to the lowest physical address of the interrupt
- * stack.
- */
-SCORE_EXTERN void *_CPU_Interrupt_stack_high;
-
</font> /*
* Nothing prevents the porter from declaring more CPU specific variables.
*
</pre>
<p> </p>
<a name='cs4'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>joel</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* cpu_asm.c, rtems/score/cpu.h: Add a per cpu data structure which
contains the information required by RTEMS for each CPU core. This
encapsulates information such as thread executing, heir, idle and
dispatch needed.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/m32c/ChangeLog.diff?r1=text&tr1=1.11&r2=text&tr2=1.12&diff_format=h">M</a></td><td width='1%'>1.12</td><td width='100%'>cpukit/score/cpu/m32c/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/m32c/cpu_asm.c.diff?r1=text&tr1=1.5&r2=text&tr2=1.6&diff_format=h">M</a></td><td width='1%'>1.6</td><td width='100%'>cpukit/score/cpu/m32c/cpu_asm.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/m32c/rtems/score/cpu.h.diff?r1=text&tr1=1.7&r2=text&tr2=1.8&diff_format=h">M</a></td><td width='1%'>1.8</td><td width='100%'>cpukit/score/cpu/m32c/rtems/score/cpu.h</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/m32r/ChangeLog.diff?r1=text&tr1=1.4&r2=text&tr2=1.5&diff_format=h">M</a></td><td width='1%'>1.5</td><td width='100%'>cpukit/score/cpu/m32r/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/m32r/cpu_asm.c.diff?r1=text&tr1=1.3&r2=text&tr2=1.4&diff_format=h">M</a></td><td width='1%'>1.4</td><td width='100%'>cpukit/score/cpu/m32r/cpu_asm.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/m32r/rtems/score/cpu.h.diff?r1=text&tr1=1.4&r2=text&tr2=1.5&diff_format=h">M</a></td><td width='1%'>1.5</td><td width='100%'>cpukit/score/cpu/m32r/rtems/score/cpu.h</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/no_cpu/ChangeLog.diff?r1=text&tr1=1.81&r2=text&tr2=1.82&diff_format=h">M</a></td><td width='1%'>1.82</td><td width='100%'>cpukit/score/cpu/no_cpu/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/no_cpu/cpu_asm.c.diff?r1=text&tr1=1.18&r2=text&tr2=1.19&diff_format=h">M</a></td><td width='1%'>1.19</td><td width='100%'>cpukit/score/cpu/no_cpu/cpu_asm.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/no_cpu/rtems/score/cpu.h.diff?r1=text&tr1=1.31&r2=text&tr2=1.32&diff_format=h">M</a></td><td width='1%'>1.32</td><td width='100%'>cpukit/score/cpu/no_cpu/rtems/score/cpu.h</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/cpukit/score/cpu/m32c/ChangeLog:1.11 rtems/cpukit/score/cpu/m32c/ChangeLog:1.12
--- rtems/cpukit/score/cpu/m32c/ChangeLog:1.11 Mon May 10 15:08:50 2010
+++ rtems/cpukit/score/cpu/m32c/ChangeLog Mon Jun 28 19:31:14 2010
</font><font color='#997700'>@@ -1,3 +1,11 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * cpu_asm.c, rtems/score/cpu.h: Add a per cpu data structure which
+ contains the information required by RTEMS for each CPU core. This
+ encapsulates information such as thread executing, heir, idle and
+ dispatch needed.
+
</font> 2010-05-10 Joel Sherrill <joel.sherrilL@OARcorp.com>
* context_init.c, context_switch.S, cpu.c: Now builds multilib. R8C
<font color='#006600'>diff -u rtems/cpukit/score/cpu/m32c/cpu_asm.c:1.5 rtems/cpukit/score/cpu/m32c/cpu_asm.c:1.6
--- rtems/cpukit/score/cpu/m32c/cpu_asm.c:1.5 Sat Mar 27 10:01:57 2010
+++ rtems/cpukit/score/cpu/m32c/cpu_asm.c Mon Jun 28 19:31:14 2010
</font><font color='#997700'>@@ -87,11 +87,9 @@
</font> * goto the label "exit interrupt (simple case)"
*
* if ( _Thread_Dispatch_disable_level )
<font color='#880000'>- * _ISR_Signals_to_thread_executing = FALSE;
</font> * goto the label "exit interrupt (simple case)"
*
<font color='#880000'>- * if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) {
- * _ISR_Signals_to_thread_executing = FALSE;
</font><font color='#000088'>+ * if ( _Context_Switch_necessary ) {
</font> * call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
* prepare to get out of interrupt
* return from interrupt (maybe to _ISR_Dispatch)
<font color='#006600'>diff -u rtems/cpukit/score/cpu/m32c/rtems/score/cpu.h:1.7 rtems/cpukit/score/cpu/m32c/rtems/score/cpu.h:1.8
--- rtems/cpukit/score/cpu/m32c/rtems/score/cpu.h:1.7 Sun Nov 29 07:51:53 2009
+++ rtems/cpukit/score/cpu/m32c/rtems/score/cpu.h Mon Jun 28 19:31:14 2010
</font><font color='#997700'>@@ -522,20 +522,6 @@
</font> * XXX document implementation including references if appropriate
*/
<font color='#880000'>-/**
- * @ingroup CPUInterrupt
- * This variable points to the lowest physical address of the interrupt
- * stack.
- */
-SCORE_EXTERN void *_CPU_Interrupt_stack_low;
-
-/**
- * @ingroup CPUInterrupt
- * This variable points to the lowest physical address of the interrupt
- * stack.
- */
-SCORE_EXTERN void *_CPU_Interrupt_stack_high;
-
</font> /*
* Nothing prevents the porter from declaring more CPU specific variables.
*
<font color='#006600'>diff -u rtems/cpukit/score/cpu/m32r/ChangeLog:1.4 rtems/cpukit/score/cpu/m32r/ChangeLog:1.5
--- rtems/cpukit/score/cpu/m32r/ChangeLog:1.4 Sat Mar 27 10:02:02 2010
+++ rtems/cpukit/score/cpu/m32r/ChangeLog Mon Jun 28 19:31:16 2010
</font><font color='#997700'>@@ -1,3 +1,11 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * cpu_asm.c, rtems/score/cpu.h: Add a per cpu data structure which
+ contains the information required by RTEMS for each CPU core. This
+ encapsulates information such as thread executing, heir, idle and
+ dispatch needed.
+
</font> 2010-03-27 Joel Sherrill <joel.sherrill@oarcorp.com>
* context_init.c, context_switch.S, cpu.c, cpu_asm.c: Add include of
<font color='#006600'>diff -u rtems/cpukit/score/cpu/m32r/cpu_asm.c:1.3 rtems/cpukit/score/cpu/m32r/cpu_asm.c:1.4
--- rtems/cpukit/score/cpu/m32r/cpu_asm.c:1.3 Sat Mar 27 10:02:02 2010
+++ rtems/cpukit/score/cpu/m32r/cpu_asm.c Mon Jun 28 19:31:16 2010
</font><font color='#997700'>@@ -77,11 +77,9 @@
</font> * goto the label "exit interrupt (simple case)"
*
* if ( _Thread_Dispatch_disable_level )
<font color='#880000'>- * _ISR_Signals_to_thread_executing = FALSE;
</font> * goto the label "exit interrupt (simple case)"
*
<font color='#880000'>- * if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) {
- * _ISR_Signals_to_thread_executing = FALSE;
</font><font color='#000088'>+ * if ( _Context_Switch_necessary ) {
</font> * call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
* prepare to get out of interrupt
* return from interrupt (maybe to _ISR_Dispatch)
<font color='#006600'>diff -u rtems/cpukit/score/cpu/m32r/rtems/score/cpu.h:1.4 rtems/cpukit/score/cpu/m32r/rtems/score/cpu.h:1.5
--- rtems/cpukit/score/cpu/m32r/rtems/score/cpu.h:1.4 Thu Dec 3 23:23:14 2009
+++ rtems/cpukit/score/cpu/m32r/rtems/score/cpu.h Mon Jun 28 19:31:16 2010
</font><font color='#997700'>@@ -555,20 +555,6 @@
</font> * XXX document implementation including references if appropriate
*/
<font color='#880000'>-/**
- * @ingroup CPUInterrupt
- * This variable points to the lowest physical address of the interrupt
- * stack.
- */
-SCORE_EXTERN void *_CPU_Interrupt_stack_low;
-
-/**
- * @ingroup CPUInterrupt
- * This variable points to the lowest physical address of the interrupt
- * stack.
- */
-SCORE_EXTERN void *_CPU_Interrupt_stack_high;
-
</font> /*
* Nothing prevents the porter from declaring more CPU specific variables.
*
<font color='#006600'>diff -u rtems/cpukit/score/cpu/no_cpu/ChangeLog:1.81 rtems/cpukit/score/cpu/no_cpu/ChangeLog:1.82
--- rtems/cpukit/score/cpu/no_cpu/ChangeLog:1.81 Sat Mar 27 10:02:26 2010
+++ rtems/cpukit/score/cpu/no_cpu/ChangeLog Mon Jun 28 19:33:12 2010
</font><font color='#997700'>@@ -1,3 +1,11 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * cpu_asm.c, rtems/score/cpu.h: Add a per cpu data structure which
+ contains the information required by RTEMS for each CPU core. This
+ encapsulates information such as thread executing, heir, idle and
+ dispatch needed.
+
</font> 2010-03-27 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu.c, cpu_asm.c: Add include of config.h
<font color='#006600'>diff -u rtems/cpukit/score/cpu/no_cpu/cpu_asm.c:1.18 rtems/cpukit/score/cpu/no_cpu/cpu_asm.c:1.19
--- rtems/cpukit/score/cpu/no_cpu/cpu_asm.c:1.18 Sat Mar 27 10:02:26 2010
+++ rtems/cpukit/score/cpu/no_cpu/cpu_asm.c Mon Jun 28 19:33:12 2010
</font><font color='#997700'>@@ -166,11 +166,9 @@
</font> * goto the label "exit interrupt (simple case)"
*
* if ( _Thread_Dispatch_disable_level )
<font color='#880000'>- * _ISR_Signals_to_thread_executing = FALSE;
</font> * goto the label "exit interrupt (simple case)"
*
<font color='#880000'>- * if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) {
- * _ISR_Signals_to_thread_executing = FALSE;
</font><font color='#000088'>+ * if ( _Context_Switch_necessary ) {
</font> * call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
* prepare to get out of interrupt
* return from interrupt (maybe to _ISR_Dispatch)
<font color='#006600'>diff -u rtems/cpukit/score/cpu/no_cpu/rtems/score/cpu.h:1.31 rtems/cpukit/score/cpu/no_cpu/rtems/score/cpu.h:1.32
--- rtems/cpukit/score/cpu/no_cpu/rtems/score/cpu.h:1.31 Wed Dec 2 03:48:25 2009
+++ rtems/cpukit/score/cpu/no_cpu/rtems/score/cpu.h Mon Jun 28 19:33:12 2010
</font><font color='#997700'>@@ -548,20 +548,6 @@
</font> * XXX document implementation including references if appropriate
*/
<font color='#880000'>-/**
- * @ingroup CPUInterrupt
- * This variable points to the lowest physical address of the interrupt
- * stack.
- */
-SCORE_EXTERN void *_CPU_Interrupt_stack_low;
-
-/**
- * @ingroup CPUInterrupt
- * This variable points to the lowest physical address of the interrupt
- * stack.
- */
-SCORE_EXTERN void *_CPU_Interrupt_stack_high;
-
</font> /*
* Nothing prevents the porter from declaring more CPU specific variables.
*
</pre>
<p> </p>
<a name='cs5'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>joel</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* rtems/new-exceptions/cpu.h: Add a per cpu data structure which
contains the information required by RTEMS for each CPU core. This
encapsulates information such as thread executing, heir, idle and
dispatch needed.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/powerpc/ChangeLog.diff?r1=text&tr1=1.152&r2=text&tr2=1.153&diff_format=h">M</a></td><td width='1%'>1.153</td><td width='100%'>cpukit/score/cpu/powerpc/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h.diff?r1=text&tr1=1.38&r2=text&tr2=1.39&diff_format=h">M</a></td><td width='1%'>1.39</td><td width='100%'>cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/cpukit/score/cpu/powerpc/ChangeLog:1.152 rtems/cpukit/score/cpu/powerpc/ChangeLog:1.153
--- rtems/cpukit/score/cpu/powerpc/ChangeLog:1.152 Sat Mar 27 10:02:31 2010
+++ rtems/cpukit/score/cpu/powerpc/ChangeLog Mon Jun 28 19:33:15 2010
</font><font color='#997700'>@@ -1,3 +1,11 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * rtems/new-exceptions/cpu.h: Add a per cpu data structure which
+ contains the information required by RTEMS for each CPU core. This
+ encapsulates information such as thread executing, heir, idle and
+ dispatch needed.
+
</font> 2010-03-27 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu.c: Add include of config.h
<font color='#006600'>diff -u rtems/cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h:1.38 rtems/cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h:1.39
--- rtems/cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h:1.38 Thu Dec 3 23:24:33 2009
+++ rtems/cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h Mon Jun 28 19:33:15 2010
</font><font color='#997700'>@@ -163,22 +163,6 @@
</font>
/* EXTERN Context_Control_fp _CPU_Null_fp_context; */
<font color='#880000'>-/*
- * On some CPUs, RTEMS supports a software managed interrupt stack.
- * This stack is allocated by the Interrupt Manager and the switch
- * is performed in _ISR_Handler. These variables contain pointers
- * to the lowest and highest addresses in the chunk of memory allocated
- * for the interrupt stack. Since it is unknown whether the stack
- * grows up or down (in general), this give the CPU dependent
- * code the option of picking the version it wants to use.
- *
- * NOTE: These two variables are required if the macro
- * CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE.
- */
-
-SCORE_EXTERN void *_CPU_Interrupt_stack_low;
-SCORE_EXTERN void *_CPU_Interrupt_stack_high;
-
</font> #endif /* ndef ASM */
/*
</pre>
<p> </p>
<a name='cs6'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>joel</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* rtems/score/cpu.h: Add a per cpu data structure which contains the
information required by RTEMS for each CPU core. This encapsulates
information such as thread executing, heir, idle and dispatch needed.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/sh/ChangeLog.diff?r1=text&tr1=1.94&r2=text&tr2=1.95&diff_format=h">M</a></td><td width='1%'>1.95</td><td width='100%'>cpukit/score/cpu/sh/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/sh/rtems/score/cpu.h.diff?r1=text&tr1=1.31&r2=text&tr2=1.32&diff_format=h">M</a></td><td width='1%'>1.32</td><td width='100%'>cpukit/score/cpu/sh/rtems/score/cpu.h</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/cpukit/score/cpu/sh/ChangeLog:1.94 rtems/cpukit/score/cpu/sh/ChangeLog:1.95
--- rtems/cpukit/score/cpu/sh/ChangeLog:1.94 Sun May 23 00:47:27 2010
+++ rtems/cpukit/score/cpu/sh/ChangeLog Mon Jun 28 19:33:58 2010
</font><font color='#997700'>@@ -1,3 +1,10 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * rtems/score/cpu.h: Add a per cpu data structure which contains the
+ information required by RTEMS for each CPU core. This encapsulates
+ information such as thread executing, heir, idle and dispatch needed.
+
</font> 2010-05-23 Ralf Corsépius <ralf.corsepius@rtems.org>
* cpu.c: Warning removal.
<font color='#006600'>diff -u rtems/cpukit/score/cpu/sh/rtems/score/cpu.h:1.31 rtems/cpukit/score/cpu/sh/rtems/score/cpu.h:1.32
--- rtems/cpukit/score/cpu/sh/rtems/score/cpu.h:1.31 Thu Dec 3 23:25:30 2009
+++ rtems/cpukit/score/cpu/sh/rtems/score/cpu.h Mon Jun 28 19:33:58 2010
</font><font color='#997700'>@@ -413,22 +413,6 @@
</font> #endif
/*
<font color='#880000'>- * On some CPUs, RTEMS supports a software managed interrupt stack.
- * This stack is allocated by the Interrupt Manager and the switch
- * is performed in _ISR_Handler. These variables contain pointers
- * to the lowest and highest addresses in the chunk of memory allocated
- * for the interrupt stack. Since it is unknown whether the stack
- * grows up or down (in general), this give the CPU dependent
- * code the option of picking the version it wants to use.
- *
- * NOTE: These two variables are required if the macro
- * CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE.
- */
-
-SCORE_EXTERN void *_CPU_Interrupt_stack_low;
-SCORE_EXTERN void *_CPU_Interrupt_stack_high;
-
-/*
</font> * Nothing prevents the porter from declaring more CPU specific variables.
*/
</pre>
<p> </p>
<a name='cs7'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>joel</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* cpu_asm.S, rtems/score/cpu.h: Add a per cpu data structure which
contains the information required by RTEMS for each CPU core. This
encapsulates information such as thread executing, heir, idle and
dispatch needed.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/avr/ChangeLog.diff?r1=text&tr1=1.47&r2=text&tr2=1.48&diff_format=h">M</a></td><td width='1%'>1.48</td><td width='100%'>cpukit/score/cpu/avr/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/avr/cpu_asm.S.diff?r1=text&tr1=1.9&r2=text&tr2=1.10&diff_format=h">M</a></td><td width='1%'>1.10</td><td width='100%'>cpukit/score/cpu/avr/cpu_asm.S</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/avr/rtems/score/cpu.h.diff?r1=text&tr1=1.25&r2=text&tr2=1.26&diff_format=h">M</a></td><td width='1%'>1.26</td><td width='100%'>cpukit/score/cpu/avr/rtems/score/cpu.h</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/bfin/ChangeLog.diff?r1=text&tr1=1.36&r2=text&tr2=1.37&diff_format=h">M</a></td><td width='1%'>1.37</td><td width='100%'>cpukit/score/cpu/bfin/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/bfin/cpu_asm.S.diff?r1=text&tr1=1.10&r2=text&tr2=1.11&diff_format=h">M</a></td><td width='1%'>1.11</td><td width='100%'>cpukit/score/cpu/bfin/cpu_asm.S</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/bfin/rtems/score/cpu.h.diff?r1=text&tr1=1.19&r2=text&tr2=1.20&diff_format=h">M</a></td><td width='1%'>1.20</td><td width='100%'>cpukit/score/cpu/bfin/rtems/score/cpu.h</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/m68k/ChangeLog.diff?r1=text&tr1=1.122&r2=text&tr2=1.123&diff_format=h">M</a></td><td width='1%'>1.123</td><td width='100%'>cpukit/score/cpu/m68k/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/m68k/cpu_asm.S.diff?r1=text&tr1=1.18&r2=text&tr2=1.19&diff_format=h">M</a></td><td width='1%'>1.19</td><td width='100%'>cpukit/score/cpu/m68k/cpu_asm.S</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/m68k/rtems/score/cpu.h.diff?r1=text&tr1=1.42&r2=text&tr2=1.43&diff_format=h">M</a></td><td width='1%'>1.43</td><td width='100%'>cpukit/score/cpu/m68k/rtems/score/cpu.h</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/mips/ChangeLog.diff?r1=text&tr1=1.138&r2=text&tr2=1.139&diff_format=h">M</a></td><td width='1%'>1.139</td><td width='100%'>cpukit/score/cpu/mips/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/mips/cpu_asm.S.diff?r1=text&tr1=1.41&r2=text&tr2=1.42&diff_format=h">M</a></td><td width='1%'>1.42</td><td width='100%'>cpukit/score/cpu/mips/cpu_asm.S</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/mips/rtems/score/cpu.h.diff?r1=text&tr1=1.56&r2=text&tr2=1.57&diff_format=h">M</a></td><td width='1%'>1.57</td><td width='100%'>cpukit/score/cpu/mips/rtems/score/cpu.h</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/sparc/ChangeLog.diff?r1=text&tr1=1.95&r2=text&tr2=1.96&diff_format=h">M</a></td><td width='1%'>1.96</td><td width='100%'>cpukit/score/cpu/sparc/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/sparc/cpu_asm.S.diff?r1=text&tr1=1.17&r2=text&tr2=1.18&diff_format=h">M</a></td><td width='1%'>1.18</td><td width='100%'>cpukit/score/cpu/sparc/cpu_asm.S</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/cpu/sparc/rtems/score/cpu.h.diff?r1=text&tr1=1.35&r2=text&tr2=1.36&diff_format=h">M</a></td><td width='1%'>1.36</td><td width='100%'>cpukit/score/cpu/sparc/rtems/score/cpu.h</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/cpukit/score/cpu/avr/ChangeLog:1.47 rtems/cpukit/score/cpu/avr/ChangeLog:1.48
--- rtems/cpukit/score/cpu/avr/ChangeLog:1.47 Mon May 10 11:31:15 2010
+++ rtems/cpukit/score/cpu/avr/ChangeLog Mon Jun 28 19:31:04 2010
</font><font color='#997700'>@@ -1,3 +1,11 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * cpu_asm.S, rtems/score/cpu.h: Add a per cpu data structure which
+ contains the information required by RTEMS for each CPU core. This
+ encapsulates information such as thread executing, heir, idle and
+ dispatch needed.
+
</font> 2010-05-10 Joel Sherrill <joel.sherrilL@OARcorp.com>
* Makefile.am, cpu_asm.S, avr/boot.h, avr/common.h, avr/crc16.h,
<font color='#006600'>diff -u rtems/cpukit/score/cpu/avr/cpu_asm.S:1.9 rtems/cpukit/score/cpu/avr/cpu_asm.S:1.10
--- rtems/cpukit/score/cpu/avr/cpu_asm.S:1.9 Mon May 10 11:31:19 2010
+++ rtems/cpukit/score/cpu/avr/cpu_asm.S Mon Jun 28 19:31:05 2010
</font><font color='#997700'>@@ -28,6 +28,7 @@
</font>
#include <rtems/asm.h>
#include <avr/sfr_defs.h>
<font color='#000088'>+#include <rtems/score/percpu.h>
</font>
#define jmpb_hi<span style="background-color: #FF0000"> </span> r25
<font color='#997700'>@@ -438,11 +439,9 @@
</font> * goto the label "exit interrupt (simple case)"
*
* if ( _Thread_Dispatch_disable_level )
<font color='#880000'>- * _ISR_Signals_to_thread_executing = FALSE;
</font> * goto the label "exit interrupt (simple case)"
*
<font color='#880000'>- * if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) {
- * _ISR_Signals_to_thread_executing = FALSE;
</font><font color='#000088'>+ * if ( _Context_Switch_necessary ) {
</font> * call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
* prepare to get out of interrupt
* return from interrupt (maybe to _ISR_Dispatch)
<font color='#006600'>diff -u rtems/cpukit/score/cpu/avr/rtems/score/cpu.h:1.25 rtems/cpukit/score/cpu/avr/rtems/score/cpu.h:1.26
--- rtems/cpukit/score/cpu/avr/rtems/score/cpu.h:1.25 Mon May 10 11:31:24 2010
+++ rtems/cpukit/score/cpu/avr/rtems/score/cpu.h Mon Jun 28 19:31:05 2010
</font><font color='#997700'>@@ -456,26 +456,6 @@
</font> SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
/*
<font color='#880000'>- * On some CPUs, RTEMS supports a software managed interrupt stack.
- * This stack is allocated by the Interrupt Manager and the switch
- * is performed in _ISR_Handler. These variables contain pointers
- * to the lowest and highest addresses in the chunk of memory allocated
- * for the interrupt stack. Since it is unknown whether the stack
- * grows up or down (in general), this give the CPU dependent
- * code the option of picking the version it wants to use.
- *
- * NOTE: These two variables are required if the macro
- * CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE.
- *
- * AVR Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-
-SCORE_EXTERN void *_CPU_Interrupt_stack_low;
-SCORE_EXTERN void *_CPU_Interrupt_stack_high;
-
-/*
</font> * Nothing prevents the porter from declaring more CPU specific variables.
*
* AVR Specific Information:
<font color='#006600'>diff -u rtems/cpukit/score/cpu/bfin/ChangeLog:1.36 rtems/cpukit/score/cpu/bfin/ChangeLog:1.37
--- rtems/cpukit/score/cpu/bfin/ChangeLog:1.36 Wed Jun 16 12:19:31 2010
+++ rtems/cpukit/score/cpu/bfin/ChangeLog Mon Jun 28 19:31:07 2010
</font><font color='#997700'>@@ -1,3 +1,11 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * cpu_asm.S, rtems/score/cpu.h: Add a per cpu data structure which
+ contains the information required by RTEMS for each CPU core. This
+ encapsulates information such as thread executing, heir, idle and
+ dispatch needed.
+
</font> 2010-06-16 Joel Sherrill <joel.sherrilL@OARcorp.com>
* cpu_asm.S: Use SYM macro to be consistent with other ports.
<font color='#006600'>diff -u rtems/cpukit/score/cpu/bfin/cpu_asm.S:1.10 rtems/cpukit/score/cpu/bfin/cpu_asm.S:1.11
--- rtems/cpukit/score/cpu/bfin/cpu_asm.S:1.10 Wed Jun 16 12:19:31 2010
+++ rtems/cpukit/score/cpu/bfin/cpu_asm.S Mon Jun 28 19:31:07 2010
</font><font color='#997700'>@@ -28,6 +28,7 @@
</font> #include <rtems/score/cpu_asm.h>
#include <rtems/score/bfin.h>
#include <rtems/bfin/bfin.h>
<font color='#000088'>+#include <rtems/score/percpu.h>
</font>
#define LO(con32) ((con32) & 0xFFFF)
#define HI(con32) (((con32) >> 16) & 0xFFFF)
<font color='#997700'>@@ -313,12 +314,8 @@
</font>
.globl SYM(_ISR_Handler)
<font color='#880000'>- .extern SYM(_CPU_Interrupt_stack_high)
- .extern SYM(_ISR_Nest_level)
- .extern SYM(_Thread_Dispatch_disable_level)
- .extern SYM(_Context_Switch_necessary)
- .extern SYM(_ISR_Signals_to_thread_executing)
</font> SYM(_ISR_Handler):
<font color='#000088'>+ .extern SYM(_Thread_Dispatch_disable_level)
</font> /* all interrupts are disabled at this point */
/* the following few items are pushed onto the task stack for at
most one interrupt; nested interrupts will be using the interrupt
<font color='#997700'>@@ -328,8 +325,8 @@
</font> [--sp] = p0;
[--sp] = r1;
[--sp] = r0;
<font color='#880000'>- p0.h = SYM(_ISR_Nest_level);
- p0.l = SYM(_ISR_Nest_level);
</font><font color='#000088'>+ p0.h = ISR_NEST_LEVEL;
+ p0.l = ISR_NEST_LEVEL;
</font> r0 = [p0];
r0 += 1;
[p0] = r0;
<font color='#997700'>@@ -337,8 +334,8 @@
</font> if !cc jump noStackSwitch;
/* setup interrupt stack */
r0 = sp;
<font color='#880000'>- p0.h = SYM(_CPU_Interrupt_stack_high);
- p0.l = SYM(_CPU_Interrupt_stack_high);
</font><font color='#000088'>+ p0.h = INTERRUPT_STACK_HIGH;
+ p0.l = INTERRUPT_STACK_HIGH;
</font> sp = [p0];
[--sp] = r0;
noStackSwitch:
<font color='#997700'>@@ -452,8 +449,8 @@
</font> /* this disables interrupts again */
reti = [sp++];
<font color='#880000'>- p0.h = SYM(_ISR_Nest_level);
- p0.l = SYM(_ISR_Nest_level);
</font><font color='#000088'>+ p0.h = ISR_NEST_LEVEL;
+ p0.l = ISR_NEST_LEVEL;
</font> r0 = [p0];
r0 += -1;
[p0] = r0;
<font color='#997700'>@@ -473,13 +470,8 @@
</font> if !cc jump noDispatch
/* do thread dispatch if necessary */
<font color='#880000'>- p0.h = SYM(_Context_Switch_necessary);
- p0.l = SYM(_Context_Switch_necessary);
- r0 = B[p0] (Z);
- cc = r0 == 0;
- p0.h = SYM(_ISR_Signals_to_thread_executing);
- p0.l = SYM(_ISR_Signals_to_thread_executing);
- if !cc jump doDispatch
</font><font color='#000088'>+ p0.h = DISPATCH_NEEDED;
+ p0.l = DISPATCH_NEEDED;
</font> r0 = B[p0] (Z);
cc = r0 == 0;
if cc jump noDispatch
<font color='#006600'>diff -u rtems/cpukit/score/cpu/bfin/rtems/score/cpu.h:1.19 rtems/cpukit/score/cpu/bfin/rtems/score/cpu.h:1.20
--- rtems/cpukit/score/cpu/bfin/rtems/score/cpu.h:1.19 Sat Apr 17 14:24:16 2010
+++ rtems/cpukit/score/cpu/bfin/rtems/score/cpu.h Mon Jun 28 19:31:07 2010
</font><font color='#997700'>@@ -544,20 +544,6 @@
</font> * XXX document implementation including references if appropriate
*/
<font color='#880000'>-/**
- * @ingroup CPUInterrupt
- * This variable points to the lowest physical address of the interrupt
- * stack.
- */
-SCORE_EXTERN void *_CPU_Interrupt_stack_low;
-
-/**
- * @ingroup CPUInterrupt
- * This variable points to the lowest physical address of the interrupt
- * stack.
- */
-SCORE_EXTERN void *_CPU_Interrupt_stack_high;
-
</font> /*
* Nothing prevents the porter from declaring more CPU specific variables.
*
<font color='#006600'>diff -u rtems/cpukit/score/cpu/m68k/ChangeLog:1.122 rtems/cpukit/score/cpu/m68k/ChangeLog:1.123
--- rtems/cpukit/score/cpu/m68k/ChangeLog:1.122 Thu Apr 8 11:37:34 2010
+++ rtems/cpukit/score/cpu/m68k/ChangeLog Mon Jun 28 19:31:18 2010
</font><font color='#997700'>@@ -1,3 +1,11 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * cpu_asm.S, rtems/score/cpu.h: Add a per cpu data structure which
+ contains the information required by RTEMS for each CPU core. This
+ encapsulates information such as thread executing, heir, idle and
+ dispatch needed.
+
</font> 2010-04-08 Till Straumann <strauman@slac.stanford.edu>
* cpu_asm.S, rtems/score/cpu.h: On uC5282, the thread restart needed to
<font color='#006600'>diff -u rtems/cpukit/score/cpu/m68k/cpu_asm.S:1.18 rtems/cpukit/score/cpu/m68k/cpu_asm.S:1.19
--- rtems/cpukit/score/cpu/m68k/cpu_asm.S:1.18 Thu Apr 8 11:37:34 2010
+++ rtems/cpukit/score/cpu/m68k/cpu_asm.S Mon Jun 28 19:31:18 2010
</font><font color='#997700'>@@ -19,6 +19,7 @@
</font> #endif
#include <rtems/asm.h>
<font color='#000088'>+#include <rtems/score/percpu.h>
</font>
/* void _CPU_Context_switch( run_context, heir_context )
*
<font color='#997700'>@@ -263,8 +264,8 @@
</font>
#if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 )
| Make a0 point just above interrupt stack
<font color='#880000'>- movel _CPU_Interrupt_stack_high,a0
- cmpl _CPU_Interrupt_stack_low,a7 | stack below interrupt stack?
</font><font color='#000088'>+ movel INTERRUPT_STACK_HIGH,a0
+ cmpl INTERRUPT_STACK_LOW,a7 | stack below interrupt stack?
</font> bcs.b 1f | yes, switch to interrupt stack
cmpl a0,a7 | stack above interrupt stack?
bcs.b 2f | no, do not switch stacks
<font color='#997700'>@@ -276,7 +277,7 @@
</font> 2:
#endif /* CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 */
<font color='#880000'>- addql #1,SYM(_ISR_Nest_level) | one nest level deeper
</font><font color='#000088'>+ addql #1,ISR_NEST_LEVEL | one nest level deeper
</font>
movel SYM (_ISR_Vector_table),a0 | a0= base of RTEMS table
#if ( M68K_HAS_PREINDEXING == 1 )
<font color='#997700'>@@ -290,10 +291,10 @@
</font> movel d0,a7@- | push vector number
jbsr a0@ | invoke the user ISR
addql #4,a7 | remove vector number
<font color='#880000'>- subql #1,SYM(_ISR_Nest_level) | Reduce interrupt-nesting count
</font><font color='#000088'>+ subql #1,ISR_NEST_LEVEL | Reduce interrupt-nesting count
</font>
#if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 )
<font color='#880000'>- movel _CPU_Interrupt_stack_high,a0
</font><font color='#000088'>+ movel INTERRUPT_STACK_HIGH,a0
</font> subql #4,a0
cmpl a0,a7 | At top of interrupt stack?
bne.b 1f | No, do not restore task stack pointer
<font color='#997700'>@@ -322,16 +323,11 @@
</font> beq.b exit
#endif
#endif
<font color='#880000'>- tstb SYM (_Context_Switch_necessary)
</font><font color='#000088'>+ tstb DISPATCH_NEEDED
</font> | Is thread switch necessary?
<font color='#880000'>- bne.b bframe | Yes, invoke dispatcher
-
- tstb SYM (_ISR_Signals_to_thread_executing)
- | signals sent to Run_thread
- | while in interrupt handler?
</font> beq.b exit | No, then exit
<font color='#880000'>-bframe: clrb SYM (_ISR_Signals_to_thread_executing)
</font><font color='#000088'>+bframe:<span style="background-color: #FF0000"> </span>
</font> | If sent, will be processed
#if ( M68K_HAS_SEPARATE_STACKS == 1 )
movec msp,a0 | a0 = master stack pointer
<font color='#006600'>diff -u rtems/cpukit/score/cpu/m68k/rtems/score/cpu.h:1.42 rtems/cpukit/score/cpu/m68k/rtems/score/cpu.h:1.43
--- rtems/cpukit/score/cpu/m68k/rtems/score/cpu.h:1.42 Thu Apr 8 11:37:34 2010
+++ rtems/cpukit/score/cpu/m68k/rtems/score/cpu.h Mon Jun 28 19:31:18 2010
</font><font color='#997700'>@@ -308,9 +308,6 @@
</font>
/* variables */
<font color='#880000'>-SCORE_EXTERN void *_CPU_Interrupt_stack_low;
-SCORE_EXTERN void *_CPU_Interrupt_stack_high;
-
</font> extern void* _VBR;
#if ( M68K_HAS_VBR == 0 )
<font color='#006600'>diff -u rtems/cpukit/score/cpu/mips/ChangeLog:1.138 rtems/cpukit/score/cpu/mips/ChangeLog:1.139
--- rtems/cpukit/score/cpu/mips/ChangeLog:1.138 Wed Jun 16 12:25:53 2010
+++ rtems/cpukit/score/cpu/mips/ChangeLog Mon Jun 28 19:31:43 2010
</font><font color='#997700'>@@ -1,3 +1,11 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * cpu_asm.S, rtems/score/cpu.h: Add a per cpu data structure which
+ contains the information required by RTEMS for each CPU core. This
+ encapsulates information such as thread executing, heir, idle and
+ dispatch needed.
+
</font> 2010-06-16 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu_asm.S: Remove trailing tabs.
<font color='#006600'>diff -u rtems/cpukit/score/cpu/mips/cpu_asm.S:1.41 rtems/cpukit/score/cpu/mips/cpu_asm.S:1.42
--- rtems/cpukit/score/cpu/mips/cpu_asm.S:1.41 Wed Jun 16 12:25:54 2010
+++ rtems/cpukit/score/cpu/mips/cpu_asm.S Mon Jun 28 19:31:44 2010
</font><font color='#997700'>@@ -57,6 +57,7 @@
</font> #include <rtems/asm.h>
#include <rtems/mips/iregdef.h>
#include <rtems/mips/idtcpu.h>
<font color='#000088'>+#include <rtems/score/percpu.h>
</font>
#define ASSEMBLY_ONLY
#include <rtems/score/cpu.h>
<font color='#997700'>@@ -201,8 +202,6 @@
</font>
ASM_EXTERN(__exceptionStackFrame, SZ_INT)
<font color='#880000'>-
-
</font> /*
* _CPU_Context_save_fp_context
*
<font color='#997700'>@@ -585,20 +584,12 @@
</font>
ENDFRAME(_CPU_Context_restore)
<font color='#880000'>-
-ASM_EXTERN(_ISR_Nest_level,4)
</font> ASM_EXTERN(_Thread_Dispatch_disable_level,4)
<font color='#880000'>-ASM_EXTERN(_Context_Switch_necessary,1)
-ASM_EXTERN(_ISR_Signals_to_thread_executing,1)
</font> ASM_EXTERN(_Thread_Executing,4)
.extern _Thread_Dispatch
.extern _ISR_Vector_table
<font color='#880000'>-
-
-
-
</font> /* void _DBG_Handler()
*
* This routine services the (at least) MIPS1 debug vector,
<font color='#997700'>@@ -606,10 +597,7 @@
</font> * while optional, is best located here because its intrinsically
* associated with exceptions in general & thus tied pretty
* closely to _ISR_Handler.
<font color='#880000'>- *
</font> */
<font color='#880000'>-
-
</font> FRAME(_DBG_Handler,sp,0,ra)
.set noreorder
la k0,_ISR_Handler
<font color='#997700'>@@ -618,10 +606,6 @@
</font> .set reorder
ENDFRAME(_DBG_Handler)
<font color='#880000'>-
-
-
-
</font> /* void __ISR_Handler()
*
* This routine provides the RTEMS interrupt management.
<font color='#997700'>@@ -693,7 +677,7 @@
</font>
#ifdef INSTRUMENT_EXECUTING_THREAD
<font color='#880000'>- lw t2, _Thread_Executing
</font><font color='#000088'>+ lw t2, THREAD_EXECUTING
</font> NOP
sw t2, 0x8001FFF0
#endif
<font color='#997700'>@@ -904,10 +888,10 @@
</font> /*
* _ISR_Nest_level++;
*/
<font color='#880000'>- lw t0,_ISR_Nest_level
</font><font color='#000088'>+ lw t0,ISR_NEST_LEVEL
</font> NOP
add t0,t0,1
<font color='#880000'>- sw t0,_ISR_Nest_level
</font><font color='#000088'>+ sw t0,ISR_NEST_LEVEL
</font> /*
* _Thread_Dispatch_disable_level++;
*/
<font color='#997700'>@@ -940,10 +924,10 @@
</font> /*
* --_ISR_Nest_level;
*/
<font color='#880000'>- lw t2,_ISR_Nest_level
</font><font color='#000088'>+ lw t2,ISR_NEST_LEVEL
</font> NOP
add t2,t2,-1
<font color='#880000'>- sw t2,_ISR_Nest_level
</font><font color='#000088'>+ sw t2,ISR_NEST_LEVEL
</font> /*
* --_Thread_Dispatch_disable_level;
*/
<font color='#997700'>@@ -965,20 +949,19 @@
</font> * restore stack
* #endif
*
<font color='#880000'>- * if ( !_Context_Switch_necessary && !_ISR_Signals_to_thread_executing )
</font><font color='#000088'>+ * if !_Context_Switch_necessary<span style="background-color: #FF0000"> </span>
</font> * goto the label "exit interrupt (simple case)"
*/
<font color='#880000'>- lbu t0,_Context_Switch_necessary
- lbu t1,_ISR_Signals_to_thread_executing
</font><font color='#000088'>+ lbu t0,DISPATCH_NEEDED
</font> NOP
<font color='#880000'>- or t0,t0,t1
</font><font color='#000088'>+ or t0,t0,t0
</font> beq t0,zero,_ISR_Handler_exit
NOP
#ifdef INSTRUMENT_EXECUTING_THREAD
<font color='#880000'>- lw t0,_Thread_Executing
</font><font color='#000088'>+ lw t0,THREAD_EXECUTING
</font> NOP
sw t0,0x8001FFF4
#endif
<font color='#997700'>@@ -1068,7 +1051,7 @@
</font>
#ifdef INSTRUMENT_EXECUTING_THREAD
<font color='#880000'>- lw t0,_Thread_Executing
</font><font color='#000088'>+ lw t0,THREAD_EXECUTING
</font> NOP
sw t0,0x8001FFF8
#endif
<font color='#997700'>@@ -1093,7 +1076,7 @@
</font> /* restore context from stack */
#ifdef INSTRUMENT_EXECUTING_THREAD
<font color='#880000'>- lw t0,_Thread_Executing
</font><font color='#000088'>+ lw t0,THREAD_EXECUTING
</font> NOP
sw t0, 0x8001FFFC
#endif
<font color='#006600'>diff -u rtems/cpukit/score/cpu/mips/rtems/score/cpu.h:1.56 rtems/cpukit/score/cpu/mips/rtems/score/cpu.h:1.57
--- rtems/cpukit/score/cpu/mips/rtems/score/cpu.h:1.56 Sun Apr 25 16:37:46 2010
+++ rtems/cpukit/score/cpu/mips/rtems/score/cpu.h Mon Jun 28 19:31:44 2010
</font><font color='#997700'>@@ -617,22 +617,6 @@
</font> SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
/*
<font color='#880000'>- * On some CPUs, RTEMS supports a software managed interrupt stack.
- * This stack is allocated by the Interrupt Manager and the switch
- * is performed in _ISR_Handler. These variables contain pointers
- * to the lowest and highest addresses in the chunk of memory allocated
- * for the interrupt stack. Since it is unknown whether the stack
- * grows up or down (in general), this give the CPU dependent
- * code the option of picking the version it wants to use.
- *
- * NOTE: These two variables are required if the macro
- * CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE.
- */
-
-SCORE_EXTERN void *_CPU_Interrupt_stack_low;
-SCORE_EXTERN void *_CPU_Interrupt_stack_high;
-
-/*
</font> * Nothing prevents the porter from declaring more CPU specific variables.
*/
<font color='#006600'>diff -u rtems/cpukit/score/cpu/sparc/ChangeLog:1.95 rtems/cpukit/score/cpu/sparc/ChangeLog:1.96
--- rtems/cpukit/score/cpu/sparc/ChangeLog:1.95 Sat Mar 27 10:03:09 2010
+++ rtems/cpukit/score/cpu/sparc/ChangeLog Mon Jun 28 19:34:00 2010
</font><font color='#997700'>@@ -1,3 +1,11 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * cpu_asm.S, rtems/score/cpu.h: Add a per cpu data structure which
+ contains the information required by RTEMS for each CPU core. This
+ encapsulates information such as thread executing, heir, idle and
+ dispatch needed.
+
</font> 2010-03-27 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu.c, cpu_asm.S: Add include of config.h
<font color='#006600'>diff -u rtems/cpukit/score/cpu/sparc/cpu_asm.S:1.17 rtems/cpukit/score/cpu/sparc/cpu_asm.S:1.18
--- rtems/cpukit/score/cpu/sparc/cpu_asm.S:1.17 Sat Mar 27 10:03:09 2010
+++ rtems/cpukit/score/cpu/sparc/cpu_asm.S Mon Jun 28 19:34:00 2010
</font><font color='#997700'>@@ -4,7 +4,7 @@
</font> * in an specific CPU port of RTEMS. These algorithms must be implemented
* in assembly language.
*
<font color='#880000'>- * COPYRIGHT (c) 1989-2007.
</font><font color='#000088'>+ * COPYRIGHT (c) 1989-2010.
</font> * On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
<font color='#997700'>@@ -26,6 +26,7 @@
</font> #endif
#include <rtems/asm.h>
<font color='#000088'>+#include <rtems/system.h>
</font>
#if (SPARC_HAS_FPU == 1)
<font color='#997700'>@@ -471,7 +472,7 @@
</font> * Register usage for this section:
*
* l4 = _Thread_Dispatch_disable_level pointer
<font color='#880000'>- * l5 = _ISR_Nest_level pointer
</font><font color='#000088'>+ * l5 = per cpu info pointer
</font> * l6 = _Thread_Dispatch_disable_level value
* l7 = _ISR_Nest_level value
*
<font color='#997700'>@@ -481,14 +482,17 @@
</font>
sethi %hi(SYM(_Thread_Dispatch_disable_level)), %l4
ld [%l4 + %lo(SYM(_Thread_Dispatch_disable_level))], %l6
<font color='#880000'>- sethi %hi(SYM(_ISR_Nest_level)), %l5
- ld [%l5 + %lo(SYM(_ISR_Nest_level))], %l7
</font><font color='#000088'>+
+ sethi %hi(_Per_CPU_Information), %l5
+ add %l5, %lo(_Per_CPU_Information), %l5
+
+ ld [%l5 + PER_CPU_ISR_NEST_LEVEL], %l7
</font>
add %l6, 1, %l6
st %l6, [%l4 + %lo(SYM(_Thread_Dispatch_disable_level))]
add %l7, 1, %l7
<font color='#880000'>- st %l7, [%l5 + %lo(SYM(_ISR_Nest_level))]
</font><font color='#000088'>+ st %l7, [%l5 + PER_CPU_ISR_NEST_LEVEL]
</font>
/*
* If ISR nest level was zero (now 1), then switch stack.
<font color='#997700'>@@ -498,8 +502,8 @@
</font> subcc %l7, 1, %l7 ! outermost interrupt handler?
bnz dont_switch_stacks ! No, then do not switch stacks
<font color='#880000'>- sethi %hi(SYM(_CPU_Interrupt_stack_high)), %g4
- ld [%g4 + %lo(SYM(_CPU_Interrupt_stack_high))], %sp
</font><font color='#000088'>+ nop
+ ld [%l5 + PER_CPU_INTERRUPT_STACK_HIGH], %sp
</font>
dont_switch_stacks:
/*
<font color='#997700'>@@ -644,7 +648,7 @@
</font> sub %l6, 1, %l6
st %l6, [%l4 + %lo(SYM(_Thread_Dispatch_disable_level))]
<font color='#880000'>- st %l7, [%l5 + %lo(SYM(_ISR_Nest_level))]
</font><font color='#000088'>+ st %l7, [%l5 + PER_CPU_ISR_NEST_LEVEL]
</font>
/*
* If dispatching is disabled (includes nested interrupt case),
<font color='#997700'>@@ -660,8 +664,7 @@
</font> ld [%l6 + %lo(SYM(_CPU_ISR_Dispatch_disable))], %l7
orcc %l7, %g0, %g0 ! Is this thread already doing an ISR?
bnz simple_return ! Yes, then do a "simple" exit
<font color='#880000'>- ! NOTE: Use the delay slot
- sethi %hi(SYM(_Context_Switch_necessary)), %l4
</font><font color='#000088'>+ nop
</font>
/*
<font color='#997700'>@@ -669,27 +672,11 @@
</font> * return to the interrupt dispatcher.
*/
<font color='#880000'>- ldub [%l4 + %lo(SYM(_Context_Switch_necessary))], %l5
</font><font color='#000088'>+ ldub [%l5 + PER_CPU_DISPATCH_NEEDED], %l5
</font>
orcc %l5, %g0, %g0 ! Is thread switch necessary?
<font color='#880000'>- bnz SYM(_ISR_Dispatch) ! yes, then invoke the dispatcher
- ! NOTE: Use the delay slot
- sethi %hi(SYM(_ISR_Signals_to_thread_executing)), %l6
-
- /*
- * Finally, check to see if signals were sent to the currently
- * executing task. If so, we need to invoke the interrupt dispatcher.
- */
-
- ldub [%l6 + %lo(SYM(_ISR_Signals_to_thread_executing))], %l7
-
- orcc %l7, %g0, %g0 ! Were signals sent to the currently
- ! executing thread?
- bz simple_return ! yes, then invoke the dispatcher
- ! use the delay slot to clear the signals
- ! to the currently executing task flag
- st %g0, [%l6 + %lo(SYM(_ISR_Signals_to_thread_executing))]
-
</font><font color='#000088'>+ bz simple_return ! no, then do a simple return
+ nop
</font>
/*
* Invoke interrupt dispatcher.
<font color='#997700'>@@ -737,28 +724,14 @@
</font> * _Thread_Dispatch before leaving this ISR Dispatch context.
*/
<font color='#880000'>- sethi %hi(SYM(_Context_Switch_necessary)), %l4
- ldub [%l4 + %lo(SYM(_Context_Switch_necessary))], %l5
-
- ! NOTE: Use some of delay slot to start loading this
- sethi %hi(SYM(_ISR_Signals_to_thread_executing)), %l6
- ldub [%l6 + %lo(SYM(_ISR_Signals_to_thread_executing))], %l7
</font><font color='#000088'>+ sethi %hi(_Per_CPU_Information), %l5
+ add %l5, %lo(_Per_CPU_Information), %l5
</font>
<font color='#880000'>- orcc %l5, %g0, %g0 ! Is thread switch necessary?
- bnz dispatchAgain ! yes, then invoke the dispatcher AGAIN
- ! NOTE: Use the delay slot to catch the orcc below
</font><font color='#000088'>+ ldub [%l5 + PER_CPU_DISPATCH_NEEDED], %l7
</font>
<font color='#880000'>- /*
- * Finally, check to see if signals were sent to the currently
- * executing task. If so, we need to invoke the interrupt dispatcher.
- */
-
- ! NOTE: Delay slots above were used to perform the load AND
- ! this orcc falls into the delay slot for bnz above
- orcc %l7, %g0, %g0 ! Were signals sent to the currently
- ! executing thread?
</font><font color='#000088'>+ orcc %l7, %g0, %g0 ! Is thread switch necesary?
</font> bz allow_nest_again ! No, then clear out and return
<font color='#880000'>- ! NOTE: use the delay slot from the bz to load 3 into %g1
</font><font color='#000088'>+ nop
</font>
! Yes, then invoke the dispatcher
dispatchAgain:
<font color='#006600'>diff -u rtems/cpukit/score/cpu/sparc/rtems/score/cpu.h:1.35 rtems/cpukit/score/cpu/sparc/rtems/score/cpu.h:1.36
--- rtems/cpukit/score/cpu/sparc/rtems/score/cpu.h:1.35 Wed Dec 2 03:46:16 2009
+++ rtems/cpukit/score/cpu/sparc/rtems/score/cpu.h Mon Jun 28 19:34:00 2010
</font><font color='#997700'>@@ -523,22 +523,6 @@
</font> SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context CPU_STRUCTURE_ALIGNMENT;
/*
<font color='#880000'>- * This stack is allocated by the Interrupt Manager and the switch
- * is performed in _ISR_Handler. These variables contain pointers
- * to the lowest and highest addresses in the chunk of memory allocated
- * for the interrupt stack. Since it is unknown whether the stack
- * grows up or down (in general), this give the CPU dependent
- * code the option of picking the version it wants to use. Thus
- * both must be present if either is.
- *
- * The SPARC supports a software based interrupt stack and these
- * are required.
- */
-
-SCORE_EXTERN void *_CPU_Interrupt_stack_low;
-SCORE_EXTERN void *_CPU_Interrupt_stack_high;
-
-/*
</font> * This flag is context switched with each thread. It indicates
* that THIS thread has an _ISR_Dispatch stack frame on its stack.
* By using this flag, we can avoid nesting more interrupt dispatching
<font color='#997700'>@@ -965,6 +949,7 @@
</font> Context_Control_fp **fp_context_ptr
);
<font color='#000088'>+
</font> /*
* CPU_swap_u32
*
</pre>
<p> </p>
<a name='cs8'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>joel</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* configure.ac, posix/src/killinfo.c,
posix/src/psignalclearprocesssignals.c,
posix/src/psignalsetprocesssignals.c,
posix/src/psignalunblockthread.c, posix/src/pthreadcreate.c,
posix/src/pthreadkill.c, posix/src/pthreadsigmask.c,
rtems/src/signalsend.c, rtems/src/taskmode.c, score/Makefile.am,
score/preinstall.am, score/include/rtems/system.h,
score/include/rtems/score/context.h, score/include/rtems/score/isr.h,
score/include/rtems/score/thread.h, score/src/isr.c,
score/src/isrthreaddispatch.c, score/src/thread.c,
score/src/threaddispatch.c, score/src/threadloadenv.c: Add a per cpu
data structure which contains the information required by RTEMS for
each CPU core. This encapsulates information such as thread
executing, heir, idle and dispatch needed.
* score/include/rtems/score/percpu.h, score/src/percpu.c: New files.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/ChangeLog.diff?r1=text&tr1=1.2469&r2=text&tr2=1.2470&diff_format=h">M</a></td><td width='1%'>1.2470</td><td width='100%'>cpukit/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/configure.ac.diff?r1=text&tr1=1.187&r2=text&tr2=1.188&diff_format=h">M</a></td><td width='1%'>1.188</td><td width='100%'>cpukit/configure.ac</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/posix/src/killinfo.c.diff?r1=text&tr1=1.24&r2=text&tr2=1.25&diff_format=h">M</a></td><td width='1%'>1.25</td><td width='100%'>cpukit/posix/src/killinfo.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/posix/src/psignalclearprocesssignals.c.diff?r1=text&tr1=1.6&r2=text&tr2=1.7&diff_format=h">M</a></td><td width='1%'>1.7</td><td width='100%'>cpukit/posix/src/psignalclearprocesssignals.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/posix/src/psignalsetprocesssignals.c.diff?r1=text&tr1=1.6&r2=text&tr2=1.7&diff_format=h">M</a></td><td width='1%'>1.7</td><td width='100%'>cpukit/posix/src/psignalsetprocesssignals.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/posix/src/psignalunblockthread.c.diff?r1=text&tr1=1.10&r2=text&tr2=1.11&diff_format=h">M</a></td><td width='1%'>1.11</td><td width='100%'>cpukit/posix/src/psignalunblockthread.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/posix/src/pthreadcreate.c.diff?r1=text&tr1=1.20&r2=text&tr2=1.21&diff_format=h">M</a></td><td width='1%'>1.21</td><td width='100%'>cpukit/posix/src/pthreadcreate.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/posix/src/pthreadkill.c.diff?r1=text&tr1=1.15&r2=text&tr2=1.16&diff_format=h">M</a></td><td width='1%'>1.16</td><td width='100%'>cpukit/posix/src/pthreadkill.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/posix/src/pthreadsigmask.c.diff?r1=text&tr1=1.8&r2=text&tr2=1.9&diff_format=h">M</a></td><td width='1%'>1.9</td><td width='100%'>cpukit/posix/src/pthreadsigmask.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/rtems/src/signalsend.c.diff?r1=text&tr1=1.10&r2=text&tr2=1.11&diff_format=h">M</a></td><td width='1%'>1.11</td><td width='100%'>cpukit/rtems/src/signalsend.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/rtems/src/taskmode.c.diff?r1=text&tr1=1.11&r2=text&tr2=1.12&diff_format=h">M</a></td><td width='1%'>1.12</td><td width='100%'>cpukit/rtems/src/taskmode.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/Makefile.am.diff?r1=text&tr1=1.83&r2=text&tr2=1.84&diff_format=h">M</a></td><td width='1%'>1.84</td><td width='100%'>cpukit/score/Makefile.am</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/include/rtems/score/context.h.diff?r1=text&tr1=1.21&r2=text&tr2=1.22&diff_format=h">M</a></td><td width='1%'>1.22</td><td width='100%'>cpukit/score/include/rtems/score/context.h</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/include/rtems/score/isr.h.diff?r1=text&tr1=1.31&r2=text&tr2=1.32&diff_format=h">M</a></td><td width='1%'>1.32</td><td width='100%'>cpukit/score/include/rtems/score/isr.h</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/include/rtems/score/percpu.h?rev=1.1&content-type=text/vnd.viewcvs-markup">A</a></td><td width='1%'><font color="#000088">1.1</font></td><td width='100%'><font color="#000088">cpukit/score/include/rtems/score/percpu.h</font></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/include/rtems/score/thread.h.diff?r1=text&tr1=1.95&r2=text&tr2=1.96&diff_format=h">M</a></td><td width='1%'>1.96</td><td width='100%'>cpukit/score/include/rtems/score/thread.h</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/include/rtems/system.h.diff?r1=text&tr1=1.64&r2=text&tr2=1.65&diff_format=h">M</a></td><td width='1%'>1.65</td><td width='100%'>cpukit/score/include/rtems/system.h</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/preinstall.am.diff?r1=text&tr1=1.21&r2=text&tr2=1.22&diff_format=h">M</a></td><td width='1%'>1.22</td><td width='100%'>cpukit/score/preinstall.am</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/src/isr.c.diff?r1=text&tr1=1.18&r2=text&tr2=1.19&diff_format=h">M</a></td><td width='1%'>1.19</td><td width='100%'>cpukit/score/src/isr.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/src/isrthreaddispatch.c.diff?r1=text&tr1=1.3&r2=text&tr2=1.4&diff_format=h">M</a></td><td width='1%'>1.4</td><td width='100%'>cpukit/score/src/isrthreaddispatch.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/src/percpu.c?rev=1.1&content-type=text/vnd.viewcvs-markup">A</a></td><td width='1%'><font color="#000088">1.1</font></td><td width='100%'><font color="#000088">cpukit/score/src/percpu.c</font></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/src/thread.c.diff?r1=text&tr1=1.62&r2=text&tr2=1.63&diff_format=h">M</a></td><td width='1%'>1.63</td><td width='100%'>cpukit/score/src/thread.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/src/threaddispatch.c.diff?r1=text&tr1=1.20&r2=text&tr2=1.21&diff_format=h">M</a></td><td width='1%'>1.21</td><td width='100%'>cpukit/score/src/threaddispatch.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/cpukit/score/src/threadloadenv.c.diff?r1=text&tr1=1.7&r2=text&tr2=1.8&diff_format=h">M</a></td><td width='1%'>1.8</td><td width='100%'>cpukit/score/src/threadloadenv.c</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/cpukit/ChangeLog:1.2469 rtems/cpukit/ChangeLog:1.2470
--- rtems/cpukit/ChangeLog:1.2469 Mon Jun 28 18:12:09 2010
+++ rtems/cpukit/ChangeLog Mon Jun 28 19:34:10 2010
</font><font color='#997700'>@@ -1,5 +1,24 @@
</font> 2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
<font color='#000088'>+ PR 1573/cpukit
+ * configure.ac, posix/src/killinfo.c,
+ posix/src/psignalclearprocesssignals.c,
+ posix/src/psignalsetprocesssignals.c,
+ posix/src/psignalunblockthread.c, posix/src/pthreadcreate.c,
+ posix/src/pthreadkill.c, posix/src/pthreadsigmask.c,
+ rtems/src/signalsend.c, rtems/src/taskmode.c, score/Makefile.am,
+ score/preinstall.am, score/include/rtems/system.h,
+ score/include/rtems/score/context.h, score/include/rtems/score/isr.h,
+ score/include/rtems/score/thread.h, score/src/isr.c,
+ score/src/isrthreaddispatch.c, score/src/thread.c,
+ score/src/threaddispatch.c, score/src/threadloadenv.c: Add a per cpu
+ data structure which contains the information required by RTEMS for
+ each CPU core. This encapsulates information such as thread
+ executing, heir, idle and dispatch needed.
+ * score/include/rtems/score/percpu.h, score/src/percpu.c: New files.
+
+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
</font> * libcsupport/src/libio_sockets.c: Use
rtems_set_errno_and_return_minus_one() where it was missed before.
<font color='#006600'>diff -u rtems/cpukit/configure.ac:1.187 rtems/cpukit/configure.ac:1.188
--- rtems/cpukit/configure.ac:1.187 Thu Jun 17 10:29:22 2010
+++ rtems/cpukit/configure.ac Mon Jun 28 19:34:10 2010
</font><font color='#997700'>@@ -251,6 +251,9 @@
</font> ## Check if libc provides BSD's strlcpy/strlcat
AC_CHECK_FUNCS(strlcpy strlcat)
<font color='#000088'>+## This is needed to generate the field offsets of the per CPU<span style="background-color: #FF0000"> </span>
+## data structure so they can be accessed from assembly code.
+AC_CHECK_SIZEOF([void *])
</font>
# ... far too many conditionals ...
AM_CONDITIONAL(LIBRPC,[test x"$rtems_cv_HAS_NETWORKING" = x"yes"])
<font color='#006600'>diff -u rtems/cpukit/posix/src/killinfo.c:1.24 rtems/cpukit/posix/src/killinfo.c:1.25
--- rtems/cpukit/posix/src/killinfo.c:1.24 Mon Jun 21 17:54:54 2010
+++ rtems/cpukit/posix/src/killinfo.c Mon Jun 28 19:34:10 2010
</font><font color='#997700'>@@ -314,8 +314,6 @@
</font> */
process_it:
<font color='#880000'>- the_thread->do_post_task_switch_extension = true;
-
</font> /*
* Returns true if the signal was synchronously given to a thread
* blocked waiting for the signal.
<font color='#006600'>diff -u rtems/cpukit/posix/src/psignalclearprocesssignals.c:1.6 rtems/cpukit/posix/src/psignalclearprocesssignals.c:1.7
--- rtems/cpukit/posix/src/psignalclearprocesssignals.c:1.6 Wed Aug 5 10:39:59 2009
+++ rtems/cpukit/posix/src/psignalclearprocesssignals.c Mon Jun 28 19:34:10 2010
</font><font color='#997700'>@@ -53,8 +53,6 @@
</font> }
if ( clear_signal ) {
_POSIX_signals_Pending &= ~mask;
<font color='#880000'>- if ( !_POSIX_signals_Pending )
- _Thread_Do_post_task_switch_extension--;
</font> }
_ISR_Enable( level );
}
<font color='#006600'>diff -u rtems/cpukit/posix/src/psignalsetprocesssignals.c:1.6 rtems/cpukit/posix/src/psignalsetprocesssignals.c:1.7
--- rtems/cpukit/posix/src/psignalsetprocesssignals.c:1.6 Mon Dec 17 10:19:14 2007
+++ rtems/cpukit/posix/src/psignalsetprocesssignals.c Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -41,8 +41,6 @@
</font> ISR_Level level;
_ISR_Disable( level );
<font color='#880000'>- if ( !_POSIX_signals_Pending )
- _Thread_Do_post_task_switch_extension++;
</font> _POSIX_signals_Pending |= mask;
_ISR_Enable( level );
}
<font color='#006600'>diff -u rtems/cpukit/posix/src/psignalunblockthread.c:1.10 rtems/cpukit/posix/src/psignalunblockthread.c:1.11
--- rtems/cpukit/posix/src/psignalunblockthread.c:1.10 Mon Nov 30 09:44:21 2009
+++ rtems/cpukit/posix/src/psignalunblockthread.c Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -98,8 +98,6 @@
</font> * + Any other combination, do nothing.
*/
<font color='#880000'>- the_thread->do_post_task_switch_extension = true;
-
</font> if ( the_thread->current_state & STATES_INTERRUPTIBLE_BY_SIGNAL ) {
the_thread->Wait.return_code = EINTR;
/*
<font color='#997700'>@@ -120,7 +118,7 @@
</font> }
} else if ( the_thread->current_state == STATES_READY ) {
if ( _ISR_Is_in_progress() && _Thread_Is_executing( the_thread ) )
<font color='#880000'>- _ISR_Signals_to_thread_executing = true;
</font><font color='#000088'>+ _Context_Switch_necessary = true;
</font> }
}
return false;
<font color='#006600'>diff -u rtems/cpukit/posix/src/pthreadcreate.c:1.20 rtems/cpukit/posix/src/pthreadcreate.c:1.21
--- rtems/cpukit/posix/src/pthreadcreate.c:1.20 Sat Apr 3 00:55:59 2010
+++ rtems/cpukit/posix/src/pthreadcreate.c Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -191,14 +191,6 @@
</font> api->schedparam = schedparam;
/*
<font color='#880000'>- * This insures we evaluate the process-wide signals pending when we
- * first run.
- *
- * NOTE: Since the thread starts with all unblocked, this is necessary.
- */
- the_thread->do_post_task_switch_extension = true;
-
- /*
</font> * POSIX threads are allocated and started in one operation.
*/
status = _Thread_Start(
<font color='#006600'>diff -u rtems/cpukit/posix/src/pthreadkill.c:1.15 rtems/cpukit/posix/src/pthreadkill.c:1.16
--- rtems/cpukit/posix/src/pthreadkill.c:1.15 Tue Feb 3 04:10:55 2009
+++ rtems/cpukit/posix/src/pthreadkill.c Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -63,10 +63,8 @@
</font>
(void) _POSIX_signals_Unblock_thread( the_thread, sig, NULL );
<font color='#880000'>- the_thread->do_post_task_switch_extension = true;
-
</font> if ( _ISR_Is_in_progress() && _Thread_Is_executing( the_thread ) )
<font color='#880000'>- _ISR_Signals_to_thread_executing = true;
</font><font color='#000088'>+ _Context_Switch_necessary = true;
</font> }
_Thread_Enable_dispatch();
return 0;
<font color='#006600'>diff -u rtems/cpukit/posix/src/pthreadsigmask.c:1.8 rtems/cpukit/posix/src/pthreadsigmask.c:1.9
--- rtems/cpukit/posix/src/pthreadsigmask.c:1.8 Thu Sep 4 10:23:12 2008
+++ rtems/cpukit/posix/src/pthreadsigmask.c Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -65,7 +65,6 @@
</font>
if ( ~api->signals_blocked &
(api->signals_pending | _POSIX_signals_Pending) ) {
<font color='#880000'>- _Thread_Executing->do_post_task_switch_extension = true;
</font> _Thread_Dispatch();
}
<font color='#006600'>diff -u rtems/cpukit/rtems/src/signalsend.c:1.10 rtems/cpukit/rtems/src/signalsend.c:1.11
--- rtems/cpukit/rtems/src/signalsend.c:1.10 Tue Dec 15 12:26:41 2009
+++ rtems/cpukit/rtems/src/signalsend.c Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -64,10 +64,8 @@
</font> if ( asr->is_enabled ) {
_ASR_Post_signals( signal_set, &asr->signals_posted );
<font color='#880000'>- the_thread->do_post_task_switch_extension = true;
-
</font> if ( _ISR_Is_in_progress() && _Thread_Is_executing( the_thread ) )
<font color='#880000'>- _ISR_Signals_to_thread_executing = true;
</font><font color='#000088'>+ _Context_Switch_necessary = true;
</font> } else {
_ASR_Post_signals( signal_set, &asr->signals_pending );
}
<font color='#006600'>diff -u rtems/cpukit/rtems/src/taskmode.c:1.11 rtems/cpukit/rtems/src/taskmode.c:1.12
--- rtems/cpukit/rtems/src/taskmode.c:1.11 Fri Sep 4 08:09:48 2009
+++ rtems/cpukit/rtems/src/taskmode.c Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -117,7 +117,6 @@
</font> _ASR_Swap_signals( asr );
if ( _ASR_Are_signals_pending( asr ) ) {
needs_asr_dispatching = true;
<font color='#880000'>- executing->do_post_task_switch_extension = true;
</font> }
}
}
<font color='#006600'>diff -u rtems/cpukit/score/Makefile.am:1.83 rtems/cpukit/score/Makefile.am:1.84
--- rtems/cpukit/score/Makefile.am:1.83 Thu Jun 24 17:40:32 2010
+++ rtems/cpukit/score/Makefile.am Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -24,15 +24,15 @@
</font> include/rtems/score/coremutex.h include/rtems/score/coresem.h \
include/rtems/score/heap.h include/rtems/score/protectedheap.h \
include/rtems/score/interr.h include/rtems/score/isr.h \
<font color='#880000'>- include/rtems/score/object.h include/rtems/score/priority.h \
- include/rtems/score/stack.h include/rtems/score/states.h \
- include/rtems/score/sysstate.h include/rtems/score/thread.h \
- include/rtems/score/threadq.h include/rtems/score/threadsync.h \
- include/rtems/score/timespec.h include/rtems/score/timestamp.h \
- include/rtems/score/timestamp64.h include/rtems/score/tod.h \
- include/rtems/score/tqdata.h include/rtems/score/userext.h \
- include/rtems/score/watchdog.h include/rtems/score/wkspace.h \
- include/rtems/score/cpuopts.h
</font><font color='#000088'>+ include/rtems/score/object.h include/rtems/score/percpu.h \
+ include/rtems/score/priority.h include/rtems/score/stack.h \
+ include/rtems/score/states.h include/rtems/score/sysstate.h \
+ include/rtems/score/thread.h include/rtems/score/threadq.h \
+ include/rtems/score/threadsync.h include/rtems/score/timespec.h \
+ include/rtems/score/timestamp.h include/rtems/score/timestamp64.h \
+ include/rtems/score/tod.h include/rtems/score/tqdata.h \
+ include/rtems/score/userext.h include/rtems/score/watchdog.h \
+ include/rtems/score/wkspace.h include/rtems/score/cpuopts.h
</font>
if HAS_PTHREADS
include_rtems_score_HEADERS += include/rtems/score/corespinlock.h \
<font color='#997700'>@@ -101,6 +101,9 @@
</font> src/coremutexseize.c src/coremutexsurrender.c \
src/coremutexseizeintr.c
<font color='#000088'>+## CORE_PERCPU_C_FILES
+libscore_a_SOURCES += src/percpu.c
+
</font> ## CORE_RWLOCK_C_FILES
if HAS_PTHREADS
libscore_a_SOURCES += src/corerwlock.c src/corerwlockobtainread.c \
<font color='#006600'>diff -u rtems/cpukit/score/include/rtems/score/context.h:1.21 rtems/cpukit/score/include/rtems/score/context.h:1.22
--- rtems/cpukit/score/include/rtems/score/context.h:1.21 Fri Nov 27 23:58:53 2009
+++ rtems/cpukit/score/include/rtems/score/context.h Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -23,6 +23,9 @@
</font> *
* This handler encapsulates functionality which abstracts thread context
* management in a portable manner.
<font color='#000088'>+ *
+ * The context switch needed variable is contained in the per cpu
+ * data structure.
</font> */
/**@{*/
<font color='#997700'>@@ -41,16 +44,6 @@
</font> #define CONTEXT_FP_SIZE CPU_CONTEXT_FP_SIZE
/**
<font color='#880000'>- * @brief Is Context Switch Needed?
- *
- * This variable is set to true when a reschedule operation
- * has determined that the processor should be taken away from the
- * currently executing thread and given to the heir thread.
- */
-
-SCORE_EXTERN volatile bool _Context_Switch_necessary;
-
-/**
</font> * @brief Initialize Context Area
* This routine initializes @a _the_context such that the stack
* pointer, interrupt level, and entry point are correct for the
<font color='#006600'>diff -u rtems/cpukit/score/include/rtems/score/isr.h:1.31 rtems/cpukit/score/include/rtems/score/isr.h:1.32
--- rtems/cpukit/score/include/rtems/score/isr.h:1.31 Fri Nov 27 23:58:54 2009
+++ rtems/cpukit/score/include/rtems/score/isr.h Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -21,11 +21,16 @@
</font> #ifndef _RTEMS_SCORE_ISR_H
#define _RTEMS_SCORE_ISR_H
<font color='#000088'>+#include <rtems/score/percpu.h>
+
</font> /**
* @defgroup ScoreISR ISR Handler
*
* This handler encapsulates functionality which provides the foundation
* ISR services used in all of the APIs supported by RTEMS.
<font color='#000088'>+ *
+ * The ISR Nest level counter variable is maintained as part of the
+ * per cpu data structure.
</font> */
/**@{*/
<font color='#997700'>@@ -75,18 +80,6 @@
</font> */
#define ISR_INTERRUPT_MAXIMUM_VECTOR_NUMBER CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER
<font color='#880000'>-/**
- * The following is true if signals have been sent to the currently
- * executing thread by an ISR handler.
- */
-SCORE_EXTERN bool _ISR_Signals_to_thread_executing;
-
-/**
- * The following contains the interrupt service routine nest level.
- * When this variable is zero, a thread is executing.
- */
-SCORE_EXTERN volatile uint32_t _ISR_Nest_level;
-
</font> #if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
/**
* The following declares the Vector Table. Application
<font color='#006600'>diff -u /dev/null rtems/cpukit/score/include/rtems/score/percpu.h:1.1
--- /dev/null Mon Jun 28 20:12:17 2010
+++ rtems/cpukit/score/include/rtems/score/percpu.h Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -0,0 +1,166 @@
</font><font color='#000088'>+/**
+ * @file rtems/score/percpu.h
+ *
+ * This include file defines the per CPU information required
+ * by RTEMS.
+ */
+
+/*
+ * COPYRIGHT (c) 1989-2010.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ *
+ * $Id$
+ */
+
+#ifndef _RTEMS_PERCPU_H
+#define _RTEMS_PERCPU_H
+
+#ifdef ASM
+ #include <rtems/asm.h>
+#endif
+
+/**
+ * @defgroup PerCPU RTEMS Per CPU Information
+ *
+ * This defines the per CPU state information required by RTEMS
+ * and the BSP. In an SMP configuration, there will be multiple
+ * instances of this data structure -- one per CPU -- and the
+ * current CPU number will be used as the index.
+ */
+
+/**@{*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef ASM
+
+/**
+ * This forward defines the Thread Control Block structure.
+ */
+typedef struct Thread_Control_struct Thread_Control;
+
+/**
+ * @brief Per CPU Core Structure
+ *
+ * This structure is used to hold per core state information.
+ */
+typedef struct {
+#if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) || \
+ (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
+ /**
+ * This contains a pointer to the lower range of the interrupt stack for
+ * this CPU. This is the address allocated and freed.
+ */
+ void *interrupt_stack_low;
+
+ /**
+ * This contains a pointer to the interrupt stack pointer for this CPU.
+ * It will be loaded at the beginning on an ISR.
+ */
+ void *interrupt_stack_high;
+#endif
+
+ /**
+ *
+ * This contains the current interrupt nesting level on this
+ * CPU.
+ */
+ uint32_t isr_nest_level;
+
+ /** This is the thread executing on this CPU. */
+ Thread_Control *executing;
+
+ /** This is the heir thread for this this CPU. */
+ Thread_Control *heir;
+
+ /** This is the idle thread for this CPU. */
+ Thread_Control *idle;
+
+ /** This is set to true when this CPU needs to run the dispatcher. */
+ volatile bool dispatch_needed;
+
+} Per_CPU_Control;
+#endif
+
+#ifdef ASM
+
+#if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) || \
+ (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
+ /*
+ * If this CPU target lets RTEMS allocates the interrupt stack, then
+ * we need to have places in the per cpu table to hold them.
+ */
+ #define PER_CPU_INTERRUPT_STACK_LOW 0
+ #define PER_CPU_INTERRUPT_STACK_HIGH (1 * SIZEOF_VOID_P)
+ #define PER_CPU_END_STACK (2 * SIZEOF_VOID_P)
+#else
+ /*
+ * Otherwise, there are no interrupt stack addresses in the per CPU table.
+ */
+ #define PER_CPU_END_STACK 0
+#endif
+
+/*
+ * These are the offsets of the required elements in the per CPU table.
+ */
+#define PER_CPU_ISR_NEST_LEVEL PER_CPU_END_STACK + 0
+#define PER_CPU_EXECUTING PER_CPU_END_STACK + (1 * SIZEOF_VOID_P)
+#define PER_CPU_HEIR PER_CPU_END_STACK + (2 * SIZEOF_VOID_P)
+#define PER_CPU_IDLE PER_CPU_END_STACK + (3 * SIZEOF_VOID_P)
+#define PER_CPU_DISPATCH_NEEDED PER_CPU_END_STACK + (4 * SIZEOF_VOID_P)
+#define ISR_NEST_LEVEL \
+ (SYM(_Per_CPU_Information) + PER_CPU_ISR_NEST_LEVEL)
+#define DISPATCH_NEEDED \
+ (SYM(_Per_CPU_Information) + PER_CPU_DISPATCH_NEEDED)
+
+/*
+ * Do not define these offsets if they are not in the table.
+ */
+#if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) || \
+ (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
+ #define INTERRUPT_STACK_LOW \
+ (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_LOW)
+ #define INTERRUPT_STACK_HIGH \
+ (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_HIGH)
+#endif
+
+#endif
+
+#ifndef ASM
+
+/**
+ * @brief Set of Per CPU Core Information
+ *
+ * This is an array of per CPU core information.
+ */
+extern Per_CPU_Control _Per_CPU_Information;
+
+/*
+ * On an SMP system, these macros dereference the CPU core number.
+ * But on a non-SMP system, these macros are simple references.
+ * Thus when built for non-SMP, there should be no performance penalty.
+ */
+#define _Thread_Heir _Per_CPU_Information.heir
+#define _Thread_Executing _Per_CPU_Information.executing
+#define _Thread_Idle _Per_CPU_Information.idle
+#define _ISR_Nest_level _Per_CPU_Information.isr_nest_level
+#define _CPU_Interrupt_stack_low _Per_CPU_Information.interrupt_stack_low
+#define _CPU_Interrupt_stack_high _Per_CPU_Information.interrupt_stack_high
+#define _Context_Switch_necessary _Per_CPU_Information.dispatch_needed
+
+#endif /* ASM */
+
+#ifdef __cplusplus
+}
+#endif
+
+/**@}*/
+
+#endif
+/* end of include file */
</font>
<font color='#006600'>diff -u rtems/cpukit/score/include/rtems/score/thread.h:1.95 rtems/cpukit/score/include/rtems/score/thread.h:1.96
--- rtems/cpukit/score/include/rtems/score/thread.h:1.95 Thu Jun 24 17:40:32 2010
+++ rtems/cpukit/score/include/rtems/score/thread.h Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -24,6 +24,13 @@
</font> *
* This handler encapsulates functionality related to the management of
* threads. This includes the creation, deletion, and scheduling of threads.
<font color='#000088'>+ *
+ * The following variables are maintained as part of the per cpu data
+ * structure.
+ *
+ * + Idle thread pointer
+ * + Executing thread pointer
+ * + Heir thread pointer
</font> */
/**@{*/
<font color='#997700'>@@ -55,6 +62,7 @@
</font> typedef uint32_t Thread_CPU_usage_t;
#endif
<font color='#000088'>+#include <rtems/score/percpu.h>
</font> #include <rtems/score/context.h>
#include <rtems/score/cpu.h>
#if defined(RTEMS_MULTIPROCESSING)
<font color='#997700'>@@ -147,10 +155,6 @@
</font> #endif
} Thread_CPU_budget_algorithms;
<font color='#880000'>-/** This type defines the Thread Control Block structure.
- */
-typedef struct Thread_Control_struct Thread_Control;
-
</font> /** This defines thes the entry point for the thread specific timeslice
* budget management algorithm.
*/
<font color='#997700'>@@ -363,10 +367,6 @@
</font> /** This field is true if the thread is offered globally */
bool is_global;
#endif
<font color='#880000'>- /** This field is is true if the post task context switch should be
- * executed for this thread at the next context switch.
- */
- bool do_post_task_switch_extension;
</font> /** This field is true if the thread is preemptible. */
bool is_preemptible;
#if __RTEMS_ADA__
<font color='#997700'>@@ -427,12 +427,6 @@
</font> SCORE_EXTERN Objects_Information _Thread_Internal_information;
/**
<font color='#880000'>- * The following define the thread control pointers used to access
- * and manipulate the idle thread.
- */
-SCORE_EXTERN Thread_Control *_Thread_Idle;
-
-/**
</font> * The following context area contains the context of the "thread"
* which invoked the start multitasking routine. This context is
* restored as the last action of the stop multitasking routine. Thus
<font color='#997700'>@@ -449,12 +443,6 @@
</font> SCORE_EXTERN volatile uint32_t _Thread_Dispatch_disable_level;
/**
<font color='#880000'>- * If this is non-zero, then the post-task switch extension
- * is run regardless of the state of the per thread flag.
- */
-SCORE_EXTERN uint32_t _Thread_Do_post_task_switch_extension;
-
-/**
</font> * The following holds how many user extensions are in the system. This
* is used to determine how many user extension data areas to allocate
* per thread.
<font color='#997700'>@@ -473,20 +461,6 @@
</font> SCORE_EXTERN Chain_Control *_Thread_Ready_chain;
/**
<font color='#880000'>- * The following points to the thread which is currently executing.
- * This thread is implicitly manipulated by numerous directives.
- */
-SCORE_EXTERN Thread_Control *_Thread_Executing;
-
-/**
- * The following points to the highest priority ready thread
- * in the system. Unless the current thread is not preemptibl,
- * then this thread will be context switched to when the next
- * dispatch occurs.
- */
-SCORE_EXTERN Thread_Control *_Thread_Heir;
-
-/**
</font> * The following points to the thread whose floating point
* context is currently loaded.
*/
<font color='#006600'>diff -u rtems/cpukit/score/include/rtems/system.h:1.64 rtems/cpukit/score/include/rtems/system.h:1.65
--- rtems/cpukit/score/include/rtems/system.h:1.64 Thu Jun 17 23:00:54 2010
+++ rtems/cpukit/score/include/rtems/system.h Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -169,6 +169,7 @@
</font> #include <stdint.h>
#endif
#include <rtems/score/cpu.h> /* processor specific information */
<font color='#000088'>+#include <rtems/score/percpu.h>
</font>
#ifndef ASM
/**
<font color='#006600'>diff -u rtems/cpukit/score/preinstall.am:1.21 rtems/cpukit/score/preinstall.am:1.22
--- rtems/cpukit/score/preinstall.am:1.21 Wed Aug 12 09:20:20 2009
+++ rtems/cpukit/score/preinstall.am Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -99,6 +99,10 @@
</font> $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/object.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/object.h
<font color='#000088'>+$(PROJECT_INCLUDE)/rtems/score/percpu.h: include/rtems/score/percpu.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/percpu.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/percpu.h
+
</font> $(PROJECT_INCLUDE)/rtems/score/priority.h: include/rtems/score/priority.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/priority.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/priority.h
<font color='#006600'>diff -u rtems/cpukit/score/src/isr.c:1.18 rtems/cpukit/score/src/isr.c:1.19
--- rtems/cpukit/score/src/isr.c:1.18 Thu Oct 29 11:27:45 2009
+++ rtems/cpukit/score/src/isr.c Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -34,8 +34,6 @@
</font>
void _ISR_Handler_initialization( void )
{
<font color='#880000'>- _ISR_Signals_to_thread_executing = false;
-
</font> _ISR_Nest_level = 0;
#if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
<font color='#997700'>@@ -64,6 +62,9 @@
</font> Configuration.interrupt_stack_size
);
<font color='#000088'>+ _CPU_Interrupt_stack_high = (void *)
+ ((uintptr_t) _CPU_Interrupt_stack_high & ~CPU_STACK_ALIGNMENT);
+
</font> /* Interrupt stack might have to be aligned and/or setup
* in a specific way.
*/
<font color='#006600'>diff -u rtems/cpukit/score/src/isrthreaddispatch.c:1.3 rtems/cpukit/score/src/isrthreaddispatch.c:1.4
--- rtems/cpukit/score/src/isrthreaddispatch.c:1.3 Sun Mar 28 12:08:54 2010
+++ rtems/cpukit/score/src/isrthreaddispatch.c Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -33,15 +33,6 @@
</font> {
if ( _Context_Switch_necessary ) {
_Thread_Dispatch();
<font color='#880000'>- } else if ( _ISR_Signals_to_thread_executing ) {
- _ISR_Signals_to_thread_executing = false;
- if (
- _Thread_Do_post_task_switch_extension
- || _Thread_Executing->do_post_task_switch_extension
- ) {
- _Thread_Executing->do_post_task_switch_extension = false;
- _API_extensions_Run_postswitch();
- }
</font> }
}
<font color='#006600'>diff -u /dev/null rtems/cpukit/score/src/percpu.c:1.1
--- /dev/null Mon Jun 28 20:12:18 2010
+++ rtems/cpukit/score/src/percpu.c Mon Jun 28 19:34:11 2010
</font><font color='#997700'>@@ -0,0 +1,29 @@
</font><font color='#000088'>+/*
+ * COPYRIGHT (c) 1989-2010.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ *
+ * $Id$
+ */
+
+#if HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <rtems/system.h>
+#include <rtems/score/thread.h>
+#include <rtems/score/percpu.h>
+#include <rtems/score/wkspace.h>
+#include <rtems/score/wkspace.h>
+#include <rtems/config.h>
+#include <string.h>
+
+/*
+ * On single core systems, we can efficiently directly access a single
+ * statically allocated per cpu structure. And the fields are initialized
+ * as individual elements just like it has always been done.
+ */
+Per_CPU_Control _Per_CPU_Information;
</font>
<font color='#006600'>diff -u rtems/cpukit/score/src/thread.c:1.62 rtems/cpukit/score/src/thread.c:1.63
--- rtems/cpukit/score/src/thread.c:1.62 Fri Sep 11 09:54:29 2009
+++ rtems/cpukit/score/src/thread.c Mon Jun 28 19:34:12 2010
</font><font color='#997700'>@@ -76,8 +76,6 @@
</font> _Thread_Allocated_fp = NULL;
#endif
<font color='#880000'>- _Thread_Do_post_task_switch_extension = 0;
-
</font> _Thread_Maximum_extensions = maximum_extensions;
_Thread_Ticks_per_timeslice = ticks_per_timeslice;
<font color='#006600'>diff -u rtems/cpukit/score/src/threaddispatch.c:1.20 rtems/cpukit/score/src/threaddispatch.c:1.21
--- rtems/cpukit/score/src/threaddispatch.c:1.20 Wed Dec 2 12:22:18 2009
+++ rtems/cpukit/score/src/threaddispatch.c Mon Jun 28 19:34:12 2010
</font><font color='#997700'>@@ -94,12 +94,26 @@
</font> _Thread_Dispatch_disable_level = 1;
_Context_Switch_necessary = false;
_Thread_Executing = heir;
<font color='#000088'>+
+ /*
+ * When the heir and executing are the same, then we are being
+ * requested to do the post switch dispatching. This is normally
+ * done to dispatch signals.
+ */
+ if ( heir == executing )
+ goto post_switch;
+
+ /*
+ * Since heir and executing are not the same, we need to do a real
+ * context switch.
+ */
</font> #if __RTEMS_ADA__
executing->rtems_ada_self = rtems_ada_self;
rtems_ada_self = heir->rtems_ada_self;
#endif
if ( heir->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE )
heir->cpu_time_budget = _Thread_Ticks_per_timeslice;
<font color='#000088'>+
</font> _ISR_Enable( level );
#ifndef __RTEMS_USE_TICKS_FOR_STATISTICS__
<font color='#997700'>@@ -170,14 +184,10 @@
</font> _ISR_Disable( level );
}
<font color='#000088'>+post_switch:
</font> _Thread_Dispatch_disable_level = 0;
_ISR_Enable( level );
<font color='#880000'>- if ( _Thread_Do_post_task_switch_extension ||
- executing->do_post_task_switch_extension ) {
- executing->do_post_task_switch_extension = false;
- _API_extensions_Run_postswitch();
- }
-
</font><font color='#000088'>+ _API_extensions_Run_postswitch();
</font> }
<font color='#006600'>diff -u rtems/cpukit/score/src/threadloadenv.c:1.7 rtems/cpukit/score/src/threadloadenv.c:1.8
--- rtems/cpukit/score/src/threadloadenv.c:1.7 Thu Sep 4 12:39:55 2008
+++ rtems/cpukit/score/src/threadloadenv.c Mon Jun 28 19:34:12 2010
</font><font color='#997700'>@@ -58,8 +58,6 @@
</font> #endif
is_fp = false;
<font color='#880000'>-
- the_thread->do_post_task_switch_extension = false;
</font> the_thread->is_preemptible = the_thread->Start.is_preemptible;
the_thread->budget_algorithm = the_thread->Start.budget_algorithm;
the_thread->budget_callout = the_thread->Start.budget_callout;
</pre>
<p> </p>
<a name='cs9'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>joel</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* shared/irq/irq.c, shared/irq/irq_asm.S: Add a per cpu data structure
which contains the information required by RTEMS for each CPU core.
This encapsulates information such as thread executing, heir, idle
and dispatch needed.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/i386/ChangeLog.diff?r1=text&tr1=1.66&r2=text&tr2=1.67&diff_format=h">M</a></td><td width='1%'>1.67</td><td width='100%'>c/src/lib/libbsp/i386/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/i386/shared/irq/irq.c.diff?r1=text&tr1=1.22&r2=text&tr2=1.23&diff_format=h">M</a></td><td width='1%'>1.23</td><td width='100%'>c/src/lib/libbsp/i386/shared/irq/irq.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/i386/shared/irq/irq_asm.S.diff?r1=text&tr1=1.17&r2=text&tr2=1.18&diff_format=h">M</a></td><td width='1%'>1.18</td><td width='100%'>c/src/lib/libbsp/i386/shared/irq/irq_asm.S</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/i386/ChangeLog:1.66 rtems/c/src/lib/libbsp/i386/ChangeLog:1.67
--- rtems/c/src/lib/libbsp/i386/ChangeLog:1.66 Mon Jun 21 17:55:08 2010
+++ rtems/c/src/lib/libbsp/i386/ChangeLog Mon Jun 28 19:38:13 2010
</font><font color='#997700'>@@ -1,3 +1,11 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * shared/irq/irq.c, shared/irq/irq_asm.S: Add a per cpu data structure
+ which contains the information required by RTEMS for each CPU core.
+ This encapsulates information such as thread executing, heir, idle
+ and dispatch needed.
+
</font> 2010-06-21 Joel Sherrill <joel.sherrill@oarcorp.com>
* shared/comm/GDB.HOWTO: Remove more ITRON references.
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/i386/shared/irq/irq.c:1.22 rtems/c/src/lib/libbsp/i386/shared/irq/irq.c:1.23
--- rtems/c/src/lib/libbsp/i386/shared/irq/irq.c:1.22 Thu Oct 29 23:07:51 2009
+++ rtems/c/src/lib/libbsp/i386/shared/irq/irq.c Mon Jun 28 19:38:13 2010
</font><font color='#997700'>@@ -249,22 +249,3 @@
</font> irq_count[vector]++;
bsp_interrupt_handler_dispatch(vector);
}
<font color='#880000'>-
-void _ThreadProcessSignalsFromIrq (void)
-{
- /*
- * Process pending signals that have not already been
- * processed by _Thread_Displatch. This happens quite
- * unfrequently : the ISR must have posted an action
- * to the current running thread.
- */
- if ( _Thread_Do_post_task_switch_extension ||
- _Thread_Executing->do_post_task_switch_extension ) {
- _Thread_Executing->do_post_task_switch_extension = false;
- _API_extensions_Run_postswitch();
- }
- /*
- * I plan to process other thread related events here.
- * This will include DEBUG session requested from keyboard...
- */
-}
</font>
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/i386/shared/irq/irq_asm.S:1.17 rtems/c/src/lib/libbsp/i386/shared/irq/irq_asm.S:1.18
--- rtems/c/src/lib/libbsp/i386/shared/irq/irq_asm.S:1.17 Tue Jun 15 11:36:19 2010
+++ rtems/c/src/lib/libbsp/i386/shared/irq/irq_asm.S Mon Jun 28 19:38:13 2010
</font><font color='#997700'>@@ -12,8 +12,10 @@
</font> */
#include <rtems/asm.h>
<font color='#000088'>+#include <bspopts.h>
</font> #include <bsp/irq_asm.h>
#include <rtems/score/cpu.h>
<font color='#000088'>+#include <rtems/score/percpu.h>
</font>
#ifndef CPU_STACK_ALIGNMENT
#error "Missing header? CPU_STACK_ALIGNMENT is not defined here"
<font color='#997700'>@@ -22,13 +24,14 @@
</font> /* Stack frame we use for intermediate storage */
#define ARG_OFF 0
#define MSK_OFF 4
<font color='#880000'>-#define EBP_OFF 8 /* code restoring ebp/esp relies on */
-#define ESP_OFF 12 /* esp being on top of ebp! */
</font><font color='#000088'>+#define EBX_OFF 8 /* ebx */
+#define EBP_OFF 12 /* code restoring ebp/esp relies on */
+#define ESP_OFF 16 /* esp being on top of ebp! */
</font> #ifdef __SSE__
<font color='#880000'>-#define FRM_SIZ (16+512)
-#define SSE_OFF 16
</font><font color='#000088'>+#define FRM_SIZ (20+512)
+#define SSE_OFF 20
</font> #else
<font color='#880000'>-#define FRM_SIZ 16
</font><font color='#000088'>+#define FRM_SIZ 20
</font> #endif
BEGIN_CODE
<font color='#997700'>@@ -64,14 +67,16 @@
</font>
/*
* Establish an aligned stack frame
<font color='#880000'>- * original-sp
- * saved-bp
- * saved-irq-mask
- * vector-arg-to-C_dispatch_isr <- aligned SP
</font><font color='#000088'>+ * original sp
+ * saved ebx
+ * saved ebp
+ * saved irq mask
+ * vector arg to C_dispatch_isr <- aligned SP
</font> */
movl esp, eax
subl $FRM_SIZ, esp
andl $ - CPU_STACK_ALIGNMENT, esp
<font color='#000088'>+ movl ebx, EBX_OFF(esp)
</font> movl eax, ESP_OFF(esp)
movl ebp, EBP_OFF(esp)
<font color='#997700'>@@ -82,8 +87,7 @@
</font> */
/* We save SSE here (on the task stack) because we possibly
<font color='#880000'>- * call other C-code (besides the ISR, namely _Thread_Dispatch()
- * or _ThreadProcessSignalsFromIrq()).
</font><font color='#000088'>+ * call other C-code (besides the ISR, namely _Thread_Dispatch())
</font> */
/* don't wait here; a possible exception condition will eventually be
* detected when the task resumes control and executes a FP instruction
<font color='#997700'>@@ -95,13 +99,16 @@
</font> ldmxcsr ARG_OFF(esp) /* clean-slate MXCSR */
#endif
<font color='#000088'>+ /* Do not disable any 8259 interrupts if this isn't from one */
+ cmp ecx, 16 /* is this a PIC IRQ? */
+ jge .check_stack_switch
</font>
/*
* acknowledge the interrupt
<font color='#880000'>- *
</font> */
<font color='#880000'>- movw SYM (i8259s_cache), ax /* move current i8259 interrupt mask in ax */
</font><font color='#000088'>+ movw SYM (i8259s_cache), ax /* save current i8259 interrupt mask */
</font> movl eax, MSK_OFF(esp) /* save in stack frame */
<font color='#000088'>+
</font> /*
* compute the new PIC mask:
*
<font color='#997700'>@@ -129,11 +136,17 @@
</font> * Now switch stacks if necessary
*/
<font color='#000088'>+PUBLIC (ISR_STOP)
+ISR_STOP:
</font> .check_stack_switch:
movl esp, ebp /* ebp = previous stack pointer */
<font color='#880000'>- cmpl $0, SYM (_ISR_Nest_level) /* is this the outermost interrupt? */
</font><font color='#000088'>+
+ movl $SYM(rtems_per_cpu_info), ebx
+
+ /* is this the outermost interrupt? */
+ cmpl $0, PER_CPU_ISR_NEST_LEVEL(ebx)
</font> jne nested /* No, then continue */
<font color='#880000'>- movl SYM (_CPU_Interrupt_stack_high), esp
</font><font color='#000088'>+ movl PER_CPU_INTERRUPT_STACK_HIGH(ebx), esp
</font>
/*
* We want to insure that the old stack pointer is in ebp
<font color='#997700'>@@ -142,7 +155,7 @@
</font> */
nested:
<font color='#880000'>- incl SYM (_ISR_Nest_level) /* one nest level deeper */
</font><font color='#000088'>+ incl PER_CPU_ISR_NEST_LEVEL(ebx) /* one nest level deeper */
</font> incl SYM (_Thread_Dispatch_disable_level) /* disable multitasking */
/*
<font color='#997700'>@@ -151,7 +164,7 @@
</font> */
sti
<font color='#880000'>- /*
</font><font color='#000088'>+ /*
</font> * ECX is preloaded with the vector number; store as arg
* on top of stack. Note that _CPU_Interrupt_stack_high
* was adjusted in _CPU_Interrupt_stack_setup() (score/rtems/cpu.h)
<font color='#997700'>@@ -166,6 +179,8 @@
</font> */
cli
<font color='#000088'>+ movl ARG_OFF(esp), ecx /* grab vector arg from stack */
+
</font> /*
* Restore stack. This moves back to the task stack
* when all interrupts are unnested.
<font color='#997700'>@@ -175,13 +190,18 @@
</font> /*
* restore the original i8259 masks
*/
<font color='#000088'>+ /* Do not touch 8259 interrupts if this isn't from one */
+ cmp ecx, 16 /* is this a PIC IRQ? */
+ jge .dont_restore_i8259
+
</font> movl MSK_OFF(esp), eax
movw ax, SYM (i8259s_cache)
outb $PIC_MASTER_IMR_IO_PORT
movb ah, al
outb $PIC_SLAVE_IMR_IO_PORT
<font color='#880000'>- decl SYM (_ISR_Nest_level) /* one less ISR nest level */
</font><font color='#000088'>+.dont_restore_i8259:
+ decl PER_CPU_ISR_NEST_LEVEL(ebx) /* one less ISR nest level */
</font> /* If interrupts are nested, */
/* then dispatching is disabled */
<font color='#997700'>@@ -190,26 +210,10 @@
</font> /* Is dispatch disabled */
jne .exit /* Yes, then exit */
<font color='#880000'>- cmpb $0, SYM (_Context_Switch_necessary)
</font><font color='#000088'>+ cmpb $0, PER_CPU_DISPATCH_NEEDED(ebx)
</font> /* Is task switch necessary? */
jne .schedule /* Yes, then call the scheduler */
<font color='#880000'>-
- cmpb $0, SYM (_ISR_Signals_to_thread_executing)
- /* signals sent to Run_thread */
- /* while in interrupt handler? */
- je .exit /* No, exit */
-
-.bframe:
- movb $0, SYM (_ISR_Signals_to_thread_executing)
- /*
- * This code is the less critical path. In order to have a single
- * Thread Context, we take the same frame than the one pushed on
- * exceptions. This makes sense because Signal is a software
- * exception.
- */
- call _ThreadProcessSignalsFromIrq
-
- jmp .exit
</font><font color='#000088'>+ jmp .exit /* No, exit */
</font>
.schedule:
/*
<font color='#997700'>@@ -229,10 +233,12 @@
</font> fxrstor SSE_OFF(esp)
#endif
<font color='#880000'>- /* restore ebp and original esp */
- addl $EBP_OFF, esp
</font><font color='#000088'>+ /* restore ebx, ebp and original esp */
+ addl $EBX_OFF, esp
+ popl ebx
</font> popl ebp
popl esp
<font color='#000088'>+
</font> /*
* BEGINNING OF DE-ESTABLISH SEGMENTS
*
<font color='#997700'>@@ -277,6 +283,7 @@
</font> DISTINCT_INTERRUPT_ENTRY(13)
DISTINCT_INTERRUPT_ENTRY(14)
DISTINCT_INTERRUPT_ENTRY(15)
<font color='#000088'>+DISTINCT_INTERRUPT_ENTRY(16)
</font>
/*
* routine used to initialize the IDT by default
</pre>
<p> </p>
<a name='cs10'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>joel</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* shared/irq/exception.S: Add a per cpu data structure which contains
the information required by RTEMS for each CPU core. This
encapsulates information such as thread executing, heir, idle and
dispatch needed.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/mips/ChangeLog.diff?r1=text&tr1=1.37&r2=text&tr2=1.38&diff_format=h">M</a></td><td width='1%'>1.38</td><td width='100%'>c/src/lib/libbsp/mips/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/mips/shared/irq/exception.S.diff?r1=text&tr1=1.2&r2=text&tr2=1.3&diff_format=h">M</a></td><td width='1%'>1.3</td><td width='100%'>c/src/lib/libbsp/mips/shared/irq/exception.S</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/mips/ChangeLog:1.37 rtems/c/src/lib/libbsp/mips/ChangeLog:1.38
--- rtems/c/src/lib/libbsp/mips/ChangeLog:1.37 Thu May 13 15:51:39 2010
+++ rtems/c/src/lib/libbsp/mips/ChangeLog Mon Jun 28 19:38:20 2010
</font><font color='#997700'>@@ -1,3 +1,11 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * shared/irq/exception.S: Add a per cpu data structure which contains
+ the information required by RTEMS for each CPU core. This
+ encapsulates information such as thread executing, heir, idle and
+ dispatch needed.
+
</font> 2010-05-13 Joel Sherrill <joel.sherrill@oarcorp.com>
* shared/liblnk/lnklib.S, shared/liblnk/pmon.S, shared/liblnk/regs.h,
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/mips/shared/irq/exception.S:1.2 rtems/c/src/lib/libbsp/mips/shared/irq/exception.S:1.3
--- rtems/c/src/lib/libbsp/mips/shared/irq/exception.S:1.2 Thu May 13 14:22:46 2010
+++ rtems/c/src/lib/libbsp/mips/shared/irq/exception.S Mon Jun 28 19:38:20 2010
</font><font color='#997700'>@@ -35,6 +35,7 @@
</font>
#include <bspopts.h>
#include <rtems/asm.h>
<font color='#000088'>+#include <rtems/score/percpu.h>
</font> #include <rtems/mips/iregdef.h>
#include <rtems/mips/idtcpu.h>
#if BSP_HAS_USC320
<font color='#997700'>@@ -88,9 +89,7 @@
</font> #endif
<font color='#880000'>-EXTERN(_ISR_Nest_level, 4)
</font> EXTERN(_Thread_Dispatch_disable_level,4)
<font color='#880000'>-EXTERN(_Context_Switch_necessary,1)
</font> EXTERN(_ISR_Signals_to_thread_executing,1)
.extern _Thread_Dispatch
.extern _ISR_Vector_table
<font color='#997700'>@@ -236,10 +235,10 @@
</font> /*
* _ISR_Nest_level++;
*/
<font color='#880000'>- lw t0,_ISR_Nest_level
</font><font color='#000088'>+ lw t0,ISR_NEST_LEVEL
</font> NOP
add t0,t0,1
<font color='#880000'>- sw t0,_ISR_Nest_level
</font><font color='#000088'>+ sw t0,ISR_NEST_LEVEL
</font> /*
* _Thread_Dispatch_disable_level++;
*/
<font color='#997700'>@@ -299,10 +298,10 @@
</font> /*
* --_ISR_Nest_level;
*/
<font color='#880000'>- lw t2,_ISR_Nest_level
</font><font color='#000088'>+ lw t2,ISR_NEST_LEVEL
</font> NOP
add t2,t2,-1
<font color='#880000'>- sw t2,_ISR_Nest_level
</font><font color='#000088'>+ sw t2,ISR_NEST_LEVEL
</font> /*
* --_Thread_Dispatch_disable_level;
*/
<font color='#997700'>@@ -324,13 +323,12 @@
</font> * restore stack
* #endif
*
<font color='#880000'>- * if ( !_Context_Switch_necessary && !_ISR_Signals_to_thread_executing )
</font><font color='#000088'>+ * if ( !_Context_Switch_necessary )
</font> * goto the label "exit interrupt (simple case)"
*/
<font color='#880000'>- lb t0,_Context_Switch_necessary
- lb t1,_ISR_Signals_to_thread_executing
</font><font color='#000088'>+ lb t0,DISPATCH_NEEDED
</font> NOP
<font color='#880000'>- or<span style="background-color: #FF0000"> </span> t0,t0,t1
</font><font color='#000088'>+ or<span style="background-color: #FF0000"> </span> t0,t0,t0
</font> beq t0,zero,_ISR_Handler_exit
NOP
</pre>
<p> </p>
<a name='cs11'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>joel</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* irq/irq.c: Add a per cpu data structure which contains the
information required by RTEMS for each CPU core. This encapsulates
information such as thread executing, heir, idle and dispatch needed.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/powerpc/score603e/ChangeLog.diff?r1=text&tr1=1.179&r2=text&tr2=1.180&diff_format=h">M</a></td><td width='1%'>1.180</td><td width='100%'>c/src/lib/libbsp/powerpc/score603e/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/powerpc/score603e/irq/irq.c.diff?r1=text&tr1=1.13&r2=text&tr2=1.14&diff_format=h">M</a></td><td width='1%'>1.14</td><td width='100%'>c/src/lib/libbsp/powerpc/score603e/irq/irq.c</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/powerpc/score603e/ChangeLog:1.179 rtems/c/src/lib/libbsp/powerpc/score603e/ChangeLog:1.180
--- rtems/c/src/lib/libbsp/powerpc/score603e/ChangeLog:1.179 Fri Apr 30 07:24:25 2010
+++ rtems/c/src/lib/libbsp/powerpc/score603e/ChangeLog Mon Jun 28 19:38:29 2010
</font><font color='#997700'>@@ -1,3 +1,10 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * irq/irq.c: Add a per cpu data structure which contains the
+ information required by RTEMS for each CPU core. This encapsulates
+ information such as thread executing, heir, idle and dispatch needed.
+
</font> 2010-04-30 Sebastian Huber <sebastian.huber@embedded-brains.de>
* include/irq-config.h: Removed file.
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/powerpc/score603e/irq/irq.c:1.13 rtems/c/src/lib/libbsp/powerpc/score603e/irq/irq.c:1.14
--- rtems/c/src/lib/libbsp/powerpc/score603e/irq/irq.c:1.13 Sun Nov 29 22:33:54 2009
+++ rtems/c/src/lib/libbsp/powerpc/score603e/irq/irq.c Mon Jun 28 19:38:29 2010
</font><font color='#997700'>@@ -472,26 +472,6 @@
</font> return 0;
}
<font color='#880000'>-void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx)
-{
-printk(" _ThreadProcessSignalsFromIrq \n");
- /*
- * Process pending signals that have not already been
- * processed by _Thread_Displatch. This happens quite
- * unfrequently : the ISR must have posted an action
- * to the current running thread.
- */
- if ( _Thread_Do_post_task_switch_extension ||
- _Thread_Executing->do_post_task_switch_extension ) {
- _Thread_Executing->do_post_task_switch_extension = false;
- _API_extensions_Run_postswitch();
- }
- /*
- * I plan to process other thread related events here.
- * This will include DEBUG session requested from keyboard...
- */
-}
-
</font> rtems_status_code bsp_interrupt_facility_initialize(void)
{
/* Install exception handler */
</pre>
<p> </p>
<a name='cs12'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>joel</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* porting/interrupts.t: Add a per cpu data structure which contains the
information required by RTEMS for each CPU core. This encapsulates
information such as thread executing, heir, idle and dispatch needed.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/doc/ChangeLog.diff?r1=text&tr1=1.282&r2=text&tr2=1.283&diff_format=h">M</a></td><td width='1%'>1.283</td><td width='100%'>doc/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/doc/porting/interrupts.t.diff?r1=text&tr1=1.9&r2=text&tr2=1.10&diff_format=h">M</a></td><td width='1%'>1.10</td><td width='100%'>doc/porting/interrupts.t</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/doc/ChangeLog:1.282 rtems/doc/ChangeLog:1.283
--- rtems/doc/ChangeLog:1.282 Thu Jun 17 13:45:30 2010
+++ rtems/doc/ChangeLog Mon Jun 28 19:39:27 2010
</font><font color='#997700'>@@ -1,3 +1,10 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * porting/interrupts.t: Add a per cpu data structure which contains the
+ information required by RTEMS for each CPU core. This encapsulates
+ information such as thread executing, heir, idle and dispatch needed.
+
</font> 2010-06-17 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, configure.ac, index.html.in, develenv/direct.t,
<font color='#006600'>diff -u rtems/doc/porting/interrupts.t:1.9 rtems/doc/porting/interrupts.t:1.10
--- rtems/doc/porting/interrupts.t:1.9 Tue Feb 26 14:06:12 2008
+++ rtems/doc/porting/interrupts.t Mon Jun 28 19:39:27 2010
</font><font color='#997700'>@@ -366,11 +366,9 @@
</font> #endif
if ( _Thread_Dispatch_disable_level )
<font color='#880000'>- _ISR_Signals_to_thread_executing = FALSE;
</font> goto the label "exit interrupt (simple case)"
<font color='#880000'>-if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing )
- _ISR_Signals_to_thread_executing = FALSE;
</font><font color='#000088'>+if ( _Context_Switch_necessary )
</font> call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
prepare to get out of interrupt
return from interrupt (maybe to _ISR_Dispatch)
</pre>
<p> </p>
<a name='cs13'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>joel</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* mpc5xx/irq/irq.c, mpc5xx/irq/irq_asm.S,
new-exceptions/bspsupport/ppc_exc.S,
new-exceptions/bspsupport/ppc_exc_asm_macros.h,
new-exceptions/bspsupport/ppc_exc_hdl.c: Add a per cpu data structure
which contains the information required by RTEMS for each CPU core.
This encapsulates information such as thread executing, heir, idle
and dispatch needed.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libcpu/powerpc/ChangeLog.diff?r1=text&tr1=1.354&r2=text&tr2=1.355&diff_format=h">M</a></td><td width='1%'>1.355</td><td width='100%'>c/src/lib/libcpu/powerpc/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c.diff?r1=text&tr1=1.8&r2=text&tr2=1.9&diff_format=h">M</a></td><td width='1%'>1.9</td><td width='100%'>c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_asm.S.diff?r1=text&tr1=1.5&r2=text&tr2=1.6&diff_format=h">M</a></td><td width='1%'>1.6</td><td width='100%'>c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_asm.S</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S.diff?r1=text&tr1=1.5&r2=text&tr2=1.6&diff_format=h">M</a></td><td width='1%'>1.6</td><td width='100%'>c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h.diff?r1=text&tr1=1.10&r2=text&tr2=1.11&diff_format=h">M</a></td><td width='1%'>1.11</td><td width='100%'>c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c.diff?r1=text&tr1=1.8&r2=text&tr2=1.9&diff_format=h">M</a></td><td width='1%'>1.9</td><td width='100%'>c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/c/src/lib/libcpu/powerpc/ChangeLog:1.354 rtems/c/src/lib/libcpu/powerpc/ChangeLog:1.355
--- rtems/c/src/lib/libcpu/powerpc/ChangeLog:1.354 Mon Jun 14 11:02:30 2010
+++ rtems/c/src/lib/libcpu/powerpc/ChangeLog Mon Jun 28 19:39:39 2010
</font><font color='#997700'>@@ -1,3 +1,14 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * mpc5xx/irq/irq.c, mpc5xx/irq/irq_asm.S,
+ new-exceptions/bspsupport/ppc_exc.S,
+ new-exceptions/bspsupport/ppc_exc_asm_macros.h,
+ new-exceptions/bspsupport/ppc_exc_hdl.c: Add a per cpu data structure
+ which contains the information required by RTEMS for each CPU core.
+ This encapsulates information such as thread executing, heir, idle
+ and dispatch needed.
+
</font> 2010-06-14 Joel Sherrill <joel.sherrilL@OARcorp.com>
* Makefile.am: Formatting.
<font color='#006600'>diff -u rtems/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c:1.8 rtems/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c:1.9
--- rtems/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c:1.8 Thu Dec 17 02:42:16 2009
+++ rtems/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c Mon Jun 28 19:39:39 2010
</font><font color='#997700'>@@ -482,22 +482,3 @@
</font> usiu.simask = ppc_cached_irq_mask;
}
}
<font color='#880000'>-
-void _ThreadProcessSignalsFromIrq (CPU_Exception_frame* ctx)
-{
- /*
- * Process pending signals that have not already been
- * processed by _Thread_Displatch. This happens quite
- * unfrequently : the ISR must have posted an action
- * to the current running thread.
- */
- if ( _Thread_Do_post_task_switch_extension ||
- _Thread_Executing->do_post_task_switch_extension ) {
- _Thread_Executing->do_post_task_switch_extension = false;
- _API_extensions_Run_postswitch();
- }
- /*
- * I plan to process other thread related events here.
- * This will include DEBUG session requested from keyboard...
- */
-}
</font>
<font color='#006600'>diff -u rtems/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_asm.S:1.5 rtems/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_asm.S:1.6
--- rtems/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_asm.S:1.5 Sun Nov 29 23:07:53 2009
+++ rtems/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_asm.S Mon Jun 28 19:39:39 2010
</font><font color='#997700'>@@ -26,6 +26,7 @@
</font>
#include <rtems/asm.h>
#include <rtems/score/cpu.h>
<font color='#000088'>+#include <rtems/score/percpu.h>
</font> #include <libcpu/vectors.h>
#include <libcpu/raw_exception.h>
<font color='#997700'>@@ -118,8 +119,8 @@
</font> /*
* Retrieve current nesting level from _ISR_Nest_level
*/
<font color='#880000'>- lis r7, _ISR_Nest_level@ha
- lwz r3, _ISR_Nest_level@l(r7)
</font><font color='#000088'>+ lis r7, ISR_NEST_LEVEL@ha
+ lwz r3, ISR_NEST_LEVEL@l(r7)
</font>
/*
* Check if stack switch is necessary
<font color='#997700'>@@ -141,7 +142,7 @@
</font> lwz r6, _Thread_Dispatch_disable_level@l(r15)
/* store new nesting level in _ISR_Nest_level */
<font color='#880000'>- stw r3, _ISR_Nest_level@l(r7)
</font><font color='#000088'>+ stw r3, ISR_NEST_LEVEL@l(r7)
</font>
addi r6, r6, 1
<font color='#997700'>@@ -170,8 +171,8 @@
</font> * value as an easy exit condition because if interrupt nesting level > 1
* then _Thread_Dispatch_disable_level > 1
*/
<font color='#880000'>- lis r7, _ISR_Nest_level@ha
- lwz r4, _ISR_Nest_level@l(r7)
</font><font color='#000088'>+ lis r7, ISR_NEST_LEVEL@ha
+ lwz r4, ISR_NEST_LEVEL@l(r7)
</font>
/*
* start decrementing _Thread_Dispatch_disable_level
<font color='#997700'>@@ -181,7 +182,7 @@
</font> addi r4, r4, -1 /* Continue decrementing nesting level */
addi r3, r3, -1 /* Continue decrementing _Thread_Dispatch_disable_level */
<font color='#880000'>- stw r4, _ISR_Nest_level@l(r7) /* End decrementing nesting level */
</font><font color='#000088'>+ stw r4, ISR_NEST_LEVEL@l(r7) /* End decrementing nesting level */
</font> stw r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */
cmpwi r3, 0
<font color='#997700'>@@ -199,21 +200,13 @@
</font> * Interrupt are still disabled. Time to check if scheduler request to
* do something with the current thread...
*/
<font color='#880000'>- addis r4, 0, _Context_Switch_necessary@ha
- lbz r5, _Context_Switch_necessary@l(r4)
</font><font color='#000088'>+ addis r4, 0, DISPATCH_NEEDED@ha
+ lbz r5, DISPATCH_NEEDED@l(r4)
</font> cmpwi r5, 0
<font color='#880000'>- bne switch
-
- addis r6, 0, _ISR_Signals_to_thread_executing@ha
- lbz r7, _ISR_Signals_to_thread_executing@l(r6)
- cmpwi r7, 0
- li r8, 0
</font> beq easy_exit
<font color='#880000'>- stb r8, _ISR_Signals_to_thread_executing@l(r6)
-
</font> /*
<font color='#880000'>- * going to call _ThreadProcessSignalsFromIrq
</font><font color='#000088'>+ * going to call _Thread_Dispatch
</font> * Push a complete exception like frame...
*/
stmw r16, GPR16_OFFSET(r1)
<font color='#997700'>@@ -232,7 +225,7 @@
</font> /*
* Call High Level signal handling code
*/
<font color='#880000'>- bl _ThreadProcessSignalsFromIrq
</font><font color='#000088'>+ bl _Thread_Dispatch
</font>
/*
* start restoring exception like frame
<font color='#997700'>@@ -272,9 +265,6 @@
</font> rfi
<font color='#880000'>-switch:
- bl SYM (_Thread_Dispatch)
-
</font> easy_exit:
/*
* start restoring interrupt frame
<font color='#006600'>diff -u rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S:1.5 rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S:1.6
--- rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S:1.5 Fri Oct 23 02:32:46 2009
+++ rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S Mon Jun 28 19:39:39 2010
</font><font color='#997700'>@@ -13,6 +13,10 @@
</font> */
/* Load macro definitions */
<font color='#000088'>+#include <rtems/asm.h>
+#include <rtems/system.h>
+#include <rtems/score/percpu.h>
+
</font> #include "ppc_exc_asm_macros.h"
/******************************************************/
<font color='#006600'>diff -u rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h:1.10 rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h:1.11
--- rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h:1.10 Tue Dec 1 19:41:57 2009
+++ rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h Mon Jun 28 19:39:39 2010
</font><font color='#997700'>@@ -422,11 +422,12 @@
</font> */
/* Increment ISR nest level and thread dispatch disable level */
<font color='#880000'>- lwz SCRATCH_REGISTER_0, _ISR_Nest_level@sdarel(r13)
</font><font color='#000088'>+ lis SCRATCH_REGISTER_2, ISR_NEST_LEVEL@ha
+ lwz SCRATCH_REGISTER_0, ISR_NEST_LEVEL@l(SCRATCH_REGISTER_2)
</font> lwz SCRATCH_REGISTER_1, _Thread_Dispatch_disable_level@sdarel(r13)
addi SCRATCH_REGISTER_0, SCRATCH_REGISTER_0, 1
addi SCRATCH_REGISTER_1, SCRATCH_REGISTER_1, 1
<font color='#880000'>- stw SCRATCH_REGISTER_0, _ISR_Nest_level@sdarel(r13)
</font><font color='#000088'>+ stw SCRATCH_REGISTER_0, ISR_NEST_LEVEL@l(SCRATCH_REGISTER_2)
</font> stw SCRATCH_REGISTER_1, _Thread_Dispatch_disable_level@sdarel(r13)
/*
<font color='#997700'>@@ -612,11 +613,12 @@
</font> */
/* Decrement ISR nest level and thread dispatch disable level */
<font color='#880000'>- lwz SCRATCH_REGISTER_0, _ISR_Nest_level@sdarel(r13)
</font><font color='#000088'>+ lis SCRATCH_REGISTER_2, ISR_NEST_LEVEL@ha
+ lwz SCRATCH_REGISTER_0, ISR_NEST_LEVEL@l(SCRATCH_REGISTER_2)
</font> lwz SCRATCH_REGISTER_1, _Thread_Dispatch_disable_level@sdarel(r13)
subi SCRATCH_REGISTER_0, SCRATCH_REGISTER_0, 1
subic. SCRATCH_REGISTER_1, SCRATCH_REGISTER_1, 1
<font color='#880000'>- stw SCRATCH_REGISTER_0, _ISR_Nest_level@sdarel(r13)
</font><font color='#000088'>+ stw SCRATCH_REGISTER_0, ISR_NEST_LEVEL@l(SCRATCH_REGISTER_2)
</font> stw SCRATCH_REGISTER_1, _Thread_Dispatch_disable_level@sdarel(r13)
/* Branch to skip thread dispatching */
<font color='#006600'>diff -u rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c:1.8 rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c:1.9
--- rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c:1.8 Fri Oct 23 02:32:46 2009
+++ rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c Mon Jun 28 19:39:39 2010
</font><font color='#997700'>@@ -86,18 +86,5 @@
</font> * interrupts around the execution of _Thread_Dispatch();
*/
_Thread_Dispatch();
<font color='#880000'>- } else if ( _ISR_Signals_to_thread_executing ) {
- _ISR_Signals_to_thread_executing = 0;
- /*
- * Process pending signals that have not already been
- * processed by _Thread_Dispatch. This happens quite
- * unfrequently : the ISR must have posted an action
- * to the current running thread.
- */
- if ( _Thread_Do_post_task_switch_extension ||
- _Thread_Executing->do_post_task_switch_extension ) {
- _Thread_Executing->do_post_task_switch_extension = false;
- _API_extensions_Run_postswitch();
- }
</font> }
}
</pre>
<p> </p>
<a name='cs14'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>joel</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* sh7032/score/cpu_asm.c, sh7045/score/cpu_asm.c,
sh7750/score/cpu_asm.c, shgdb/score/cpu_asm.c: Add a per cpu data
structure which contains the information required by RTEMS for each
CPU core. This encapsulates information such as thread executing,
heir, idle and dispatch needed.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libcpu/sh/ChangeLog.diff?r1=text&tr1=1.61&r2=text&tr2=1.62&diff_format=h">M</a></td><td width='1%'>1.62</td><td width='100%'>c/src/lib/libcpu/sh/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c.diff?r1=text&tr1=1.15&r2=text&tr2=1.16&diff_format=h">M</a></td><td width='1%'>1.16</td><td width='100%'>c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c.diff?r1=text&tr1=1.17&r2=text&tr2=1.18&diff_format=h">M</a></td><td width='1%'>1.18</td><td width='100%'>c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libcpu/sh/sh7750/score/cpu_asm.c.diff?r1=text&tr1=1.13&r2=text&tr2=1.14&diff_format=h">M</a></td><td width='1%'>1.14</td><td width='100%'>c/src/lib/libcpu/sh/sh7750/score/cpu_asm.c</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libcpu/sh/shgdb/score/cpu_asm.c.diff?r1=text&tr1=1.2&r2=text&tr2=1.3&diff_format=h">M</a></td><td width='1%'>1.3</td><td width='100%'>c/src/lib/libcpu/sh/shgdb/score/cpu_asm.c</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/c/src/lib/libcpu/sh/ChangeLog:1.61 rtems/c/src/lib/libcpu/sh/ChangeLog:1.62
--- rtems/c/src/lib/libcpu/sh/ChangeLog:1.61 Fri May 21 11:33:00 2010
+++ rtems/c/src/lib/libcpu/sh/ChangeLog Mon Jun 28 19:39:41 2010
</font><font color='#997700'>@@ -1,3 +1,12 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * sh7032/score/cpu_asm.c, sh7045/score/cpu_asm.c,
+ sh7750/score/cpu_asm.c, shgdb/score/cpu_asm.c: Add a per cpu data
+ structure which contains the information required by RTEMS for each
+ CPU core. This encapsulates information such as thread executing,
+ heir, idle and dispatch needed.
+
</font> 2010-05-21 Joel Sherrill <joel.sherrill@oarcorp.com>
* sh7032/score/cpu_asm.c, sh7045/score/cpu_asm.c,
<font color='#006600'>diff -u rtems/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c:1.15 rtems/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c:1.16
--- rtems/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c:1.15 Fri May 21 11:33:00 2010
+++ rtems/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c Mon Jun 28 19:39:41 2010
</font><font color='#997700'>@@ -173,12 +173,10 @@
</font> return;
if ( _Thread_Dispatch_disable_level ) {
<font color='#880000'>- _ISR_Signals_to_thread_executing = FALSE;
</font> return;
}
<font color='#880000'>- if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) {
- _ISR_Signals_to_thread_executing = FALSE;
</font><font color='#000088'>+ if ( _Context_Switch_necessary ) {
</font> _Thread_Dispatch();
}
}
<font color='#006600'>diff -u rtems/c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c:1.17 rtems/c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c:1.18
--- rtems/c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c:1.17 Fri May 21 11:33:00 2010
+++ rtems/c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c Mon Jun 28 19:39:41 2010
</font><font color='#997700'>@@ -175,12 +175,10 @@
</font> return;
if ( _Thread_Dispatch_disable_level ) {
<font color='#880000'>- _ISR_Signals_to_thread_executing = FALSE;
</font> return;
}
<font color='#880000'>- if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) {
- _ISR_Signals_to_thread_executing = FALSE;
</font><font color='#000088'>+ if ( _Context_Switch_necessary ) {
</font> _Thread_Dispatch();
}
}
<font color='#006600'>diff -u rtems/c/src/lib/libcpu/sh/sh7750/score/cpu_asm.c:1.13 rtems/c/src/lib/libcpu/sh/sh7750/score/cpu_asm.c:1.14
--- rtems/c/src/lib/libcpu/sh/sh7750/score/cpu_asm.c:1.13 Fri May 21 11:33:00 2010
+++ rtems/c/src/lib/libcpu/sh/sh7750/score/cpu_asm.c Mon Jun 28 19:39:41 2010
</font><font color='#997700'>@@ -98,12 +98,10 @@
</font> return;
if ( _Thread_Dispatch_disable_level ) {
<font color='#880000'>- _ISR_Signals_to_thread_executing = FALSE;
</font> return;
}
<font color='#880000'>- if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) {
- _ISR_Signals_to_thread_executing = FALSE;
</font><font color='#000088'>+ if ( _Context_Switch_necessary ) {
</font> _Thread_Dispatch();
}
}
<font color='#006600'>diff -u rtems/c/src/lib/libcpu/sh/shgdb/score/cpu_asm.c:1.2 rtems/c/src/lib/libcpu/sh/shgdb/score/cpu_asm.c:1.3
--- rtems/c/src/lib/libcpu/sh/shgdb/score/cpu_asm.c:1.2 Fri May 21 11:33:00 2010
+++ rtems/c/src/lib/libcpu/sh/shgdb/score/cpu_asm.c Mon Jun 28 19:39:41 2010
</font><font color='#997700'>@@ -72,12 +72,10 @@
</font> return;
if ( _Thread_Dispatch_disable_level ) {
<font color='#880000'>- _ISR_Signals_to_thread_executing = FALSE;
</font> return;
}
<font color='#880000'>- if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) {
- _ISR_Signals_to_thread_executing = FALSE;
</font><font color='#000088'>+ if ( _Context_Switch_necessary ) {
</font> _Thread_Dispatch();
}
}
</pre>
<p> </p>
<a name='cs15'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>joel</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* shared/score/interrupt.S: Add a per cpu data structure which contains
the information required by RTEMS for each CPU core. This
encapsulates information such as thread executing, heir, idle and
dispatch needed.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libcpu/sparc64/ChangeLog.diff?r1=text&tr1=1.1&r2=text&tr2=1.2&diff_format=h">M</a></td><td width='1%'>1.2</td><td width='100%'>c/src/lib/libcpu/sparc64/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libcpu/sparc64/shared/score/interrupt.S.diff?r1=text&tr1=1.1&r2=text&tr2=1.2&diff_format=h">M</a></td><td width='1%'>1.2</td><td width='100%'>c/src/lib/libcpu/sparc64/shared/score/interrupt.S</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/c/src/lib/libcpu/sparc64/ChangeLog:1.1 rtems/c/src/lib/libcpu/sparc64/ChangeLog:1.2
--- rtems/c/src/lib/libcpu/sparc64/ChangeLog:1.1 Thu Jun 17 11:16:25 2010
+++ rtems/c/src/lib/libcpu/sparc64/ChangeLog Mon Jun 28 19:39:44 2010
</font><font color='#997700'>@@ -1,3 +1,11 @@
</font><font color='#000088'>+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * shared/score/interrupt.S: Add a per cpu data structure which contains
+ the information required by RTEMS for each CPU core. This
+ encapsulates information such as thread executing, heir, idle and
+ dispatch needed.
+
</font> 2010-06-17 Joel Sherrill <joel.sherrill@oarcorp.com>
* .cvsignore, ChangeLog, Makefile.am, configure.ac, preinstall.am,
<font color='#006600'>diff -u rtems/c/src/lib/libcpu/sparc64/shared/score/interrupt.S:1.1 rtems/c/src/lib/libcpu/sparc64/shared/score/interrupt.S:1.2
--- rtems/c/src/lib/libcpu/sparc64/shared/score/interrupt.S:1.1 Thu Jun 17 11:16:25 2010
+++ rtems/c/src/lib/libcpu/sparc64/shared/score/interrupt.S Mon Jun 28 19:39:44 2010
</font><font color='#997700'>@@ -26,6 +26,7 @@
</font> */
#include <rtems/asm.h>
<font color='#000088'>+#include <rtems/score/percpu.h>
</font>
/*<span style="background-color: #FF0000"> </span>
<font color='#997700'>@@ -178,7 +179,7 @@
</font>
setx SYM(_Thread_Dispatch_disable_level), %o5, %g3
lduw [%g3], %g5
<font color='#880000'>- setx SYM(_ISR_Nest_level), %o5, %g6
</font><font color='#000088'>+ setx ISR_NEST_LEVEL, %o5, %g6
</font> lduw [%g6], %g4
add %g5, 1, %g5
<font color='#997700'>@@ -345,7 +346,7 @@
</font> bnz simple_return ! Yes, then do a "simple" exit
nop
<font color='#880000'>- setx SYM(_Context_Switch_necessary), %o5, %g7
</font><font color='#000088'>+ setx DISPATCH_NEEDED, %o5, %g7
</font>
/*
<font color='#997700'>@@ -360,21 +361,6 @@
</font> nop
/*
<font color='#880000'>- * Finally, check to see if signals were sent to the currently
- * executing task. If so, we need to invoke the interrupt dispatcher.
- */
- setx SYM(_ISR_Signals_to_thread_executing), %o5, %g5
- ldub [%g5], %o5
-
- orcc %o5, %g0, %g0 ! Were signals sent to the currently
- ! executing thread?
- bz simple_return ! yes, then invoke the dispatcher
- ! use the delay slot to clear the signals
- ! to the currently executing task flag
- stb %g0, [%g5]
-
-
- /*
</font> * Invoke interrupt dispatcher.
*/
PUBLIC(_ISR_Dispatch)
<font color='#997700'>@@ -408,31 +394,15 @@
</font> * _Thread_Dispatch before leaving this ISR Dispatch context.
*/
<font color='#880000'>- setx SYM(_Context_Switch_necessary), %o5, %o1
</font><font color='#000088'>+ setx DISPATCH_NEEDED, %o5, %o1
</font> ldub [%o1], %o2
<font color='#880000'>- ! NOTE: Use some of delay slot to start loading this
- setx SYM(_ISR_Signals_to_thread_executing), %o5, %o1
- ldub [%o1], %o3
-
</font> orcc %o2, %g0, %g0 ! Is thread switch necessary?
<font color='#880000'>- bnz dispatchAgain ! yes, then invoke the dispatcher AGAIN
- ! NOTE: Use the delay slot to catch the orcc below
-
- /*
- * Finally, check to see if signals were sent to the currently
- * executing task. If so, we need to invoke the interrupt dispatcher.
- */
-
- ! NOTE: Delay slots above were used to perform the load AND
- ! this orcc falls into the delay slot for bnz above
- orcc %o3, %g0, %g0 ! Were signals sent to the currently
- ! executing thread?
</font> bz allow_nest_again ! No, then clear out and return
nop
! Yes, then invoke the dispatcher
<font color='#880000'>- dispatchAgain:
</font><font color='#000088'>+dispatchAgain:
</font> mov 3, %g4 ! syscall (enable interrupts)
ta 0 ! syscall (enable interrupts)
ba isr_dispatch
</pre>
<p> </p>
<a name='cs16'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>joel</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* spsize/size.c: Add a per cpu data structure which contains the
information required by RTEMS for each CPU core. This encapsulates
information such as thread executing, heir, idle and dispatch needed.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/testsuites/sptests/ChangeLog.diff?r1=text&tr1=1.388&r2=text&tr2=1.389&diff_format=h">M</a></td><td width='1%'>1.389</td><td width='100%'>testsuites/sptests/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/testsuites/sptests/spsize/size.c.diff?r1=text&tr1=1.64&r2=text&tr2=1.65&diff_format=h">M</a></td><td width='1%'>1.65</td><td width='100%'>testsuites/sptests/spsize/size.c</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/testsuites/sptests/ChangeLog:1.388 rtems/testsuites/sptests/ChangeLog:1.389
--- rtems/testsuites/sptests/ChangeLog:1.388 Mon Jun 28 09:28:40 2010
+++ rtems/testsuites/sptests/ChangeLog Mon Jun 28 19:40:29 2010
</font><font color='#997700'>@@ -1,5 +1,12 @@
</font> 2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
<font color='#000088'>+ PR 1573/cpukit
+ * spsize/size.c: Add a per cpu data structure which contains the
+ information required by RTEMS for each CPU core. This encapsulates
+ information such as thread executing, heir, idle and dispatch needed.
+
+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
</font> * sp69/Makefile.am: Really needs spin.c
2010-06-26 Bharath Suri <bharath.s.jois@gmail.com>
<font color='#006600'>diff -u rtems/testsuites/sptests/spsize/size.c:1.64 rtems/testsuites/sptests/spsize/size.c:1.65
--- rtems/testsuites/sptests/spsize/size.c:1.64 Tue Oct 27 02:27:43 2009
+++ rtems/testsuites/sptests/spsize/size.c Mon Jun 28 19:40:29 2010
</font><font color='#997700'>@@ -263,7 +263,6 @@
</font> #if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
(sizeof _ISR_Vector_table) +
#endif
<font color='#880000'>- (sizeof _ISR_Signals_to_thread_executing) +
</font>
/*message.h*/ (sizeof _Message_queue_Information) +
<font color='#997700'>@@ -310,6 +309,8 @@
</font> /*partmp.h*/ 0 +
#endif
<font color='#000088'>+/*percpu.h*/ (sizeof _Per_CPU_Information) +
+
</font> /*priority.h*/ (sizeof _Priority_Major_bit_map) +
(sizeof _Priority_Bit_map) +
<font color='#997700'>@@ -352,7 +353,6 @@
</font>
/*thread.h*/ (sizeof _Thread_BSP_context) +
(sizeof _Thread_Dispatch_disable_level) +
<font color='#880000'>- (sizeof _Thread_Do_post_task_switch_extension) +
</font> (sizeof _Thread_Maximum_extensions) +
(sizeof _Thread_Ticks_per_timeslice) +
(sizeof _Thread_Ready_chain) +
<font color='#997700'>@@ -362,7 +362,6 @@
</font> (sizeof _Thread_Allocated_fp) +
#endif
(sizeof _Thread_Internal_information) +
<font color='#880000'>- (sizeof _Thread_Idle) +
</font>
#if defined(RTEMS_MULTIPROCESSING)
/*threadmp.h*/ (sizeof _Thread_MP_Active_proxies) +
</pre>
<p> </p>
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