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<title>change log for rtems (2011-07-18)</title>
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<body text='#000000' bgcolor='#ffffff'>
<a name='cs1'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>strauman</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2011-07-18 Till Straumann <strauman@slac.stanford.edu>
* motorola_powerpc/make/custom/qemuprep-altivec.cfg,
motorola_powerpc/Makefile.am: added altivec-enabled variant.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/powerpc/motorola_powerpc/ChangeLog.diff?r1=text&tr1=1.163&r2=text&tr2=1.164&diff_format=h">M</a></td><td width='1%'>1.164</td><td width='100%'>c/src/lib/libbsp/powerpc/motorola_powerpc/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am.diff?r1=text&tr1=1.61&r2=text&tr2=1.62&diff_format=h">M</a></td><td width='1%'>1.62</td><td width='100%'>c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/powerpc/motorola_powerpc/make/custom/qemuprep-altivec.cfg?rev=1.1&content-type=text/vnd.viewcvs-markup">A</a></td><td width='1%'><font color="#000088">1.1</font></td><td width='100%'><font color="#000088">c/src/lib/libbsp/powerpc/motorola_powerpc/make/custom/qemuprep-altivec.cfg</font></td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/powerpc/motorola_powerpc/ChangeLog:1.163 rtems/c/src/lib/libbsp/powerpc/motorola_powerpc/ChangeLog:1.164
--- rtems/c/src/lib/libbsp/powerpc/motorola_powerpc/ChangeLog:1.163 Fri Jul 15 20:29:45 2011
+++ rtems/c/src/lib/libbsp/powerpc/motorola_powerpc/ChangeLog Mon Jul 18 11:32:29 2011
</font><font color='#997700'>@@ -1,3 +1,8 @@
</font><font color='#000088'>+2011-07-18 Till Straumann <strauman@slac.stanford.edu>
+
+ * motorola_powerpc/make/custom/qemuprep-altivec.cfg,
+ motorola_powerpc/Makefile.am: added altivec-enabled variant.
+
</font> 2011-07-15 Till Straumann <strauman@slac.stanford.edu>
* motorola_powerpc/Makefile.am,
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am:1.61 rtems/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am:1.62
--- rtems/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am:1.61 Fri Jul 15 20:29:45 2011
+++ rtems/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am Mon Jul 18 11:32:29 2011
</font><font color='#997700'>@@ -156,7 +156,8 @@
</font> ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
<font color='#880000'>- ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel
</font><font color='#000088'>+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/altivec.rel
</font>
if QEMU
libbsp_a_LIBADD+=ne2000.rel
<font color='#006600'>diff -u /dev/null rtems/c/src/lib/libbsp/powerpc/motorola_powerpc/make/custom/qemuprep-altivec.cfg:1.1
--- /dev/null Mon Jul 18 12:10:51 2011
+++ rtems/c/src/lib/libbsp/powerpc/motorola_powerpc/make/custom/qemuprep-altivec.cfg Mon Jul 18 11:32:29 2011
</font><font color='#997700'>@@ -0,0 +1,36 @@
</font><font color='#000088'>+#
+# Config file for the PowerPC 604 based mvme2307
+#
+# $Id$
+#
+
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU=powerpc
+RTEMS_CPU_MODEL=mpc7400
+
+# This contains the compiler options necessary to select the CPU model
+# and (hopefully) optimize for it.<span style="background-color: #FF0000"> </span>
+#
+CPU_CFLAGS = -mcpu=7400 -mmultiple -mstring -mstrict-align -D__ppc_generic
+
+# optimize flag: typically -O2
+CFLAGS_OPTIMIZE_V = -O2 -g
+
+ifdef PURE_BINARY
+define bsp-post-link
+ $(default-bsp-post-link)
+<span style="background-color: #FF0000"> </span> $(OBJCOPY) -O binary -R .comment -S $(basename $@).exe $(basename $@)$(DOWNEXT)
+endef
+else
+define bsp-post-link
+ $(default-bsp-post-link)
+<span style="background-color: #FF0000"> </span> $(OBJCOPY) -O binary -R .comment -S $(basename $@).exe rtems
+<span style="background-color: #FF0000"> </span> gzip -vf9 rtems
+<span style="background-color: #FF0000"> </span> $(LD) -o $(basename $@)$(DOWNEXT) $(PROJECT_RELEASE)/lib/bootloader.o \
+ --just-symbols=$(basename $@).exe \
+<span style="background-color: #FF0000"> </span> -b binary rtems.gz -T $(PROJECT_RELEASE)/lib/ppcboot.lds \
+<span style="background-color: #FF0000"> </span> -Map $(basename $@).map && chmod 755 $@
+<span style="background-color: #FF0000"> </span> rm -f rtems.gz
+endef
+endif
</font></pre>
<p> </p>
<a name='cs2'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>strauman</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2011-07-18 Till Straumann <strauman@slac.stanford.edu>
* shared/startup/ppc_idle.c: Need to enable HID0[NAP] on
a 7400/7455/7457 for MSR[POW] to have an effect.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/powerpc/ChangeLog.diff?r1=text&tr1=1.256&r2=text&tr2=1.257&diff_format=h">M</a></td><td width='1%'>1.257</td><td width='100%'>c/src/lib/libbsp/powerpc/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/powerpc/shared/startup/ppc_idle.c.diff?r1=text&tr1=1.1&r2=text&tr2=1.2&diff_format=h">M</a></td><td width='1%'>1.2</td><td width='100%'>c/src/lib/libbsp/powerpc/shared/startup/ppc_idle.c</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.256 rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.257
--- rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.256 Fri Jul 15 20:29:04 2011
+++ rtems/c/src/lib/libbsp/powerpc/ChangeLog Mon Jul 18 11:33:39 2011
</font><font color='#997700'>@@ -1,3 +1,8 @@
</font><font color='#000088'>+2011-07-18 Till Straumann <strauman@slac.stanford.edu>
+
+ * shared/startup/ppc_idle.c: Need to enable HID0[NAP] on
+ a 7400/7455/7457 for MSR[POW] to have an effect.
+
</font> 2011-07-15 Till Straumann <strauman@slac.stanford.edu>
* shared/bootloader/mm.c, shared/bootloader/pci.c,
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/powerpc/shared/startup/ppc_idle.c:1.1 rtems/c/src/lib/libbsp/powerpc/shared/startup/ppc_idle.c:1.2
--- rtems/c/src/lib/libbsp/powerpc/shared/startup/ppc_idle.c:1.1 Fri Jul 15 20:18:25 2011
+++ rtems/c/src/lib/libbsp/powerpc/shared/startup/ppc_idle.c Mon Jul 18 11:33:39 2011
</font><font color='#997700'>@@ -67,20 +67,41 @@
</font> */
#include <rtems/powerpc/registers.h>
<font color='#000088'>+#include <libcpu/cpuIdent.h>
+#include <libcpu/spr.h>
+
+SPR_RW(HID0)
</font>
void *
bsp_ppc_idle_task_body(uintptr_t ignored)
{
uint32_t msr;
<font color='#880000'>- _CPU_MSR_GET(msr);
- msr |= MSR_POW;
- asm volatile(
- "1: sync \n"
- " mtmsr %0 \n"
- " isync \n"
- " b 1b \n"
- ::"r"(msr)
- );
</font><font color='#000088'>+
+ switch ( current_ppc_cpu ) {
+
+ case PPC_7400:
+ case PPC_7455:
+ case PPC_7457:
+ /* Must enable NAP mode in HID0 for MSR_POW to work */
+ _write_HID0( _read_HID0() | HID0_NAP );
+ break;
+
+ default:
+ break;
+ }
+
+ for ( ;; ) {
+ _CPU_MSR_GET(msr);
+ msr |= MSR_POW;
+ asm volatile(
+ "1: sync \n"
+ " mtmsr %0 \n"
+ " isync \n"
+ " b 1b \n"
+ ::"r"(msr)
+ );
+ }
+
</font> return 0;
}
</pre>
<p> </p>
<a name='cs3'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>strauman</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2011-07-18 Till Straumann <strauman@slac.stanford.edu>
* shared/startup/bspstart.c: Select console *before* doing
any potential printk() (e.g., panic).
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/powerpc/ChangeLog.diff?r1=text&tr1=1.257&r2=text&tr2=1.258&diff_format=h">M</a></td><td width='1%'>1.258</td><td width='100%'>c/src/lib/libbsp/powerpc/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c.diff?r1=text&tr1=1.56&r2=text&tr2=1.57&diff_format=h">M</a></td><td width='1%'>1.57</td><td width='100%'>c/src/lib/libbsp/powerpc/shared/startup/bspstart.c</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.257 rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.258
--- rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.257 Mon Jul 18 11:33:39 2011
+++ rtems/c/src/lib/libbsp/powerpc/ChangeLog Mon Jul 18 11:35:08 2011
</font><font color='#997700'>@@ -1,5 +1,10 @@
</font> 2011-07-18 Till Straumann <strauman@slac.stanford.edu>
<font color='#000088'>+ * shared/startup/bspstart.c: Select console *before* doing
+ any potential printk() (e.g., panic).
+
+2011-07-18 Till Straumann <strauman@slac.stanford.edu>
+
</font> * shared/startup/ppc_idle.c: Need to enable HID0[NAP] on
a 7400/7455/7457 for MSR[POW] to have an effect.
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c:1.56 rtems/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c:1.57
--- rtems/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c:1.56 Fri Jul 15 20:29:05 2011
+++ rtems/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c Mon Jul 18 11:35:08 2011
</font><font color='#997700'>@@ -196,6 +196,22 @@
</font> */
L1_caches_enables();
<font color='#000088'>+ select_console(CONSOLE_LOG);
+
+ /*
+ * We check that the keyboard is present and immediately
+ * select the serial console if not.
+ */
+#if defined(BSP_KBD_IOBASE)
+ { int err;
+ err = kbdreset();
+ if (err) select_console(CONSOLE_SERIAL);
+ }
+#else
+ select_console(CONSOLE_SERIAL);
+#endif
+
+
</font> #if !defined(mvme2100)
/*
* Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for
<font color='#997700'>@@ -227,21 +243,6 @@
</font> BSP_panic("cannot initialize exceptions");
}
<font color='#880000'>- select_console(CONSOLE_LOG);
-
- /*
- * We check that the keyboard is present and immediately
- * select the serial console if not.
- */
-#if defined(BSP_KBD_IOBASE)
- { int err;
- err = kbdreset();
- if (err) select_console(CONSOLE_SERIAL);
- }
-#else
- select_console(CONSOLE_SERIAL);
-#endif
-
</font> boardManufacturer = checkPrepBoardType(&residualCopy);
if (boardManufacturer != PREP_Motorola) {
printk("Unsupported hardware vendor\n");
</pre>
<p> </p>
<a name='cs4'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>strauman</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2011-07-18 Till Straumann <strauman@slac.stanford.edu>
* shared/bootloader/head.S: disable USE_PPCBUG under qemu.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/powerpc/ChangeLog.diff?r1=text&tr1=1.258&r2=text&tr2=1.259&diff_format=h">M</a></td><td width='1%'>1.259</td><td width='100%'>c/src/lib/libbsp/powerpc/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/powerpc/shared/bootloader/head.S.diff?r1=text&tr1=1.10&r2=text&tr2=1.11&diff_format=h">M</a></td><td width='1%'>1.11</td><td width='100%'>c/src/lib/libbsp/powerpc/shared/bootloader/head.S</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.258 rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.259
--- rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.258 Mon Jul 18 11:35:08 2011
+++ rtems/c/src/lib/libbsp/powerpc/ChangeLog Mon Jul 18 11:37:25 2011
</font><font color='#997700'>@@ -1,5 +1,9 @@
</font> 2011-07-18 Till Straumann <strauman@slac.stanford.edu>
<font color='#000088'>+ * shared/bootloader/head.S: disable USE_PPCBUG under qemu.
+
+2011-07-18 Till Straumann <strauman@slac.stanford.edu>
+
</font> * shared/startup/bspstart.c: Select console *before* doing
any potential printk() (e.g., panic).
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/powerpc/shared/bootloader/head.S:1.10 rtems/c/src/lib/libbsp/powerpc/shared/bootloader/head.S:1.11
--- rtems/c/src/lib/libbsp/powerpc/shared/bootloader/head.S:1.10 Fri Jan 28 14:29:52 2011
+++ rtems/c/src/lib/libbsp/powerpc/shared/bootloader/head.S Mon Jul 18 11:37:25 2011
</font><font color='#997700'>@@ -18,6 +18,7 @@
</font> #include <rtems/asm.h>
#include <rtems/score/cpu.h>
#include "bootldr.h"
<font color='#000088'>+#include <bspopts.h>
</font>
#define TEST_PPCBUG_CALLS
#undef TEST_PPCBUG_CALLS
<font color='#997700'>@@ -27,7 +28,9 @@
</font> #define INVL_CACHES (HID0_DCI | HID0_ICFI)
#define ENBL_CACHES (HID0_DCE | HID0_ICE)
<font color='#000088'>+#ifndef qemu
</font> #define USE_PPCBUG
<font color='#000088'>+#endif
</font>
#define PRINT_CHAR(c) \
addi r20,r3,0 ; \
</pre>
<p> </p>
<a name='cs5'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>strauman</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2011-07-18 Till Straumann <strauman@slac.stanford.edu>
* shared/bootloader/qemu_fakerom.S: Added work-around for
qemu bug 811683.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/powerpc/ChangeLog.diff?r1=text&tr1=1.259&r2=text&tr2=1.260&diff_format=h">M</a></td><td width='1%'>1.260</td><td width='100%'>c/src/lib/libbsp/powerpc/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/powerpc/shared/bootloader/qemu_fakerom.S.diff?r1=text&tr1=1.1&r2=text&tr2=1.2&diff_format=h">M</a></td><td width='1%'>1.2</td><td width='100%'>c/src/lib/libbsp/powerpc/shared/bootloader/qemu_fakerom.S</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.259 rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.260
--- rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.259 Mon Jul 18 11:37:25 2011
+++ rtems/c/src/lib/libbsp/powerpc/ChangeLog Mon Jul 18 11:38:54 2011
</font><font color='#997700'>@@ -1,5 +1,10 @@
</font> 2011-07-18 Till Straumann <strauman@slac.stanford.edu>
<font color='#000088'>+ * shared/bootloader/qemu_fakerom.S: Added work-around for
+ qemu bug 811683.
+
+2011-07-18 Till Straumann <strauman@slac.stanford.edu>
+
</font> * shared/bootloader/head.S: disable USE_PPCBUG under qemu.
2011-07-18 Till Straumann <strauman@slac.stanford.edu>
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/powerpc/shared/bootloader/qemu_fakerom.S:1.1 rtems/c/src/lib/libbsp/powerpc/shared/bootloader/qemu_fakerom.S:1.2
--- rtems/c/src/lib/libbsp/powerpc/shared/bootloader/qemu_fakerom.S:1.1 Fri Jul 15 20:29:05 2011
+++ rtems/c/src/lib/libbsp/powerpc/shared/bootloader/qemu_fakerom.S Mon Jul 18 11:38:54 2011
</font><font color='#997700'>@@ -18,6 +18,8 @@
</font>
#define PCI_MAX_DEV 32
<font color='#000088'>+#define BA_OPCODE(tgt) ((18<<(31-5)) | 2 | ((tgt) & 0x03fffffc))
+
</font> .global fake_data
.global res_set_memsz
<font color='#997700'>@@ -25,6 +27,20 @@
</font> _start:
lis 1, INIT_STACK@h
ori 1,1,INIT_STACK@l
<font color='#000088'>+
+ /* qemu 0.14.1 has the wrong exception prefix for 74xx CPUs
+ * (bug 811683). Work around this by putting a stub at 0x00000X00
+ * which simply jumps to high memory. We only need the SC exception
+ * for now.
+ */
+ lis 3, BA_OPCODE(0xfff00000)@h
+ ori 3, 3, BA_OPCODE(0xfff00000)@l
+ li 4, 0x0c00
+ add 3, 3, 4
+ stw 3, 0(4)
+ dcbf 0, 4
+ icbi 0, 4
+
</font> bl pci_irq_set
/* copy residual to RAM and fix up;<span style="background-color: #FF0000"> </span>
* this routine returns a pointer to
</pre>
<p> </p>
<a name='cs6'></a>
<table border='0' cellspacing='0' cellpadding='5' width='100%' bgcolor='#eeeeee'>
<tr><td colspan='3' bgcolor='#dddddd'>
<font color='#bb2222'><strong>joel</strong></font>
</td></tr>
<tr><td colspan='3' bgcolor='#dddddd'><pre>2011-07-18 Joel Sherrill <joel.sherrill@oarcorp.com>
* shared/irq/apic.h, shared/smp/smp-imps.c, shared/smp/smp-imps.h:
Reformat to be more compliant with RTEMS style.
</pre></td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/i386/ChangeLog.diff?r1=text&tr1=1.83&r2=text&tr2=1.84&diff_format=h">M</a></td><td width='1%'>1.84</td><td width='100%'>c/src/lib/libbsp/i386/ChangeLog</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/i386/shared/irq/apic.h.diff?r1=text&tr1=1.2&r2=text&tr2=1.3&diff_format=h">M</a></td><td width='1%'>1.3</td><td width='100%'>c/src/lib/libbsp/i386/shared/irq/apic.h</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/i386/shared/smp/smp-imps.h.diff?r1=text&tr1=1.2&r2=text&tr2=1.3&diff_format=h">M</a></td><td width='1%'>1.3</td><td width='100%'>c/src/lib/libbsp/i386/shared/smp/smp-imps.h</td></tr>
<tr><td width='1%'><a href="http://www.rtems.com/cgi-bin/viewcvs.cgi//rtems/c/src/lib/libbsp/i386/shared/smp/smp-imps.c.diff?r1=text&tr1=1.2&r2=text&tr2=1.3&diff_format=h">M</a></td><td width='1%'>1.3</td><td width='100%'>c/src/lib/libbsp/i386/shared/smp/smp-imps.c</td></tr>
</table>
<pre>
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/i386/ChangeLog:1.83 rtems/c/src/lib/libbsp/i386/ChangeLog:1.84
--- rtems/c/src/lib/libbsp/i386/ChangeLog:1.83 Fri Jul 15 14:04:38 2011
+++ rtems/c/src/lib/libbsp/i386/ChangeLog Mon Jul 18 11:33:30 2011
</font><font color='#997700'>@@ -1,3 +1,8 @@
</font><font color='#000088'>+2011-07-18 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ * shared/irq/apic.h, shared/smp/smp-imps.c, shared/smp/smp-imps.h:
+ Reformat to be more compliant with RTEMS style.
+
</font> 2011-07-15 Joel Sherrill <joel.sherrill@oarcorp.com>
* shared/irq/apic.h, shared/smp/smp-imps.c, shared/smp/smp-imps.h: Per
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/i386/shared/irq/apic.h:1.2 rtems/c/src/lib/libbsp/i386/shared/irq/apic.h:1.3
--- rtems/c/src/lib/libbsp/i386/shared/irq/apic.h:1.2 Fri Jul 15 14:04:38 2011
+++ rtems/c/src/lib/libbsp/i386/shared/irq/apic.h Mon Jul 18 11:33:30 2011
</font><font color='#997700'>@@ -49,7 +49,7 @@
</font> * it is DIFFERENT (0xF) for Pentium and P6, but not on the same APIC
* version for AMD Opteron.
*/
<font color='#880000'>-#define APIC_BCAST_ID <span style="background-color: #FF0000"> </span> 0xFF
</font><font color='#000088'>+#define APIC_BCAST_ID 0xFF
</font>
/*
* APIC register definitions
<font color='#997700'>@@ -59,53 +59,52 @@
</font> * Shared defines for I/O and local APIC definitions
*/
/* APIC version register */
<font color='#880000'>-#define APIC_VERSION(x) ((x) & 0xFF)
-#define APIC_MAXREDIR(x) (((x) >> 16) & 0xFF)
</font><font color='#000088'>+#define APIC_VERSION(x) ((x) & 0xFF)
+#define APIC_MAXREDIR(x) (((x) >> 16) & 0xFF)
</font> /* APIC id register */
<font color='#880000'>-#define APIC_ID(x) ((x) >> 24)
-#define APIC_VER_NEW 0x10
</font><font color='#000088'>+#define APIC_ID(x) ((x) >> 24)
+#define APIC_VER_NEW 0x10
</font>
<font color='#880000'>-#define IOAPIC_REGSEL 0
-#define IOAPIC_RW 0x10
-#define IOAPIC_ID 0
-#define IOAPIC_VER 1
-#define IOAPIC_REDIR 0x10
-
-#define LAPIC_ID 0x20
-#define LAPIC_VER 0x30
-#define LAPIC_TPR 0x80
-#define LAPIC_APR 0x90
-#define LAPIC_PPR 0xA0
-#define LAPIC_EOI 0xB0
-#define LAPIC_LDR 0xD0
-#define LAPIC_DFR 0xE0
-#define LAPIC_SPIV 0xF0
-#define LAPIC_SPIV_ENABLE_APIC 0x100
-#define LAPIC_ISR 0x100
-#define LAPIC_TMR 0x180
-#define LAPIC_IRR 0x200
-#define LAPIC_ESR 0x280
-#define LAPIC_ICR 0x300
-#define LAPIC_ICR_DS_SELF 0x40000
-#define LAPIC_ICR_DS_ALLINC 0x80000
-#define LAPIC_ICR_DS_ALLEX 0xC0000
-#define LAPIC_ICR_TM_LEVEL 0x8000
-#define LAPIC_ICR_LEVELASSERT 0x4000
-#define LAPIC_ICR_STATUS_PEND 0x1000
-#define LAPIC_ICR_DM_LOGICAL 0x800
-#define LAPIC_ICR_DM_LOWPRI 0x100
-#define LAPIC_ICR_DM_SMI 0x200
-#define LAPIC_ICR_DM_NMI 0x400
-#define LAPIC_ICR_DM_INIT 0x500
-#define LAPIC_ICR_DM_SIPI 0x600
-#define LAPIC_LVTT 0x320
-#define LAPIC_LVTPC <span style="background-color: #FF0000"> </span> 0x340
-#define LAPIC_LVT0 0x350
-#define LAPIC_LVT1 0x360
-#define LAPIC_LVTE 0x370
-#define LAPIC_TICR 0x380
-#define LAPIC_TCCR 0x390
-#define LAPIC_TDCR 0x3E0
</font><font color='#000088'>+#define IOAPIC_REGSEL 0
+#define IOAPIC_RW 0x10
+#define IOAPIC_ID 0
+#define IOAPIC_VER 1
+#define IOAPIC_REDIR 0x10
+
+#define LAPIC_ID 0x20
+#define LAPIC_VER 0x30
+#define LAPIC_TPR 0x80
+#define LAPIC_APR 0x90
+#define LAPIC_PPR 0xA0
+#define LAPIC_EOI 0xB0
+#define LAPIC_LDR 0xD0
+#define LAPIC_DFR 0xE0
+#define LAPIC_SPIV 0xF0
+#define LAPIC_SPIV_ENABLE_APIC 0x100
+#define LAPIC_ISR 0x100
+#define LAPIC_TMR 0x180
+#define LAPIC_IRR 0x200
+#define LAPIC_ESR 0x280
+#define LAPIC_ICR 0x300
+#define LAPIC_ICR_DS_SELF 0x40000
+#define LAPIC_ICR_DS_ALLINC 0x80000
+#define LAPIC_ICR_DS_ALLEX 0xC0000
+#define LAPIC_ICR_TM_LEVEL 0x8000
+#define LAPIC_ICR_LEVELASSERT 0x4000
+#define LAPIC_ICR_STATUS_PEND 0x1000
+#define LAPIC_ICR_DM_LOGICAL 0x800
+#define LAPIC_ICR_DM_LOWPRI 0x100
+#define LAPIC_ICR_DM_SMI 0x200
+#define LAPIC_ICR_DM_NMI 0x400
+#define LAPIC_ICR_DM_INIT 0x500
+#define LAPIC_ICR_DM_SIPI 0x600
+#define LAPIC_LVTT 0x320
+#define LAPIC_LVTPC 0x340
+#define LAPIC_LVT0 0x350
+#define LAPIC_LVT1 0x360
+#define LAPIC_LVTE 0x370
+#define LAPIC_TICR 0x380
+#define LAPIC_TCCR 0x390
+#define LAPIC_TDCR 0x3E0
</font>
#endif /* _APIC_H */
<font color='#880000'>-
</font>
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/i386/shared/smp/smp-imps.h:1.2 rtems/c/src/lib/libbsp/i386/shared/smp/smp-imps.h:1.3
--- rtems/c/src/lib/libbsp/i386/shared/smp/smp-imps.h:1.2 Fri Jul 15 14:04:38 2011
+++ rtems/c/src/lib/libbsp/i386/shared/smp/smp-imps.h Mon Jul 18 11:33:30 2011
</font><font color='#997700'>@@ -42,15 +42,15 @@
</font>
/* make sure "apic.h" is included */
#ifndef _APIC_H
<font color='#880000'>-#error Must include "apic.h" before "smp-imps.h"
</font><font color='#000088'>+#error Must include "apic.h" before "smp-imps.h"
</font> #endif /* !_APIC_H */
/*
* Defines used.
*/
<font color='#880000'>-#define IMPS_READ(x) (*((volatile unsigned *) (x)))
-#define IMPS_WRITE(x,y) (*((volatile unsigned *) (x)) = (y))
</font><font color='#000088'>+#define IMPS_READ(x) (*((volatile unsigned *) (x)))
+#define IMPS_WRITE(x,y) (*((volatile unsigned *) (x)) = (y))
</font>
#ifdef IMPS_DEBUG
#define IMPS_DEBUG_PRINT(x) KERNEL_PRINT(x)
<font color='#997700'>@@ -58,44 +58,44 @@
</font> #define IMPS_DEBUG_PRINT(x)
#endif /* !IMPS_DEBUG */
<font color='#880000'>-#define IMPS_MAX_CPUS APIC_BCAST_ID
</font><font color='#000088'>+#define IMPS_MAX_CPUS APIC_BCAST_ID
</font>
/*
* This is the value that must be in the "sig" member of the MP
* Floating Pointer Structure.
*/
<font color='#880000'>-#define IMPS_FPS_SIGNATURE ('_' | ('M'<<8) | ('P'<<16) | ('_'<<24))
-#define IMPS_FPS_IMCRP_BIT 0x80
-#define IMPS_FPS_DEFAULT_MAX 7
</font><font color='#000088'>+#define IMPS_FPS_SIGNATURE ('_' | ('M'<<8) | ('P'<<16) | ('_'<<24))
+#define IMPS_FPS_IMCRP_BIT 0x80
+#define IMPS_FPS_DEFAULT_MAX 7
</font>
/*
* This is the value that must be in the "sig" member of the MP
* Configuration Table Header.
*/
<font color='#880000'>-#define IMPS_CTH_SIGNATURE ('P' | ('C'<<8) | ('M'<<16) | ('P'<<24))
</font><font color='#000088'>+#define IMPS_CTH_SIGNATURE ('P' | ('C'<<8) | ('M'<<16) | ('P'<<24))
</font>
/*
* These are the "type" values for Base MP Configuration Table entries.
*/
<font color='#880000'>-#define IMPS_FLAG_ENABLED 1
-#define IMPS_BCT_PROCESSOR 0
-#define IMPS_CPUFLAG_BOOT 2
-#define IMPS_BCT_BUS 1
-#define IMPS_BCT_IOAPIC 2
-#define IMPS_BCT_IO_INTERRUPT 3
-#define IMPS_BCT_LOCAL_INTERRUPT 4
-#define IMPS_INT_INT 0
-#define IMPS_INT_NMI 1
-#define IMPS_INT_SMI 2
-#define IMPS_INT_EXTINT 3
</font><font color='#000088'>+#define IMPS_FLAG_ENABLED 1
+#define IMPS_BCT_PROCESSOR 0
+#define IMPS_CPUFLAG_BOOT 2
+#define IMPS_BCT_BUS 1
+#define IMPS_BCT_IOAPIC 2
+#define IMPS_BCT_IO_INTERRUPT 3
+#define IMPS_BCT_LOCAL_INTERRUPT 4
+#define IMPS_INT_INT 0
+#define IMPS_INT_NMI 1
+#define IMPS_INT_SMI 2
+#define IMPS_INT_EXTINT 3
</font>
/*
* Typedefs and data item definitions done here.
*/
<font color='#880000'>-typedef struct imps_fps imps_fps; /* MP floating pointer structure */
-typedef struct imps_cth imps_cth; /* MP configuration table header */
</font><font color='#000088'>+typedef struct imps_fps imps_fps; /* MP floating pointer structure */
+typedef struct imps_cth imps_cth; /* MP configuration table header */
</font> typedef struct imps_processor imps_processor;
typedef struct imps_bus imps_bus;
typedef struct imps_ioapic imps_ioapic;
<font color='#997700'>@@ -114,12 +114,12 @@
</font> */
struct imps_fps
{
<font color='#880000'>- unsigned sig;
- imps_cth *cth_ptr;
- unsigned char length;
- unsigned char spec_rev;
- unsigned char checksum;
- unsigned char feature_info[5];
</font><font color='#000088'>+ unsigned sig;
+ imps_cth *cth_ptr;
+ unsigned char length;
+ unsigned char spec_rev;
+ unsigned char checksum;
+ unsigned char feature_info[5];
</font> };
/*
<font color='#997700'>@@ -130,19 +130,19 @@
</font> */
struct imps_cth
{
<font color='#880000'>- unsigned sig;
- unsigned short base_length;
- unsigned char spec_rev;
- unsigned char checksum;
- char oem_id[8];
- char prod_id[12];
- unsigned oem_table_ptr;
- unsigned short oem_table_size;
- unsigned short entry_count;
- unsigned lapic_addr;
- unsigned short extended_length;
- unsigned char extended_checksum;
- char reserved[1];
</font><font color='#000088'>+ unsigned sig;
+ unsigned short base_length;
+ unsigned char spec_rev;
+ unsigned char checksum;
+ char oem_id[8];
+ char prod_id[12];
+ unsigned oem_table_ptr;
+ unsigned short oem_table_size;
+ unsigned short entry_count;
+ unsigned lapic_addr;
+ unsigned short extended_length;
+ unsigned char extended_checksum;
+ char reserved[1];
</font> };
/*
<font color='#997700'>@@ -153,43 +153,42 @@
</font>
struct imps_processor
{
<font color='#880000'>- unsigned char type; /* must be 0 */
- unsigned char apic_id;
- unsigned char apic_ver;
- unsigned char flags;
- unsigned signature;
- unsigned features;
- char reserved[8];
</font><font color='#000088'>+ unsigned char type; /* must be 0 */
+ unsigned char apic_id;
+ unsigned char apic_ver;
+ unsigned char flags;
+ unsigned signature;
+ unsigned features;
+ char reserved[8];
</font> };
struct imps_bus
{
<font color='#880000'>- unsigned char type; /* must be 1 */
- unsigned char id;
- char bus_type[6];
</font><font color='#000088'>+ unsigned char type; /* must be 1 */
+ unsigned char id;
+ char bus_type[6];
</font> };
struct imps_ioapic
{
<font color='#880000'>- unsigned char type; /* must be 2 */
- unsigned char id;
- unsigned char ver;
- unsigned char flags;
- unsigned addr;
</font><font color='#000088'>+ unsigned char type; /* must be 2 */
+ unsigned char id;
+ unsigned char ver;
+ unsigned char flags;
+ unsigned addr;
</font> };
struct imps_interrupt
{
<font color='#880000'>- unsigned char type; /* must be 3 or 4 */
- unsigned char int_type;
- unsigned short flags;
- unsigned char source_bus_id;
- unsigned char source_bus_irq;
- unsigned char dest_apic_id;
- unsigned char dest_apic_intin;
</font><font color='#000088'>+ unsigned char type; /* must be 3 or 4 */
+ unsigned char int_type;
+ unsigned short flags;
+ unsigned char source_bus_id;
+ unsigned char source_bus_irq;
+ unsigned char dest_apic_id;
+ unsigned char dest_apic_intin;
</font> };
<font color='#880000'>-
</font> /*
* Exported globals here.
*/
<font color='#997700'>@@ -216,7 +215,6 @@
</font> extern unsigned char imps_cpu_apic_map[IMPS_MAX_CPUS];
extern unsigned char imps_apic_cpu_map[IMPS_MAX_CPUS];
<font color='#880000'>-
</font> /*
* This is the primary function for probing for Intel MPS 1.1/1.4
* compatible hardware and BIOS information. While probing the CPUs
<font color='#997700'>@@ -229,21 +227,18 @@
</font> * Returns N if IMPS information was found (for number of CPUs started)
* and is valid, else 0.
*/
<font color='#880000'>-
</font> int imps_probe(void);
/*
* This one is used as a "force" function. Give it the number of CPUs
* to start, and it will assume a certain number and try it.
*/
<font color='#880000'>-
</font> int imps_force(int ncpus);
/*
* Defines that use variables
*/
<font color='#880000'>-
</font> #define IMPS_LAPIC_READ(x) (*((volatile unsigned *) (imps_lapic_addr+(x))))
#define IMPS_LAPIC_WRITE(x, y) \
(*((volatile unsigned *) (imps_lapic_addr+(x))) = (y))
<font color='#006600'>diff -u rtems/c/src/lib/libbsp/i386/shared/smp/smp-imps.c:1.2 rtems/c/src/lib/libbsp/i386/shared/smp/smp-imps.c:1.3
--- rtems/c/src/lib/libbsp/i386/shared/smp/smp-imps.c:1.2 Fri Jul 15 14:04:38 2011
+++ rtems/c/src/lib/libbsp/i386/shared/smp/smp-imps.c Mon Jul 18 11:33:30 2011
</font><font color='#997700'>@@ -41,12 +41,11 @@
</font> * (1) : This code has never been tested on an MPS-compatible system with
* 486 CPUs, but is expected to work.
* (2) : Presumes "int", "long", and "unsigned" are 32 bits in size, and
<font color='#880000'>- * that 32-bit pointers and memory addressing is used uniformly.
</font><font color='#000088'>+ * that 32-bit pointers and memory addressing is used uniformly.
</font> */
#define _SMP_IMPS_C
<font color='#880000'>-
</font> /*
* XXXXX The following absolutely must be defined!!!
*
<font color='#997700'>@@ -56,17 +55,16 @@
</font> */
#if 0
<font color='#880000'>-#define KERNEL_PRINT(x) /* some kind of print function */
-#define CMOS_WRITE_BYTE(x,y) /* write unsigned char "y" at CMOS loc "x" */
-#define CMOS_READ_BYTE(x) /* read unsigned char at CMOS loc "x" */
-#define PHYS_TO_VIRTUAL(x) /* convert physical address "x" to virtual */
-#define VIRTUAL_TO_PHYS(x) /* convert virtual address "x" to physical */
-#define UDELAY(x) /* delay roughly at least "x" microsecs */
-#define TEST_BOOTED(x) /* test bootaddr x to see if CPU started */
-#define READ_MSR_LO(x) /* Read MSR low function */
</font><font color='#000088'>+#define KERNEL_PRINT(x) /* some kind of print function */
+#define CMOS_WRITE_BYTE(x,y) /* write unsigned char "y" at CMOS loc "x" */
+#define CMOS_READ_BYTE(x) /* read unsigned char at CMOS loc "x" */
+#define PHYS_TO_VIRTUAL(x) /* convert physical address "x" to virtual */
+#define VIRTUAL_TO_PHYS(x) /* convert virtual address "x" to physical */
+#define UDELAY(x) /* delay roughly at least "x" microsecs */
+#define TEST_BOOTED(x) /* test bootaddr x to see if CPU started */
+#define READ_MSR_LO(x) /* Read MSR low function */
</font> #endif
<font color='#880000'>-
</font> /*
* Includes here
*/
<font color='#997700'>@@ -80,52 +78,51 @@
</font> /*
* Defines that are here so as not to be in the global header file.
*/
<font color='#880000'>-#define EBDA_SEG_ADDR 0x40E
-#define BIOS_RESET_VECTOR 0x467
-#define LAPIC_ADDR_DEFAULT 0xFEE00000uL
-#define IOAPIC_ADDR_DEFAULT 0xFEC00000uL
-#define CMOS_RESET_CODE 0xF
-#define CMOS_RESET_JUMP 0xa
-#define CMOS_BASE_MEMORY 0x15
-
</font><font color='#000088'>+#define EBDA_SEG_ADDR 0x40E
+#define BIOS_RESET_VECTOR 0x467
+#define LAPIC_ADDR_DEFAULT 0xFEE00000uL
+#define IOAPIC_ADDR_DEFAULT 0xFEC00000uL
+#define CMOS_RESET_CODE 0xF
+#define CMOS_RESET_JUMP 0xa
+#define CMOS_BASE_MEMORY 0x15
</font>
/*
* Static defines here for SMP use.
*/
<font color='#880000'>-#define DEF_ENTRIES 23
</font><font color='#000088'>+#define DEF_ENTRIES 23
</font>
static int lapic_dummy = 0;
static struct {
<font color='#880000'>- imps_processor proc[2];
- imps_bus bus[2];
- imps_ioapic ioapic;
- imps_interrupt intin[16];
- imps_interrupt lintin[2];
</font><font color='#000088'>+ imps_processor proc[2];
+ imps_bus bus[2];
+ imps_ioapic ioapic;
+ imps_interrupt intin[16];
+ imps_interrupt lintin[2];
</font> } defconfig = {
<font color='#880000'>- { { IMPS_BCT_PROCESSOR, 0, 0, 0, 0, 0},
- { IMPS_BCT_PROCESSOR, 1, 0, 0, 0, 0} },
- { { IMPS_BCT_BUS, 0, {'E', 'I', 'S', 'A', ' ', ' '}},
- { 255, 1, {'P', 'C', 'I', ' ', ' ', ' '}} },
- { IMPS_BCT_IOAPIC, 0, 0, IMPS_FLAG_ENABLED, IOAPIC_ADDR_DEFAULT },
- { { IMPS_BCT_IO_INTERRUPT, IMPS_INT_EXTINT, 0, 0, 0, 0xFF, 0},
- { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 1, 0xFF, 1},
- { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 0, 0xFF, 2},
- { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 3, 0xFF, 3},
- { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 4, 0xFF, 4},
- { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 5, 0xFF, 5},
- { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 6, 0xFF, 6},
- { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 7, 0xFF, 7},
- { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 8, 0xFF, 8},
- { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 9, 0xFF, 9},
- { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 10, 0xFF, 10},
- { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 11, 0xFF, 11},
- { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 12, 0xFF, 12},
- { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 13, 0xFF, 13},
- { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 14, 0xFF, 14},
- { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 15, 0xFF, 15} },
- { { IMPS_BCT_LOCAL_INTERRUPT, IMPS_INT_EXTINT, 0, 0, 15, 0xFF, 0},
- { IMPS_BCT_LOCAL_INTERRUPT, IMPS_INT_NMI, 0, 0, 15, 0xFF, 1} }
</font><font color='#000088'>+ { { IMPS_BCT_PROCESSOR, 0, 0, 0, 0, 0},
+ { IMPS_BCT_PROCESSOR, 1, 0, 0, 0, 0} },
+ { { IMPS_BCT_BUS, 0, {'E', 'I', 'S', 'A', ' ', ' '}},
+ { 255, 1, {'P', 'C', 'I', ' ', ' ', ' '}} },
+ { IMPS_BCT_IOAPIC, 0, 0, IMPS_FLAG_ENABLED, IOAPIC_ADDR_DEFAULT },
+ { { IMPS_BCT_IO_INTERRUPT, IMPS_INT_EXTINT, 0, 0, 0, 0xFF, 0},
+ { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 1, 0xFF, 1},
+ { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 0, 0xFF, 2},
+ { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 3, 0xFF, 3},
+ { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 4, 0xFF, 4},
+ { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 5, 0xFF, 5},
+ { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 6, 0xFF, 6},
+ { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 7, 0xFF, 7},
+ { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 8, 0xFF, 8},
+ { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 9, 0xFF, 9},
+ { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 10, 0xFF, 10},
+ { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 11, 0xFF, 11},
+ { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 12, 0xFF, 12},
+ { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 13, 0xFF, 13},
+ { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 14, 0xFF, 14},
+ { IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 15, 0xFF, 15} },
+ { { IMPS_BCT_LOCAL_INTERRUPT, IMPS_INT_EXTINT, 0, 0, 15, 0xFF, 0},
+ { IMPS_BCT_LOCAL_INTERRUPT, IMPS_INT_NMI, 0, 0, 15, 0xFF, 1} }
</font> };
/*
<font color='#997700'>@@ -139,376 +136,371 @@
</font> unsigned char imps_cpu_apic_map[IMPS_MAX_CPUS];
unsigned char imps_apic_cpu_map[IMPS_MAX_CPUS];
<font color='#880000'>-
</font> /*
* MPS checksum function
*
* Function finished.
*/
<font color='#880000'>-
</font> static int
get_checksum(unsigned start, int length)
{
<font color='#880000'>- unsigned sum = 0;
</font><font color='#000088'>+ unsigned sum = 0;
</font>
<font color='#880000'>- while (length-- > 0) {
- sum += *((unsigned char *) (start++));
- }
</font><font color='#000088'>+ while (length-- > 0) {
+ sum += *((unsigned char *) (start++));
+ }
</font>
<font color='#880000'>- return (sum&0xFF);
</font><font color='#000088'>+ return (sum&0xFF);
</font> }
<font color='#880000'>-
</font> /*
* APIC ICR write and status check function.
*/
<font color='#880000'>-
</font> static int
send_ipi(unsigned int dst, unsigned int v)
{
<font color='#880000'>- int to, send_status;
</font><font color='#000088'>+ int to, send_status;
</font>
<font color='#880000'>- IMPS_LAPIC_WRITE(LAPIC_ICR+0x10, (dst << 24));
- IMPS_LAPIC_WRITE(LAPIC_ICR, v);
</font><font color='#000088'>+ IMPS_LAPIC_WRITE(LAPIC_ICR+0x10, (dst << 24));
+ IMPS_LAPIC_WRITE(LAPIC_ICR, v);
</font>
<font color='#880000'>- /* Wait for send to finish */
- to = 0;
- do {
- UDELAY(100);
- send_status = IMPS_LAPIC_READ(LAPIC_ICR) & LAPIC_ICR_STATUS_PEND;
- } while (send_status && (to++ < 1000));
</font><font color='#000088'>+ /* Wait for send to finish */
+ to = 0;
+ do {
+ UDELAY(100);
+ send_status = IMPS_LAPIC_READ(LAPIC_ICR) & LAPIC_ICR_STATUS_PEND;
+ } while (send_status && (to++ < 1000));
</font>
<font color='#880000'>- return (to < 1000);
</font><font color='#000088'>+ return (to < 1000);
</font> }
<font color='#880000'>-
</font> /*
* Primary function for booting individual CPUs.
*
* This must be modified to perform whatever OS-specific initialization
* that is required.
*/
<font color='#880000'>-
</font> static int
boot_cpu(imps_processor *proc)
{
<font color='#880000'>- int apicid = proc->apic_id, success = 1, to;
- unsigned bootaddr, accept_status;
- unsigned bios_reset_vector = PHYS_TO_VIRTUAL(BIOS_RESET_VECTOR);
-
- /*
- * Copy boot code for secondary CPUs here. Find it in between
- * "patch_code_start" and "patch_code_end" symbols. The other CPUs
- * will start there in 16-bit real mode under the 1MB boundary.
- * "patch_code_start" should be placed at a 4K-aligned address
- * under the 1MB boundary.
- */
-
- extern char patch_code_start[];
- extern char patch_code_end[];
- bootaddr = (512-64)*1024;
- memcpy((char *)bootaddr, patch_code_start, patch_code_end - patch_code_start);
-
- /*
- * Generic CPU startup sequence starts here.
- */
-
- /* set BIOS reset vector */
- CMOS_WRITE_BYTE(CMOS_RESET_CODE, CMOS_RESET_JUMP);
- *((volatile unsigned *) bios_reset_vector) = ((bootaddr & 0xFF000) << 12);
-
- /* clear the APIC error register */
- IMPS_LAPIC_WRITE(LAPIC_ESR, 0);
- accept_status = IMPS_LAPIC_READ(LAPIC_ESR);
-
- /* assert INIT IPI */
- send_ipi(apicid, LAPIC_ICR_TM_LEVEL | LAPIC_ICR_LEVELASSERT | LAPIC_ICR_DM_INIT);
-
- UDELAY(10000);
-
- /* de-assert INIT IPI */
- send_ipi(apicid, LAPIC_ICR_TM_LEVEL | LAPIC_ICR_DM_INIT);
-
- UDELAY(10000);
-
- /*
- * Send Startup IPIs if not an old pre-integrated APIC.
- */
-
- if (proc->apic_ver >= APIC_VER_NEW) {
- int i;
- for (i = 1; i <= 2; i++) {
- send_ipi(apicid, LAPIC_ICR_DM_SIPI | ((bootaddr >> 12) & 0xFF));
- UDELAY(1000);
- }
- }
-
- /*
- * Check to see if other processor has started.
- */
- to = 0;
- while (!TEST_BOOTED(bootaddr) && to++ < 100)
- UDELAY(10000);
- if (to >= 100) {
- KERNEL_PRINT(("CPU Not Responding, DISABLED"));
- success = 0;
- } else {
- KERNEL_PRINT(("#%d Application Processor (AP)", imps_num_cpus));
- }
-
- /*
- * Generic CPU startup sequence ends here, the rest is cleanup.
- */
-
- /* clear the APIC error register */
- IMPS_LAPIC_WRITE(LAPIC_ESR, 0);
- accept_status = IMPS_LAPIC_READ(LAPIC_ESR);
-
- /* clean up BIOS reset vector */
- CMOS_WRITE_BYTE(CMOS_RESET_CODE, 0);
- *((volatile unsigned *) bios_reset_vector) = 0;
</font><font color='#000088'>+ int apicid = proc->apic_id, success = 1, to;
+ unsigned bootaddr, accept_status;
+ unsigned bios_reset_vector = PHYS_TO_VIRTUAL(BIOS_RESET_VECTOR);
+
+ /*
+ * Copy boot code for secondary CPUs here. Find it in between
+ * "patch_code_start" and "patch_code_end" symbols. The other CPUs
+ * will start there in 16-bit real mode under the 1MB boundary.
+ * "patch_code_start" should be placed at a 4K-aligned address
+ * under the 1MB boundary.
+ */
+
+ extern char patch_code_start[];
+ extern char patch_code_end[];
+ bootaddr = (512-64)*1024;
+ memcpy((char *)bootaddr, patch_code_start, patch_code_end - patch_code_start);
+
+ /*
+ * Generic CPU startup sequence starts here.
+ */
+
+ /* set BIOS reset vector */
+ CMOS_WRITE_BYTE(CMOS_RESET_CODE, CMOS_RESET_JUMP);
+ *((volatile unsigned *) bios_reset_vector) = ((bootaddr & 0xFF000) << 12);
+
+ /* clear the APIC error register */
+ IMPS_LAPIC_WRITE(LAPIC_ESR, 0);
+ accept_status = IMPS_LAPIC_READ(LAPIC_ESR);
+
+ /* assert INIT IPI */
+ send_ipi(
+ apicid, LAPIC_ICR_TM_LEVEL | LAPIC_ICR_LEVELASSERT | LAPIC_ICR_DM_INIT);
+
+ UDELAY(10000);
+
+ /* de-assert INIT IPI */
+ send_ipi(apicid, LAPIC_ICR_TM_LEVEL | LAPIC_ICR_DM_INIT);
+
+ UDELAY(10000);
+
+ /*
+ * Send Startup IPIs if not an old pre-integrated APIC.
+ */
+
+ if (proc->apic_ver >= APIC_VER_NEW) {
+ int i;
+ for (i = 1; i <= 2; i++) {
+ send_ipi(apicid, LAPIC_ICR_DM_SIPI | ((bootaddr >> 12) & 0xFF));
+ UDELAY(1000);
+ }
+ }
+
+ /*
+ * Check to see if other processor has started.
+ */
+ to = 0;
+ while (!TEST_BOOTED(bootaddr) && to++ < 100)
+ UDELAY(10000);
+ if (to >= 100) {
+ KERNEL_PRINT(("CPU Not Responding, DISABLED"));
+ success = 0;
+ } else {
+ KERNEL_PRINT(("#%d Application Processor (AP)", imps_num_cpus));
+ }
+
+ /*
+ * Generic CPU startup sequence ends here, the rest is cleanup.
+ */
+
+ /* clear the APIC error register */
+ IMPS_LAPIC_WRITE(LAPIC_ESR, 0);
+ accept_status = IMPS_LAPIC_READ(LAPIC_ESR);
+
+ /* clean up BIOS reset vector */
+ CMOS_WRITE_BYTE(CMOS_RESET_CODE, 0);
+ *((volatile unsigned *) bios_reset_vector) = 0;
</font>
<font color='#880000'>- KERNEL_PRINT(("\n"));
</font><font color='#000088'>+ KERNEL_PRINT(("\n"));
</font>
<font color='#880000'>- return success;
</font><font color='#000088'>+ return success;
</font> }
<font color='#880000'>-
</font> /*
* read bios stuff and fill tables
*/
<font color='#880000'>-
</font> static void
add_processor(imps_processor *proc)
{
<font color='#880000'>- int apicid = proc->apic_id;
</font><font color='#000088'>+ int apicid = proc->apic_id;
</font>
<font color='#880000'>- KERNEL_PRINT((" Processor [APIC id %d ver %d]: ",
- apicid, proc->apic_ver));
- if (!(proc->flags & IMPS_FLAG_ENABLED)) {
- KERNEL_PRINT(("DISABLED\n"));
- return;
- }
- if (proc->flags & (IMPS_CPUFLAG_BOOT)) {
- KERNEL_PRINT(("#0 BootStrap Processor (BSP)\n"));
- return;
- }
- if (boot_cpu(proc)) {
-
- /* XXXXX add OS-specific setup for secondary CPUs here */
-
- imps_cpu_apic_map[imps_num_cpus] = apicid;
- imps_apic_cpu_map[apicid] = imps_num_cpus;
- imps_num_cpus++;
- }
</font><font color='#000088'>+ KERNEL_PRINT((" Processor [APIC id %d ver %d]: ",
+ apicid, proc->apic_ver));
+ if (!(proc->flags & IMPS_FLAG_ENABLED)) {
+ KERNEL_PRINT(("DISABLED\n"));
+ return;
+ }
+ if (proc->flags & (IMPS_CPUFLAG_BOOT)) {
+ KERNEL_PRINT(("#0 BootStrap Processor (BSP)\n"));
+ return;
+ }
+ if (boot_cpu(proc)) {
+
+ /* XXXXX add OS-specific setup for secondary CPUs here */
+
+ imps_cpu_apic_map[imps_num_cpus] = apicid;
+ imps_apic_cpu_map[apicid] = imps_num_cpus;
+ imps_num_cpus++;
+ }
</font> }
static void
add_bus(imps_bus *bus)
{
<font color='#880000'>- char str[8];
</font><font color='#000088'>+ char str[8];
</font>
<font color='#880000'>- memcpy(str, bus->bus_type, 6);
- str[6] = 0;
- KERNEL_PRINT((" Bus id %d is %s\n", bus->id, str));
</font><font color='#000088'>+ memcpy(str, bus->bus_type, 6);
+ str[6] = 0;
+ KERNEL_PRINT((" Bus id %d is %s\n", bus->id, str));
</font>
<font color='#880000'>- /* XXXXX add OS-specific code here */
</font><font color='#000088'>+ /* XXXXX add OS-specific code here */
</font> }
static void
add_ioapic(imps_ioapic *ioapic)
{
<font color='#880000'>- KERNEL_PRINT((" I/O APIC id %d ver %d, address: 0x%x ",
- ioapic->id, ioapic->ver, ioapic->addr));
- if (!(ioapic->flags & IMPS_FLAG_ENABLED)) {
- KERNEL_PRINT(("DISABLED\n"));
- return;
- }
- KERNEL_PRINT(("\n"));
</font><font color='#000088'>+ KERNEL_PRINT((" I/O APIC id %d ver %d, address: 0x%x ",
+ ioapic->id, ioapic->ver, ioapic->addr));
+ if (!(ioapic->flags & IMPS_FLAG_ENABLED)) {
+ KERNEL_PRINT(("DISABLED\n"));
+ return;
+ }
+ KERNEL_PRINT(("\n"));
</font>
<font color='#880000'>- /* XXXXX add OS-specific code here */
</font><font color='#000088'>+ /* XXXXX add OS-specific code here */
</font> }
<font color='#880000'>-
</font> static void
imps_read_config_table(unsigned start, int count)
{
<font color='#880000'>- while (count-- > 0) {
- switch (*((unsigned char *)start)) {
- case IMPS_BCT_PROCESSOR:
- add_processor((imps_processor *)start);
- start += 12; /* 20 total */
- break;
- case IMPS_BCT_BUS:
- add_bus((imps_bus *)start);
- break;
- case IMPS_BCT_IOAPIC:
- add_ioapic((imps_ioapic *)start);
- break;
-#if 0 /* XXXXX uncomment this if "add_io_interrupt" is implemented */
- case IMPS_BCT_IO_INTERRUPT:
- add_io_interrupt((imps_interrupt *)start);
- break;
</font><font color='#000088'>+ while (count-- > 0) {
+ switch (*((unsigned char *)start)) {
+ case IMPS_BCT_PROCESSOR:
+ add_processor((imps_processor *)start);
+ start += 12; /* 20 total */
+ break;
+ case IMPS_BCT_BUS:
+ add_bus((imps_bus *)start);
+ break;
+ case IMPS_BCT_IOAPIC:
+ add_ioapic((imps_ioapic *)start);
+ break;
+#if 0 /* XXXXX uncomment this if "add_io_interrupt" is implemented */
+ case IMPS_BCT_IO_INTERRUPT:
+ add_io_interrupt((imps_interrupt *)start);
+ break;
</font> #endif
<font color='#880000'>-#if 0 /* XXXXX uncomment this if "add_local_interrupt" is implemented */
- case IMPS_BCT_LOCAL_INTERRUPT:
- add_local_interupt((imps_interrupt *)start);
- break;
</font><font color='#000088'>+#if 0 /* XXXXX uncomment this if "add_local_interrupt" is implemented */
+ case IMPS_BCT_LOCAL_INTERRUPT:
+ add_local_interupt((imps_interrupt *)start);
+ break;
</font> #endif
<font color='#880000'>- default:
- break;
- }
- start += 8;
- }
</font><font color='#000088'>+ default:
+ break;
+ }
+ start += 8;
+ }
</font> }
<font color='#880000'>-
</font> static int
imps_bad_bios(imps_fps *fps_ptr)
{
<font color='#880000'>- int sum;
- imps_cth *local_cth_ptr
- = (imps_cth *) PHYS_TO_VIRTUAL(fps_ptr->cth_ptr);
-
- if (fps_ptr->feature_info[0] > IMPS_FPS_DEFAULT_MAX) {
- KERNEL_PRINT((" Invalid MP System Configuration type %d\n",
- fps_ptr->feature_info[0]));
- return 1;
- }
</font><font color='#000088'>+ int sum;
+ imps_cth *local_cth_ptr
+ = (imps_cth *) PHYS_TO_VIRTUAL(fps_ptr->cth_ptr);
+
+ if (fps_ptr->feature_info[0] > IMPS_FPS_DEFAULT_MAX) {
+ KERNEL_PRINT((" Invalid MP System Configuration type %d\n",
+ fps_ptr->feature_info[0]));
+ return 1;
+ }
</font>
<font color='#880000'>- if (fps_ptr->cth_ptr) {
- sum = get_checksum((unsigned)local_cth_ptr,
</font><font color='#000088'>+ if (fps_ptr->cth_ptr) {
+ sum = get_checksum((unsigned)local_cth_ptr,
</font> local_cth_ptr->base_length);
<font color='#880000'>- if (local_cth_ptr->sig != IMPS_CTH_SIGNATURE || sum) {
- KERNEL_PRINT((" Bad MP Config Table sig 0x%x and/or checksum 0x%x\n", (unsigned)(fps_ptr->cth_ptr), sum));
- return 1;
- }
- if (local_cth_ptr->spec_rev != fps_ptr->spec_rev) {
- KERNEL_PRINT((" Bad MP Config Table sub-revision # %d\n", local_cth_ptr->spec_rev));
- return 1;
- }
- if (local_cth_ptr->extended_length) {
- sum = (get_checksum(((unsigned)local_cth_ptr)
- + local_cth_ptr->base_length,
- local_cth_ptr->extended_length)
- + local_cth_ptr->extended_checksum) & 0xFF;
- if (sum) {
- KERNEL_PRINT((" Bad Extended MP Config Table checksum 0x%x\n", sum));
- return 1;
- }
- }
- } else if (!fps_ptr->feature_info[0]) {
- KERNEL_PRINT((" Missing configuration information\n"));
- return 1;
- }
</font><font color='#000088'>+ if (local_cth_ptr->sig != IMPS_CTH_SIGNATURE || sum) {
+ KERNEL_PRINT(
+ (" Bad MP Config Table sig 0x%x and/or checksum 0x%x\n",
+ (unsigned)(fps_ptr->cth_ptr),
+ sum)
+ );
+ return 1;
+ }
+ if (local_cth_ptr->spec_rev != fps_ptr->spec_rev) {
+ KERNEL_PRINT(
+ (" Bad MP Config Table sub-revision # %d\n",
+ local_cth_ptr->spec_rev)
+ );
+ return 1;
+ }
+ if (local_cth_ptr->extended_length) {
+ sum = (get_checksum(((unsigned)local_cth_ptr)
+ + local_cth_ptr->base_length,
+ local_cth_ptr->extended_length)
+ + local_cth_ptr->extended_checksum) & 0xFF;
+ if (sum) {
+ KERNEL_PRINT((" Bad Extended MP Config Table checksum 0x%x\n", sum));
+ return 1;
+ }
+ }
+ } else if (!fps_ptr->feature_info[0]) {
+ KERNEL_PRINT((" Missing configuration information\n"));
+ return 1;
+ }
</font>
<font color='#880000'>- return 0;
</font><font color='#000088'>+ return 0;
</font> }
<font color='#880000'>-
</font> static void
imps_read_bios(imps_fps *fps_ptr)
{
<font color='#880000'>- int apicid;
- unsigned cth_start, cth_count;
- imps_cth *local_cth_ptr
- = (imps_cth *)PHYS_TO_VIRTUAL(fps_ptr->cth_ptr);
- char *str_ptr;
-
- KERNEL_PRINT(("Intel MultiProcessor Spec 1.%d BIOS support detected\n",
- fps_ptr->spec_rev));
-
- /*
- * Do all checking of errors which would definitely
- * lead to failure of the SMP boot here.
- */
-
- if (imps_bad_bios(fps_ptr)) {
- KERNEL_PRINT((" Disabling MPS support\n"));
- return;
- }
-
- if (fps_ptr->feature_info[1] & IMPS_FPS_IMCRP_BIT) {
- str_ptr = "IMCR and PIC";
- } else {
- str_ptr = "Virtual Wire";
- }
- if (fps_ptr->cth_ptr) {
- imps_lapic_addr = local_cth_ptr->lapic_addr;
- } else {
- imps_lapic_addr = LAPIC_ADDR_DEFAULT;
- }
- KERNEL_PRINT((" APIC config: \"%s mode\" Local APIC address: 0x%x\n",
- str_ptr, imps_lapic_addr));
- if (imps_lapic_addr != (READ_MSR_LO(0x1b) & 0xFFFFF000)) {
- KERNEL_PRINT(("Inconsistent Local APIC address, Disabling SMP support\n"));
- return;
- }
- imps_lapic_addr = PHYS_TO_VIRTUAL(imps_lapic_addr);
-
- /*
- * Setup primary CPU.
- */
- apicid = IMPS_LAPIC_READ(LAPIC_SPIV);
- IMPS_LAPIC_WRITE(LAPIC_SPIV, apicid|LAPIC_SPIV_ENABLE_APIC);
- apicid = APIC_ID(IMPS_LAPIC_READ(LAPIC_ID));
- imps_cpu_apic_map[0] = apicid;
- imps_apic_cpu_map[apicid] = 0;
-
- if (fps_ptr->cth_ptr) {
- char str1[16], str2[16];
- memcpy(str1, local_cth_ptr->oem_id, 8);
- str1[8] = 0;
- memcpy(str2, local_cth_ptr->prod_id, 12);
- str2[12] = 0;
- KERNEL_PRINT((" OEM id: %s Product id: %s\n", str1, str2));
- cth_start = ((unsigned) local_cth_ptr) + sizeof(imps_cth);
- cth_count = local_cth_ptr->entry_count;
- } else {
- *((volatile unsigned *) IOAPIC_ADDR_DEFAULT) = IOAPIC_ID;
- defconfig.ioapic.id
- = APIC_ID(*((volatile unsigned *)
- (IOAPIC_ADDR_DEFAULT+IOAPIC_RW)));
- *((volatile unsigned *) IOAPIC_ADDR_DEFAULT) = IOAPIC_VER;
- defconfig.ioapic.ver
- = APIC_VERSION(*((volatile unsigned *)
- (IOAPIC_ADDR_DEFAULT+IOAPIC_RW)));
- defconfig.proc[apicid].flags
- = IMPS_FLAG_ENABLED|IMPS_CPUFLAG_BOOT;
- defconfig.proc[!apicid].flags = IMPS_FLAG_ENABLED;
- imps_num_cpus = 2;
- if (fps_ptr->feature_info[0] == 1
- || fps_ptr->feature_info[0] == 5) {
- memcpy(defconfig.bus[0].bus_type, "ISA ", 6);
- }
- if (fps_ptr->feature_info[0] == 4
- || fps_ptr->feature_info[0] == 7) {
- memcpy(defconfig.bus[0].bus_type, "MCA ", 6);
- }
- if (fps_ptr->feature_info[0] > 4) {
- defconfig.proc[0].apic_ver = 0x10;
- defconfig.proc[1].apic_ver = 0x10;
- defconfig.bus[1].type = IMPS_BCT_BUS;
- }
- if (fps_ptr->feature_info[0] == 2) {
- defconfig.intin[2].type = 255;
- defconfig.intin[13].type = 255;
- }
- if (fps_ptr->feature_info[0] == 7) {
- defconfig.intin[0].type = 255;
- }
- cth_start = (unsigned) &defconfig;
- cth_count = DEF_ENTRIES;
- }
- imps_read_config_table(cth_start, cth_count);
</font><font color='#000088'>+ int apicid;
+ unsigned cth_start, cth_count;
+ imps_cth *local_cth_ptr
+ = (imps_cth *)PHYS_TO_VIRTUAL(fps_ptr->cth_ptr);
+ char *str_ptr;
+
+ KERNEL_PRINT(("Intel MultiProcessor Spec 1.%d BIOS support detected\n",
+ fps_ptr->spec_rev));
+
+ /*
+ * Do all checking of errors which would definitely
+ * lead to failure of the SMP boot here.
+ */
+ if (imps_bad_bios(fps_ptr)) {
+ KERNEL_PRINT((" Disabling MPS support\n"));
+ return;
+ }
+
+ if (fps_ptr->feature_info[1] & IMPS_FPS_IMCRP_BIT) {
+ str_ptr = "IMCR and PIC";
+ } else {
+ str_ptr = "Virtual Wire";
+ }
+ if (fps_ptr->cth_ptr) {
+ imps_lapic_addr = local_cth_ptr->lapic_addr;
+ } else {
+ imps_lapic_addr = LAPIC_ADDR_DEFAULT;
+ }
+ KERNEL_PRINT((" APIC config: \"%s mode\" Local APIC address: 0x%x\n",
+ str_ptr, imps_lapic_addr));
+ if (imps_lapic_addr != (READ_MSR_LO(0x1b) & 0xFFFFF000)) {
+ KERNEL_PRINT(("Inconsistent Local APIC address, Disabling SMP support\n"));
+ return;
+ }
+ imps_lapic_addr = PHYS_TO_VIRTUAL(imps_lapic_addr);
+
+ /*
+ * Setup primary CPU.
+ */
+ apicid = IMPS_LAPIC_READ(LAPIC_SPIV);
+ IMPS_LAPIC_WRITE(LAPIC_SPIV, apicid|LAPIC_SPIV_ENABLE_APIC);
+ apicid = APIC_ID(IMPS_LAPIC_READ(LAPIC_ID));
+ imps_cpu_apic_map[0] = apicid;
+ imps_apic_cpu_map[apicid] = 0;
+
+ if (fps_ptr->cth_ptr) {
+ char str1[16], str2[16];
+ memcpy(str1, local_cth_ptr->oem_id, 8);
+ str1[8] = 0;
+ memcpy(str2, local_cth_ptr->prod_id, 12);
+ str2[12] = 0;
+ KERNEL_PRINT((" OEM id: %s Product id: %s\n", str1, str2));
+ cth_start = ((unsigned) local_cth_ptr) + sizeof(imps_cth);
+ cth_count = local_cth_ptr->entry_count;
+ } else {
+ *((volatile unsigned *) IOAPIC_ADDR_DEFAULT) = IOAPIC_ID;
+ defconfig.ioapic.id
+ = APIC_ID(*((volatile unsigned *)
+ (IOAPIC_ADDR_DEFAULT+IOAPIC_RW)));
+ *((volatile unsigned *) IOAPIC_ADDR_DEFAULT) = IOAPIC_VER;
+ defconfig.ioapic.ver
+ = APIC_VERSION(*((volatile unsigned *)
+ (IOAPIC_ADDR_DEFAULT+IOAPIC_RW)));
+ defconfig.proc[apicid].flags
+ = IMPS_FLAG_ENABLED|IMPS_CPUFLAG_BOOT;
+ defconfig.proc[!apicid].flags = IMPS_FLAG_ENABLED;
+ imps_num_cpus = 2;
+ if (fps_ptr->feature_info[0] == 1
+ || fps_ptr->feature_info[0] == 5) {
+ memcpy(defconfig.bus[0].bus_type, "ISA ", 6);
+ }
+ if (fps_ptr->feature_info[0] == 4
+ || fps_ptr->feature_info[0] == 7) {
+ memcpy(defconfig.bus[0].bus_type, "MCA ", 6);
+ }
+ if (fps_ptr->feature_info[0] > 4) {
+ defconfig.proc[0].apic_ver = 0x10;
+ defconfig.proc[1].apic_ver = 0x10;
+ defconfig.bus[1].type = IMPS_BCT_BUS;
+ }
+ if (fps_ptr->feature_info[0] == 2) {
+ defconfig.intin[2].type = 255;
+ defconfig.intin[13].type = 255;
+ }
+ if (fps_ptr->feature_info[0] == 7) {
+ defconfig.intin[0].type = 255;
+ }
+ cth_start = (unsigned) &defconfig;
+ cth_count = DEF_ENTRIES;
+ }
+ imps_read_config_table(cth_start, cth_count);
</font>
<font color='#880000'>- /* %%%%% ESB read extended entries here */
</font><font color='#000088'>+ /* %%%%% ESB read extended entries here */
</font>
<font color='#880000'>- imps_enabled = 1;
</font><font color='#000088'>+ imps_enabled = 1;
</font> }
<font color='#880000'>-
</font> /*
* Given a region to check, this actually looks for the "MP Floating
* Pointer Structure". The return value indicates if the correct
<font color='#997700'>@@ -523,30 +515,29 @@
</font> *
* Function finished.
*/
<font color='#880000'>-
</font> static int
imps_scan(unsigned start, unsigned length)
{
<font color='#880000'>- IMPS_DEBUG_PRINT(("Scanning from 0x%x for %d bytes\n",
- start, length));
</font><font color='#000088'>+ IMPS_DEBUG_PRINT(("Scanning from 0x%x for %d bytes\n",
+ start, length));
</font>
<font color='#880000'>- while (length > 0) {
- imps_fps *fps_ptr = (imps_fps *) PHYS_TO_VIRTUAL(start);
</font><font color='#000088'>+ while (length > 0) {
+ imps_fps *fps_ptr = (imps_fps *) PHYS_TO_VIRTUAL(start);
</font>
<font color='#880000'>- if (fps_ptr->sig == IMPS_FPS_SIGNATURE
- && fps_ptr->length == 1
- && (fps_ptr->spec_rev == 1 || fps_ptr->spec_rev == 4)
- && !get_checksum(start, 16)) {
- IMPS_DEBUG_PRINT(("Found MP Floating Structure Pointer at %x\n", start));
- imps_read_bios(fps_ptr);
- return 1;
- }
-
- length -= 16;
- start += 16;
- }
</font><font color='#000088'>+ if (fps_ptr->sig == IMPS_FPS_SIGNATURE
+ && fps_ptr->length == 1
+ && (fps_ptr->spec_rev == 1 || fps_ptr->spec_rev == 4)
+ && !get_checksum(start, 16)) {
+ IMPS_DEBUG_PRINT(("Found MP Floating Structure Pointer at %x\n", start));
+ imps_read_bios(fps_ptr);
+ return 1;
+ }
+
+ length -= 16;
+ start += 16;
+ }
</font>
<font color='#880000'>- return 0;
</font><font color='#000088'>+ return 0;
</font> }
/*
<font color='#997700'>@@ -556,41 +547,40 @@
</font> int
imps_force(int ncpus)
{
<font color='#880000'>- int apicid, i;
- imps_processor p;
</font><font color='#000088'>+ int apicid, i;
+ imps_processor p;
</font>
<font color='#880000'>- KERNEL_PRINT(("Intel MultiProcessor \"Force\" Support\n"));
</font><font color='#000088'>+ KERNEL_PRINT(("Intel MultiProcessor \"Force\" Support\n"));
</font>
<font color='#880000'>- imps_lapic_addr = (READ_MSR_LO(0x1b) & 0xFFFFF000);
- imps_lapic_addr = PHYS_TO_VIRTUAL(imps_lapic_addr);
</font><font color='#000088'>+ imps_lapic_addr = (READ_MSR_LO(0x1b) & 0xFFFFF000);
+ imps_lapic_addr = PHYS_TO_VIRTUAL(imps_lapic_addr);
</font>
<font color='#880000'>- /*
- * Setup primary CPU.
- */
- apicid = IMPS_LAPIC_READ(LAPIC_SPIV);
- IMPS_LAPIC_WRITE(LAPIC_SPIV, apicid|LAPIC_SPIV_ENABLE_APIC);
- apicid = APIC_ID(IMPS_LAPIC_READ(LAPIC_ID));
- imps_cpu_apic_map[0] = apicid;
- imps_apic_cpu_map[apicid] = 0;
-
- p.type = 0;
- p.apic_ver = 0x10;
- p.signature = p.features = 0;
-
- for (i = 0; i < ncpus; i++) {
- if (apicid == i) {
- p.flags = IMPS_FLAG_ENABLED | IMPS_CPUFLAG_BOOT;
- } else {
- p.flags = IMPS_FLAG_ENABLED;
- }
- p.apic_id = i;
- add_processor(&p);
- }
</font><font color='#000088'>+ /*
+ * Setup primary CPU.
+ */
+ apicid = IMPS_LAPIC_READ(LAPIC_SPIV);
+ IMPS_LAPIC_WRITE(LAPIC_SPIV, apicid|LAPIC_SPIV_ENABLE_APIC);
+ apicid = APIC_ID(IMPS_LAPIC_READ(LAPIC_ID));
+ imps_cpu_apic_map[0] = apicid;
+ imps_apic_cpu_map[apicid] = 0;
+
+ p.type = 0;
+ p.apic_ver = 0x10;
+ p.signature = p.features = 0;
+
+ for (i = 0; i < ncpus; i++) {
+ if (apicid == i) {
+ p.flags = IMPS_FLAG_ENABLED | IMPS_CPUFLAG_BOOT;
+ } else {
+ p.flags = IMPS_FLAG_ENABLED;
+ }
+ p.apic_id = i;
+ add_processor(&p);
+ }
</font>
<font color='#880000'>- return imps_num_cpus;
</font><font color='#000088'>+ return imps_num_cpus;
</font> }
<font color='#880000'>-
</font> /*
* This is the primary function for probing for MPS compatible hardware
* and BIOS information. Call this during the early stages of OS startup,
<font color='#997700'>@@ -602,73 +592,72 @@
</font> * Environment requirements from the OS to run:
*
* (1) : A non-linear virtual to physical memory mapping is probably OK,
<font color='#880000'>- * as (I think) the structures all fall within page boundaries,
- * but a linear mapping is recommended. Currently assumes that
- * the mapping will remain identical over time (which should be
- * OK since it only accesses memory which shouldn't be munged
- * by the OS anyway).
</font><font color='#000088'>+ * as (I think) the structures all fall within page boundaries,
+ * but a linear mapping is recommended. Currently assumes that
+ * the mapping will remain identical over time (which should be
+ * OK since it only accesses memory which shouldn't be munged
+ * by the OS anyway).
</font> * (2) : The OS only consumes memory which the BIOS says is OK to use,
<font color='#880000'>- * and not any of the BIOS standard areas (the areas 0x400 to
- * 0x600, the EBDA, 0xE0000 to 0xFFFFF, and unreported physical
- * RAM). Sometimes a small amount of physical RAM is not
- * reported by the BIOS, to be used to store MPS and other
- * information.
</font><font color='#000088'>+ * and not any of the BIOS standard areas (the areas 0x400 to
+ * 0x600, the EBDA, 0xE0000 to 0xFFFFF, and unreported physical
+ * RAM). Sometimes a small amount of physical RAM is not
+ * reported by the BIOS, to be used to store MPS and other
+ * information.
</font> * (3) : It must be possible to read the CMOS.
* (4) : There must be between 512K and 640K of lower memory (this is a
<font color='#880000'>- * sanity check).
</font><font color='#000088'>+ * sanity check).
</font> *
* Function finished.
*/
<font color='#880000'>-
</font> int
imps_probe(void)
{
<font color='#880000'>- /*
- * Determine possible address of the EBDA
- */
- unsigned ebda_addr = *((unsigned short *)
- PHYS_TO_VIRTUAL(EBDA_SEG_ADDR)) << 4;
-
- /*
- * Determine amount of installed lower memory (not *available*
- * lower memory).
- *
- * NOTE: This should work reliably as long as we verify the
- * machine is at least a system that could possibly have
- * MPS compatibility to begin with.
- */
- unsigned mem_lower = ((CMOS_READ_BYTE(CMOS_BASE_MEMORY+1) << 8)
- | CMOS_READ_BYTE(CMOS_BASE_MEMORY)) << 10;
</font><font color='#000088'>+ /*
+ * Determine possible address of the EBDA
+ */
+ unsigned ebda_addr = *((unsigned short *)
+ PHYS_TO_VIRTUAL(EBDA_SEG_ADDR)) << 4;
+
+ /*
+ * Determine amount of installed lower memory (not *available*
+ * lower memory).
+ *
+ * NOTE: This should work reliably as long as we verify the
+ * machine is at least a system that could possibly have
+ * MPS compatibility to begin with.
+ */
+ unsigned mem_lower = ((CMOS_READ_BYTE(CMOS_BASE_MEMORY+1) << 8)
+ | CMOS_READ_BYTE(CMOS_BASE_MEMORY)) << 10;
</font>
#ifdef IMPS_DEBUG
<font color='#880000'>- imps_enabled = 0;
- imps_num_cpus = 1;
</font><font color='#000088'>+ imps_enabled = 0;
+ imps_num_cpus = 1;
</font> #endif
<font color='#880000'>- /*
- * Sanity check : if this isn't reasonable, it is almost impossibly
- * unlikely to be an MPS compatible machine, so return failure.
- */
- if (mem_lower < 512*1024 || mem_lower > 640*1024) {
- return 0;
- }
</font><font color='#000088'>+ /*
+ * Sanity check : if this isn't reasonable, it is almost impossibly
+ * unlikely to be an MPS compatible machine, so return failure.
+ */
+ if (mem_lower < 512*1024 || mem_lower > 640*1024) {
+ return 0;
+ }
</font>
<font color='#880000'>- if (ebda_addr > mem_lower - 1024
- || ebda_addr + *((unsigned char *) PHYS_TO_VIRTUAL(ebda_addr))
</font><font color='#000088'>+ if (ebda_addr > mem_lower - 1024
+ || ebda_addr + *((unsigned char *) PHYS_TO_VIRTUAL(ebda_addr))
</font> * 1024 > mem_lower) {
<font color='#880000'>- ebda_addr = 0;
- }
</font><font color='#000088'>+ ebda_addr = 0;
+ }
</font>
<font color='#880000'>- if (((ebda_addr && imps_scan(ebda_addr, 1024))
- || (!ebda_addr && imps_scan(mem_lower - 1024, 1024))
- || imps_scan(0xF0000, 0x10000)) && imps_enabled) {
- return imps_num_cpus;
- }
-
- /*
- * If no BIOS info on MPS hardware is found, then return failure.
- */
</font><font color='#000088'>+ if (((ebda_addr && imps_scan(ebda_addr, 1024))
+ || (!ebda_addr && imps_scan(mem_lower - 1024, 1024))
+ || imps_scan(0xF0000, 0x10000)) && imps_enabled) {
+ return imps_num_cpus;
+ }
+
+ /*
+ * If no BIOS info on MPS hardware is found, then return failure.
+ */
</font>
<font color='#880000'>- return 0;
</font><font color='#000088'>+ return 0;
</font> }
</pre>
<p> </p>
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