[Bug 1607] __RTEMS_SIZEOF_VOID_P__ flawed design
bugzilla-daemon at rtems.org
bugzilla-daemon at rtems.org
Thu Jul 8 07:45:17 UTC 2010
https://www.rtems.org/bugzilla/show_bug.cgi?id=1607
--- Comment #8 from Sebastian Huber <sebastian.huber at embedded-brains.de> 2010-07-08 02:45:16 CDT ---
(In reply to comment #7)
> (In reply to comment #6)
> > 1. We need this per CPU structure to support multi-core systems.
> > 2. We have to access fields of this CPU structure in assembly code.
> Not quite - Your design does not allow otherwise.
>
> You could redesign your code in such a way it doesn't have these
> limitations/restriction attached, e.g.
> * by rewriting your code in inline-asm (There you can utilize sizeof())
Inline-asm has be be within a function body? The exception entry is on many
architectures not a function call. Usually you have to set up an environment
in which a call to C functions is allowed. This may require that you have to
switch the stack pointer. The decision to switch the stack or not usually
depends on a variable within this per CPU structure (the ISR nest level). Such
stack operations are difficult to get right with inline-asm. Writing the
exception code is usually hard to get right and inline-asm adds a considerable
complexity of its own. It is also hard to test. The inline-asm may depend on
the compiler version.
> or
> * by using helper const variables being set up in C and refer to them in asm or
> inline-asm
This is a performance penalty in a time critical section. Every instruction
here contributes to the worst case interrupt latency.
> or
> * by re-writing everything in C, such that only very few atomic ops (functions)
> would have to be needed.
This is not possible on many architectures. The exception handling is usually
not aware of an ABI.
>
> There probably are many more ways.
Probably maybe.
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