[Bug 1560] sparc64 [1/5]: _Objects_Extend_information improper alignment for 64-bit targets

[bugzilla-daemon at rtems.org]

https://www.rtems.org/bugzilla/show_bug.cgi?id=1560

--- Comment #5 from Gedare <giddyup44 at yahoo.com> 2010-06-23 16:30:01 CDT ---
(In reply to comment #4)
> I think the solution is to allocate extra memory to account for the alignment
> issues a target may have. I suspect you will need to do this at both the
> calculated boundaries.
I could see adding a 32-bit pad to the end of the inactive_per_block section,
and just add sizeof(uint32_t) to the allocation.  However, this is an
unnecessary hack for smaller CPUs.

Can we change the allocation so that the three separate parts of the table are
allocated separately?  Then the allocator can take responsibility for the
alignment issue.  

Otherwise, perhaps we should use some sort of ALIGN macro when establishing a
base address for the inactive_per_block and name portions of the table?  We
have alignment sizes defined in the CPU headers, e.g. CPU_HEAP_ALIGNMENT. It
shouldn't be too hard to create some CPU independent macros using the alignment
sizes to help with CPU-dependent alignment math.

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