[Bug 1738] New: uC5282 BSP assumes 64MHz clock

[bugzilla-daemon at rtems.org]

https://www.rtems.org/bugzilla/show_bug.cgi?id=1738

           Summary: uC5282 BSP assumes 64MHz clock
           Product: RTEMS
           Version: 4.9
          Platform: m68k
        OS/Version: RTEMS
            Status: NEW
          Severity: normal
          Priority: P3
         Component: bsps
        AssignedTo: joel.sherrill at oarcorp.com
        ReportedBy: strauman at slac.stanford.edu


Created an attachment (id=1106)
 --> (https://www.rtems.org/bugzilla/attachment.cgi?id=1106)
patch ** against rtems-4-10-branch **  implementing proposed change

Currently, the uC5282 BSP requires relinking
the application with a special linker flag
in order to make it work with 80MHz boards
(breaking run-time compatibility with 64MHz
variants).

The attached patch aims adds support for
run-time guessing/setting of the system-clock
frequency:

1) If uCbootloader environment variable
   SYS_CLOCK_SPEED is set to a non-zero
   number then the BSP assumes this number
   to specify the clock frequency in Hz.

2) If 1) yields no non-zero frequency then
   the linker-provided symbol _CPUClockSpeed
   is assumed to specify the clock frequency
   (in Hz). This is the traditional behavior
   but the default value of _CPUClockSpeed
   was changed from 64000000 to 0 (in order
   to let step 3) do it's work by default).

3) If neither 1) nor 2) yield a non-zero frequency
   then assume a PLL reference frequency (in Hz) as
   defined by the linker-provided symbol
   '_PLLRefClockSpeed' (which defaults to 8000000)
   and compute the system clock frequency from
   the divisor/multiplier settings in the SYNCR
   register.

We have both, 64MHz and 80MHz variants and both
use a PLL reference of 8MHz so that run-time
heuristics + detection 3) work fine.

1) + 2) give the user methods for overriding
the detection if needed.

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