[Bug 1740] New: Change PowerPC multi-libs for e200 and e500 cores

bugzilla-daemon at rtems.org bugzilla-daemon at rtems.org
Wed Feb 16 09:26:55 UTC 2011


           Summary: Change PowerPC multi-libs for e200 and e500 cores
           Product: Tools
           Version: unspecified
          Platform: All
        OS/Version: RTEMS
            Status: NEW
          Severity: normal
          Priority: P3
         Component: GCC
        AssignedTo: ralf.corsepius at rtems.org
        ReportedBy: sebastian.huber at embedded-brains.de

Created an attachment (id=1109)
 --> (https://www.rtems.org/bugzilla/attachment.cgi?id=1109)
Patch against GCC 4.5.2.

Some e200, the e500, and the e500v2 cores have a SPE and embedded floating
point unit.  They use the general purpose registers for floating point
operations.  Three multi-lib variants are useful here:

 1. Software floating point
 2. 32-bit hardware floating point (e200 and e500)
 3. 64-bit hardware floating point (e500v2)

We should not support SPE multi-lib variants, because this may effect the
interrupt context save and restore overhead.  There is also an open GCC bug
related to the SPE: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47751

The patch is based on

One question to a part of it in t-rtems:

@@ -47,6 +47,10 @@ MULTILIB_MATCHES     += mcpu?7400=mcpu?7450
 # Map 750 to .
 MULTILIB_MATCHES       += mcpu?750=

+# Map e500, 8548 to 8540
+MULTILIB_MATCHES       += mcpu?8540=mcpu?e500
+MULTILIB_MATCHES       += mcpu?8540=mcpu?8548
 # Soft-float only, default implies msoft-float

Why do we need this?  For example a -mcpu=e500 yields a 'cc1: error: bad value
(e500) for -mcpu= switch'.

Also in rtems.h:

+%{mcpu=8540: %{!Dppc*: %{!Dmpc*: -Dppc8540}  } }"

This will not trigger in case of -mcpu=8548.

Configure bugmail: https://www.rtems.org/bugzilla/userprefs.cgi?tab=email
------- You are receiving this mail because: -------
You are watching all bug changes.

More information about the bugs mailing list