[RTEMS Project] #355: SH4 patches
RTEMS trac
trac at rtems.org
Thu Nov 20 03:51:46 UTC 2014
#355: SH4 patches
----------------------+----------------------------
Reporter: dedekind | Owner: joel.sherrill
Type: defect | Status: closed
Priority: normal | Milestone: 4.9
Component: bsps | Version: 4.6
Severity: major | Resolution: wontfix
Keywords: |
----------------------+----------------------------
Changes (by chrisj):
* status: assigned => closed
* resolution: => wontfix
Old description:
> 1. c/src/libnetworking/rtems_telnetd/pty.c
> a). 'No memory' case check added.
> b). Termios initialization added. Telnet daemod don't work if termios is
> not initialized but don't initiazlize it. Console driver usually do it,
> but what if telnetd will be initialized first? (real situation in our
> board case)
>
> 2. c/src/lib/libcpu/sh/sh7750/score/ispsh7750.c
> Interrupt handler shitchs the prossessor to User mode in first several
> instructions. But SHBIOS (ususlly used on sh3/sh4 based boards) thinks
> that we in Privilegged mode when we invoke it from iph_hook. We need to
> switch the processor to Privile mode.
>
> 3. c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c
> a). Port disable means "disable rx and tx" but not "disable tx" only.
> b). SH7750_EVT_TO_NUM convertion is needed.
>
> 4. c/src/lib/libcpu/sh/sh7750/include/rtems/score/sh7750_regs.h
> No bugs here. Jusst new macro definitions fo cache controller registers
> added. I think this can be useful for somebody who wants to change
> the cache parameters (we use it for example).
>
> 5. c/src/exec/score/cpu/sh/rtems/score/cpu.h
> I think this is more useful if in case of Fatal error the gdbstub (if
> used) will reboot automatically rather than to go to infinit loop.
>
> Release:
> RTEMS-4.6 and CVS
New description:
1. c/src/libnetworking/rtems_telnetd/pty.c
a). 'No memory' case check added.
b). Termios initialization added. Telnet daemod don't work if termios is
not initialized but don't initiazlize it. Console driver usually do it,
but what if telnetd will be initialized first? (real situation in our
board case)
2. c/src/lib/libcpu/sh/sh7750/score/ispsh7750.c
Interrupt handler shitchs the prossessor to User mode in first several
instructions. But SHBIOS (ususlly used on sh3/sh4 based boards) thinks
that we in Privilegged mode when we invoke it from iph_hook. We need to
switch the processor to Privile mode.
3. c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c
a). Port disable means "disable rx and tx" but not "disable tx" only.
b). SH7750_EVT_TO_NUM convertion is needed.
4. c/src/lib/libcpu/sh/sh7750/include/rtems/score/sh7750_regs.h
No bugs here. Jusst new macro definitions fo cache controller registers
added. I think this can be useful for somebody who wants to change
the cache parameters (we use it for example).
5. c/src/exec/score/cpu/sh/rtems/score/cpu.h
I think this is more useful if in case of Fatal error the gdbstub (if
used) will reboot automatically rather than to go to infinit loop.
Release:
RTEMS-4.6 and CVS
--
Comment:
Not for the 4.9 release branch.
--
Ticket URL: <http://devel.rtems.org/ticket/355#comment:3>
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